ssd 1318, mirror problem, external charge pump, issue #784
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kraus
parent
a10b3e7164
commit
85644b9fa8
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@ -612,6 +612,7 @@ uint8_t u8x8_cad_EndTransfer(u8x8_t *u8x8) U8X8_NOINLINE;
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#define U8X8_A(a0) (U8X8_MSG_CAD_SEND_ARG), (a0)
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#define U8X8_CA(c0,a0) (U8X8_MSG_CAD_SEND_CMD), (c0), (U8X8_MSG_CAD_SEND_ARG), (a0)
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#define U8X8_CAA(c0,a0,a1) (U8X8_MSG_CAD_SEND_CMD), (c0), (U8X8_MSG_CAD_SEND_ARG), (a0), (U8X8_MSG_CAD_SEND_ARG), (a1)
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#define U8X8_CAAA(c0,a0,a1, a2) (U8X8_MSG_CAD_SEND_CMD), (c0), (U8X8_MSG_CAD_SEND_ARG), (a0), (U8X8_MSG_CAD_SEND_ARG), (a1), (U8X8_MSG_CAD_SEND_ARG), (a2)
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#define U8X8_CAAAA(c0,a0,a1,a2,a3) (U8X8_MSG_CAD_SEND_CMD), (c0), (U8X8_MSG_CAD_SEND_ARG), (a0), (U8X8_MSG_CAD_SEND_ARG), (a1), (U8X8_MSG_CAD_SEND_ARG), (a2), (U8X8_MSG_CAD_SEND_ARG), (a3)
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#define U8X8_AAC(a0,a1,c0) (U8X8_MSG_CAD_SEND_ARG), (a0), (U8X8_MSG_CAD_SEND_ARG), (a1), (U8X8_MSG_CAD_SEND_CMD), (c0)
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#define U8X8_D1(d0) (U8X8_MSG_CAD_SEND_DATA), (d0)
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@ -863,6 +864,7 @@ uint8_t u8x8_d_t6963_160x80(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *ar
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uint8_t u8x8_d_t6963_256x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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uint8_t u8x8_d_ssd1317_96x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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uint8_t u8x8_d_ssd1318_128x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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uint8_t u8x8_d_ssd1318_128x96_xcp(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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uint8_t u8x8_d_ssd1322_nhd_256x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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uint8_t u8x8_d_ssd1322_nhd_128x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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uint8_t u8x8_d_a2printer_384x240(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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@ -43,8 +43,8 @@
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/* more or less generic setup of all these small OLEDs */
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static const uint8_t u8x8_d_ssd1318_128x96_init_seq[] = {
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/* with internal charge pump (icp) */
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static const uint8_t u8x8_d_ssd1318_128x96_icp_init_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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@ -59,18 +59,18 @@ static const uint8_t u8x8_d_ssd1318_128x96_init_seq[] = {
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// four possible charge pump setting from as per sec 6.8.2 of the ssd1318 datasheet
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// uncomment only one of the below for lines
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// U8X8_CA(0x08d, 0x004), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x044), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x084), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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U8X8_CA(0x08d, 0x0c4), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// default:
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// U8X8_CA(0x08d, 0x004, 0x0ac, 0x001), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x044, 0x0ac, 0x001), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x084, 0x0ac, 0x001), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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U8X8_CAAA(0x08d, 0x0c4, 0x0ac, 0x001), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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U8X8_CA(0x0ac, 0x001), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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U8X8_C(0x0a1), /* segment remap a0/a1*/
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U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
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U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
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// Flipmode
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// U8X8_C(0x0a0), /* segment remap a0/a1*/
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// U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
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// U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
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U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
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@ -93,6 +93,50 @@ static const uint8_t u8x8_d_ssd1318_128x96_init_seq[] = {
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};
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/* with external charge pump */
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static const uint8_t u8x8_d_ssd1318_128x96_xcp_init_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_CA(0x0fd, 0x012), /* unlock */
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U8X8_C(0x0ae), /* display off */
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U8X8_CA(0x0ad, 0x0d0), /* external or internal IREF selection */
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U8X8_CA(0x0a8, 0x05f), /* multiplex ratio, 96 duty */
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U8X8_CA(0x0d3, 0x000), /* display offset */
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U8X8_CA(0x0a2, 0x000), /* start line */
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// not sure if we have to set something for external charge pump
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// ...
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U8X8_C(0x0a1), /* segment remap a0/a1*/
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U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
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// Flipmode
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// U8X8_C(0x0a0), /* segment remap a0/a1*/
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// U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
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U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
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U8X8_CA(0x081, 0x00f), /* value from issue 784, seems to be a little bit low... */
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U8X8_CA(0x0d5, 0x0d1), /* clock divide ratio (0x00=1) and oscillator frequency (0x8), value from issue 784 example code */
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U8X8_CA(0x0d9, 0x022), /* [2] pre-charge period 0x022/f1, value from issue 784 example code */
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U8X8_CA(0x0db, 0x030), /* vcomh deselect level, value from issue 784 example code */
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//U8X8_CA(0x020, 0x000), /* page addressing mode */
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//U8X8_C(0x02e), /* Deactivate scroll */
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U8X8_C(0x0a4), /* output ram to display */
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U8X8_C(0x0a6), /* none inverted normal display mode */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const uint8_t u8x8_d_ssd1318_128x96_powersave0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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@ -111,7 +155,7 @@ static const uint8_t u8x8_d_ssd1318_128x96_powersave1_seq[] = {
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static const uint8_t u8x8_d_ssd1318_128x96_flip0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0a1), /* segment remap a0/a1*/
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U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
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U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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@ -119,7 +163,7 @@ static const uint8_t u8x8_d_ssd1318_128x96_flip0_seq[] = {
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static const uint8_t u8x8_d_ssd1318_128x96_flip1_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0a0), /* segment remap a0/a1*/
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U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
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U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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@ -240,7 +284,28 @@ uint8_t u8x8_d_ssd1318_128x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *
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{
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1318_128x96_init_seq);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1318_128x96_icp_init_seq);
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break;
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1318_128x96_display_info);
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break;
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default:
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return 0;
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}
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return 1;
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}
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uint8_t u8x8_d_ssd1318_128x96_xcp(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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if ( u8x8_d_ssd1318_generic(u8x8, msg, arg_int, arg_ptr) != 0 )
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return 1;
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switch(msg)
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{
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1318_128x96_xcp_init_seq);
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break;
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1318_128x96_display_info);
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@ -142,7 +142,7 @@
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//U8G2_SSD1317_96X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed
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//U8G2_SSD1317_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed
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//U8G2_SSD1318_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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//U8G2_SSD1318_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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U8G2_SSD1318_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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//U8G2_LD7032_60X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* cs=*/ 9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board
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//U8G2_LD7032_60X32_1_4W_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* reset=*/ U8X8_PIN_NONE); // NOT TESTED!
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//U8G2_UC1701_EA_DOGS102_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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