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@ -62,7 +62,7 @@ static const uint8_t u8x8_d_ssd1318_128x96_init_seq[] = {
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// U8X8_CA(0x08d, 0x004), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x044), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x084), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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// U8X8_CA(0x08d, 0x0c4), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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U8X8_CA(0x08d, 0x0c4), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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U8X8_CA(0x0ac, 0x001), /* Charge pump setting from sec 6.8.2 of SSD1318 datasheet */
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@ -172,7 +172,7 @@
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//U8G2_ST75256_JLX172104_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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//U8G2_ST75256_JLX172104_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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//U8G2_ST75256_JLX19296_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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//U8G2_ST75256_JLX19296_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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U8G2_ST75256_JLX19296_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
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//U8G2_ST75256_JLX256128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
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//U8G2_ST75256_JLX256128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
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//U8G2_ST75256_JLX256128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 9, /* data=*/ 8, /* cs=*/ 7, /* dc=*/ 6, /* reset=*/ 5); // MKR Zero, Enable U8g2 16 bit mode for this display
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