338 lines
11 KiB
C
338 lines
11 KiB
C
/*
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* @brief LPC8xx IOCON register block and driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licenser disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __IOCON_8XX_H_
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#define __IOCON_8XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup IOCON_8XX CHIP: LPC8xx IOCON register block and driver
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* @ingroup CHIP_8XX_Drivers
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* @{
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*/
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#define NUM_IOCON_PIO (29)
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/**
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* @brief Array of IOCON pin definitions passed to Chip_IOCON_SetPinMuxing() must be in this format
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*/
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typedef struct {
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uint32_t pin:8; /* Pin number */
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uint32_t modefunc:24; /* Function and mode */
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} PINMUX_GRP_T;
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/**
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* @brief IOCON register block structure
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* @note When accessing this register structure, use the PIOn enumeration
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* as the array index as the pin assignments are not mapped 1-1 with the
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* IOCON structure.<br>
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* Incorrect: LPC_IOCON->PIO0[0] = 0x1; // Index 0 does not map to pin 0!<br>
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* Correct: LPC_IOCON->PIO0[IOCON_PIO0] = 0x1; // Enumeration PIO0 maps to pin 0
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*/
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typedef struct { /*!< (@ 0x40044000) IOCONFIG Structure */
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__IO uint32_t PIO0[NUM_IOCON_PIO + 2]; /* 2 added for reserved register */
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} LPC_IOCON_T;
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/**
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* @brief IOCON Register bit definitions
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*/
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/* Pin Mode mask */
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#define PIN_MODE_MASK (0x3 << 3)
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#define PIN_MODE_BITNUM (3)
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/* Pin Hysteresis mask */
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#define PIN_HYS_MASK (0x1 << 5)
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#define PIN_HYS_BITNUM (5)
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/* Pin invert input mask */
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#define PIN_INV_MASK (0x1 << 6)
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#define PIN_INV_BITNUM (6)
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/* Pin open drain mode mask */
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#define PIN_OD_MASK (0x1 << 10)
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#define PIN_OD_BITNUM (10)
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/* Pin digital filter sample mode mask */
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#define PIN_SMODE_MASK (0x3 << 11)
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#define PIN_SMODE_BITNUM (11)
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/* Pin clock divider mask */
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#define PIN_CLKDIV_MASK (0x7 << 13)
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#define PIN_CLKDIV_BITNUM (13)
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/* Pin I2C mode mask - valid for PIO10 & PIO11 only */
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#define PIN_I2CMODE_MASK (0x3 << 8)
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#define PIN_I2CMODE_BITNUM (8)
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/**
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* @brief IOCON Pin Numbers enum
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* Maps a pin number to an IOCON (register) array index. IOCON indexes
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* are not mapped 1-1 with pin numbers. When access the PIO0 array in
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* the LPC_IOCON_T structure, the array should be indexed with one of
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* these enumerations based on the pin that will have it's settings
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* changed.<br>
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* Example: LPC_IOCON->PIO0[IOCON_PIO0] = 0x1; // Enumeration PIO0 maps to pin 0
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*/
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typedef enum CHIP_PINx {
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IOCON_PIO0 = 0x11, /*!< PIN 0 */
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IOCON_PIO1 = 0x0B, /*!< PIN 1 */
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IOCON_PIO2 = 0x06, /*!< PIN 2 */
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IOCON_PIO3 = 0x05, /*!< PIN 3 */
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IOCON_PIO4 = 0x04, /*!< PIN 4 */
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IOCON_PIO5 = 0x03, /*!< PIN 5 */
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/* The following pins are not present in DIP8 packages */
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IOCON_PIO6 = 0x10, /*!< PIN 6 */
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IOCON_PIO7 = 0x0F, /*!< PIN 7 */
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IOCON_PIO8 = 0x0E, /*!< PIN 8 */
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IOCON_PIO9 = 0x0D, /*!< PIN 9 */
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IOCON_PIO10 = 0x08, /*!< PIN 10 */
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IOCON_PIO11 = 0x07, /*!< PIN 11 */
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IOCON_PIO12 = 0x02, /*!< PIN 12 */
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IOCON_PIO13 = 0x01, /*!< PIN 13 */
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/* The following pins are not present in DIP8 & TSSOP16 packages */
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IOCON_PIO14 = 0x12, /*!< PIN 14 */
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IOCON_PIO15 = 0x0A, /*!< PIN 15 */
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IOCON_PIO16 = 0x09, /*!< PIN 16 */
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IOCON_PIO17 = 0x00, /*!< PIN 17 */
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IOCON_PIO_NUL0 = 0x0C, /*!< PIN NULL */
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/* The following pins are not present in DIP8, TSSOP16 & TSSOP20 packages */
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IOCON_PIO18 = 0x1E, /*!< PIN 18 */
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IOCON_PIO19 = 0x1D, /*!< PIN 19 */
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IOCON_PIO20 = 0x1C, /*!< PIN 20 */
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IOCON_PIO21 = 0x1B, /*!< PIN 21 */
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IOCON_PIO22 = 0x1A, /*!< PIN 22 */
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IOCON_PIO23 = 0x19, /*!< PIN 23 */
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IOCON_PIO24 = 0x18, /*!< PIN 24 */
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IOCON_PIO25 = 0x17, /*!< PIN 25 */
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IOCON_PIO26 = 0x16, /*!< PIN 26 */
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IOCON_PIO27 = 0x15, /*!< PIN 27 */
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IOCON_PIO28 = 0x14, /*!< PIN 28 */
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IOCON_PIO_NUL1 = 0x13, /*!< PIN NULL */
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} CHIP_PINx_T;
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/**
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* @brief IOCON Pin Modes enum
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*/
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typedef enum CHIP_PIN_MODE {
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PIN_MODE_INACTIVE = 0, /*!< Inactive mode */
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PIN_MODE_PULLDN = 1, /*!< Pull Down mode */
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PIN_MODE_PULLUP = 2, /*!< Pull up mode */
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PIN_MODE_REPEATER = 3 /*!< Repeater mode */
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} CHIP_PIN_MODE_T;
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/**
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* @brief IOCON Digital Filter Sample modes enum
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*/
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typedef enum CHIP_PIN_SMODE {
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PIN_SMODE_BYPASS = 0, /*!< Bypass input filter */
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PIN_SMODE_CYC1 = 1, /*!< Input pulses shorter than 1 filter clock cycle are rejected */
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PIN_SMODE_CYC2 = 2, /*!< Input pulses shorter than 2 filter clock cycles are rejected */
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PIN_SMODE_CYC3 = 3 /*!< Input pulses shorter than 3 filter clock cycles are rejected */
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} CHIP_PIN_SMODE_T;
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/**
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* @brief IOCON I2C Modes enum (Only for I2C pins PIO0_10 and PIO0_11)
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*/
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typedef enum CHIP_PIN_I2CMODE {
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PIN_I2CMODE_STDFAST = 0, /*!< I2C standard mode/Fast mode */
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PIN_I2CMODE_GPIO = 1, /*!< Standard I/O functionality */
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PIN_I2CMODE_FASTPLUS = 2 /*!< I2C Fast plus mode */
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} CHIP_PIN_I2CMODE_T;
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/**
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* @brief Sets I/O Control pin mux
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : GPIO pin to mux
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* @param modefunc : OR'ed values or type IOCON_*
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* @return Nothing
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*/
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STATIC INLINE void Chip_IOCON_PinMuxSet(LPC_IOCON_T *pIOCON, uint8_t pin, uint32_t modefunc)
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{
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pIOCON->PIO0[pin] = modefunc;
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}
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/**
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* @brief Set all I/O Control pin muxing
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pinArray : Pointer to array of pin mux selections
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* @param arrayLength : Number of entries in pinArray
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* @return Nothing
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*/
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void Chip_IOCON_SetPinMuxing(LPC_IOCON_T *pIOCON, const PINMUX_GRP_T* pinArray, uint32_t arrayLength);
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/**
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* @brief Sets pull-up or pull-down mode for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param mode : Mode (Pull-up/Pull-down mode)
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* @return Nothing
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* @note Do not use with pins PIO10 and PIO11.
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*/
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void Chip_IOCON_PinSetMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_MODE_T mode);
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/**
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* @brief Enable or disable hysteresis for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param enable : true to enable, false to disable
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* @return Nothing
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* @note Do not use with pins PIO10 and PIO11.
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*/
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void Chip_IOCON_PinSetHysteresis(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool enable);
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/**
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* @brief Enable hysteresis for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @return Nothing
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* @note Do not use with pins PIO10 and PIO11.
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*/
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STATIC INLINE void Chip_IOCON_PinEnableHysteresis(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin)
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{
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pIOCON->PIO0[pin] |= PIN_HYS_MASK;
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}
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/**
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* @brief Disable hysteresis for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @return Nothing
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* @note Do not use with pins PIO10 and PIO11.
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*/
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STATIC INLINE void Chip_IOCON_PinDisableHysteresis(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin)
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{
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pIOCON->PIO0[pin] &= ~PIN_HYS_MASK;
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}
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/**
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* @brief Enable or disable invert input for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param invert : true to invert, false to not to invert
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* @return Nothing
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*/
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void Chip_IOCON_PinSetInputInverted(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool invert);
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/**
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* @brief Enable invert input for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @return Nothing
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*/
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STATIC INLINE void Chip_IOCON_PinEnableInputInverted(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin)
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{
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pIOCON->PIO0[pin] |= PIN_INV_MASK;
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}
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/**
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* @brief Disable invert input for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @return Nothing
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*/
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STATIC INLINE void Chip_IOCON_PinDisableInputInverted(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin)
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{
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pIOCON->PIO0[pin] &= ~PIN_INV_MASK;
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}
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/**
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* @brief Enables or disables open-drain mode for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param open_drain : true to enable open-drain mode,
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* false to disable open-drain mode
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* @return Nothing
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*/
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void Chip_IOCON_PinSetOpenDrainMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool open_drain);
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/**
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* @brief Enables open-drain mode for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @return Nothing
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*/
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STATIC INLINE void Chip_IOCON_PinEnableOpenDrainMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin)
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{
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pIOCON->PIO0[pin] |= PIN_OD_MASK;
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}
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/**
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* @brief Disables open-drain mode for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @return Nothing
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*/
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STATIC INLINE void Chip_IOCON_PinDisableOpenDrainMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin)
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{
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pIOCON->PIO0[pin] &= ~PIN_OD_MASK;
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}
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/**
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* @brief Sets the digital filter sampling mode for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param smode : 0x0 = bypass, 0x[1..3] = 1 to 3 clock cycles.
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* @return Nothing
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*/
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void Chip_IOCON_PinSetSampleMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_SMODE_T smode);
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/**
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* @brief Select peripheral clock divider for input filter sampling clock
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param clkdiv : 0 = no divisor, 1...6 = PCLK/clkdiv
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* @return Nothing
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*/
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void Chip_IOCON_PinSetClockDivisor(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_CLKDIV_T clkdiv);
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/**
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* @brief Set I2C mode for a pin
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* @param pIOCON : The base of IOCON peripheral on the chip
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* @param pin : Pin number
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* @param mode : 0:Standard/Fast I2C 1: GPIO 2: Fast Plus
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* @return Nothing
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* @note Valid for pins PIO0_10 and PIO0_11 only.
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*/
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void Chip_IOCON_PinSetI2CMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_I2CMODE_T mode);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __IOCON_8XX_H_ */
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