340 lines
12 KiB
C
340 lines
12 KiB
C
#include "u8g2_port.h"
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#include <string.h>
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#define MAX_RETRY 3
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#if defined U8G2_USE_HW_I2C
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static struct rt_i2c_bus_device *i2c_bus = RT_NULL;
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#endif
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#if defined U8G2_USE_HW_SPI
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static struct rt_spi_device u8g2_spi_dev;
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int rt_hw_spi_config(uint8_t spi_mode, uint32_t max_hz, uint8_t cs_pin )
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{
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rt_err_t res;
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// Attach Device
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rt_pin_mode(cs_pin, PIN_MODE_OUTPUT);
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// spi cs signal will be controlled directly using gpio
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if(u8g2_spi_dev.bus == RT_NULL)
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{
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res = rt_spi_bus_attach_device(&u8g2_spi_dev, U8G2_SPI_DEVICE_NAME, U8G2_SPI_BUS_NAME, RT_NULL);
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if (res != RT_EOK)
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{
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rt_kprintf("[u8g2] Failed to attach device %s\n", U8G2_SPI_DEVICE_NAME);
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return res;
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}
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else
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{
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rt_kprintf("[u8g2] Attach device to %s\n", U8G2_SPI_DEVICE_NAME);
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}
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}
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else
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{
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rt_kprintf("[u8g2] Found device %s\n", U8G2_SPI_DEVICE_NAME);
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}
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// Set device SPI Mode
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struct rt_spi_configuration cfg;
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cfg.data_width = 8;
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switch(spi_mode)
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{
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case 0: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB; break;
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case 1: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_1 | RT_SPI_MSB; break;
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case 2: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_2 | RT_SPI_MSB; break;
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case 3: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_3 | RT_SPI_MSB; break;
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}
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cfg.max_hz = max_hz; /* 20M,SPI max 42MHz,ssd1351 4-wire spi */
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rt_spi_configure(&u8g2_spi_dev, &cfg);
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return RT_EOK;
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}
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#endif /* U8G2_USE_HW_SPI */
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uint8_t u8x8_gpio_and_delay_rtthread(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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uint8_t i;
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switch(msg)
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{
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case U8X8_MSG_DELAY_NANO: // delay arg_int * 1 nano second
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__asm__ volatile("nop");
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break;
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case U8X8_MSG_DELAY_100NANO: // delay arg_int * 100 nano seconds
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__asm__ volatile("nop");
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break;
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case U8X8_MSG_DELAY_10MICRO: // delay arg_int * 10 micro seconds
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for (uint16_t n = 0; n < 320; n++)
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{
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__asm__ volatile("nop");
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}
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break;
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case U8X8_MSG_DELAY_MILLI: // delay arg_int * 1 milli second
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rt_thread_mdelay(arg_int);
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break;
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case U8X8_MSG_GPIO_AND_DELAY_INIT:
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// Function which implements a delay, arg_int contains the amount of ms
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// set spi pin mode
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rt_pin_mode(u8x8->pins[U8X8_PIN_SPI_CLOCK],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_SPI_DATA],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_RESET],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_DC],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_CS],PIN_MODE_OUTPUT);
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// set i2c pin mode
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rt_pin_mode(u8x8->pins[U8X8_PIN_I2C_DATA],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_I2C_CLOCK],PIN_MODE_OUTPUT);
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// set 8080 pin mode
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rt_pin_mode(u8x8->pins[U8X8_PIN_D0],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D1],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D2],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D3],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D4],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D5],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D6],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_D7],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_E],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_DC],PIN_MODE_OUTPUT);
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rt_pin_mode(u8x8->pins[U8X8_PIN_RESET],PIN_MODE_OUTPUT);
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// set menu pin mode
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rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_HOME],PIN_MODE_INPUT_PULLUP);
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rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_SELECT],PIN_MODE_INPUT_PULLUP);
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rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_PREV],PIN_MODE_INPUT_PULLUP);
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rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_NEXT],PIN_MODE_INPUT_PULLUP);
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rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_UP],PIN_MODE_INPUT_PULLUP);
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rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_DOWN],PIN_MODE_INPUT_PULLUP);
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// set value
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rt_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK],1);
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rt_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA],1);
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rt_pin_write(u8x8->pins[U8X8_PIN_RESET],1);
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rt_pin_write(u8x8->pins[U8X8_PIN_DC],1);
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rt_pin_write(u8x8->pins[U8X8_PIN_CS],1);
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break;
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case U8X8_MSG_DELAY_I2C:
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// arg_int is the I2C speed in 100KHz, e.g. 4 = 400 KHz
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// arg_int=1: delay by 5us, arg_int = 4: delay by 1.25us
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for (uint16_t n = 0; n < (arg_int<=2?160:40); n++)
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{
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__asm__ volatile("nop");
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}
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break;
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//case U8X8_MSG_GPIO_D0: // D0 or SPI clock pin: Output level in arg_int
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//case U8X8_MSG_GPIO_SPI_CLOCK:
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//case U8X8_MSG_GPIO_D1: // D1 or SPI data pin: Output level in arg_int
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//case U8X8_MSG_GPIO_SPI_DATA:
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case U8X8_MSG_GPIO_D2: // D2 pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_D2],arg_int);
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break;
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case U8X8_MSG_GPIO_D3: // D3 pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_D3], arg_int);
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break;
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case U8X8_MSG_GPIO_D4: // D4 pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_D4], arg_int);
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break;
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case U8X8_MSG_GPIO_D5: // D5 pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_D5], arg_int);
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break;
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case U8X8_MSG_GPIO_D6: // D6 pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_D6], arg_int);
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break;
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case U8X8_MSG_GPIO_D7: // D7 pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_D7], arg_int);
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break;
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case U8X8_MSG_GPIO_E: // E/WR pin: Output level in arg_int
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rt_pin_write(u8x8->pins[U8X8_PIN_E], arg_int);
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break;
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case U8X8_MSG_GPIO_I2C_CLOCK:
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// arg_int=0: Output low at I2C clock pin
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// arg_int=1: Input dir with pullup high for I2C clock pin
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rt_pin_write(u8x8->pins[U8X8_PIN_I2C_CLOCK], arg_int);
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break;
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case U8X8_MSG_GPIO_I2C_DATA:
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// arg_int=0: Output low at I2C data pin
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// arg_int=1: Input dir with pullup high for I2C data pin
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rt_pin_write(u8x8->pins[U8X8_PIN_I2C_DATA], arg_int);
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break;
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case U8X8_MSG_GPIO_SPI_CLOCK:
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// Function to define the logic level of the clockline
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rt_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK], arg_int);
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break;
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case U8X8_MSG_GPIO_SPI_DATA:
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// Function to define the logic level of the data line to the display
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rt_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA], arg_int);
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break;
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case U8X8_MSG_GPIO_CS:
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// Function to define the logic level of the CS line
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rt_pin_write(u8x8->pins[U8X8_PIN_CS], arg_int);
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break;
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case U8X8_MSG_GPIO_DC:
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// Function to define the logic level of the Data/ Command line
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rt_pin_write(u8x8->pins[U8X8_PIN_DC], arg_int);
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break;
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case U8X8_MSG_GPIO_RESET:
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// Function to define the logic level of the RESET line
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rt_pin_write(u8x8->pins[U8X8_PIN_RESET], arg_int);
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break;
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default:
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if ( msg >= U8X8_MSG_GPIO(0) )
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{
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i = u8x8_GetPinValue(u8x8, msg);
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if ( i != U8X8_PIN_NONE )
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{
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if ( u8x8_GetPinIndex(u8x8, msg) < U8X8_PIN_OUTPUT_CNT )
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{
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rt_pin_write(i, arg_int);
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}
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else
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{
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if ( u8x8_GetPinIndex(u8x8, msg) == U8X8_PIN_OUTPUT_CNT )
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{
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// call yield() for the first pin only, u8x8 will always request all the pins, so this should be ok
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// yield();
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}
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u8x8_SetGPIOResult(u8x8, rt_pin_read(i) == 0 ? 0 : 1);
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}
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}
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break;
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}
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return 0;
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}
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return 1;
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}
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#if defined U8G2_USE_HW_I2C
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uint8_t u8x8_byte_rtthread_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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/* u8g2/u8x8 will never send more than 32 bytes between START_TRANSFER and END_TRANSFER */
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struct rt_i2c_msg msgs;
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static uint8_t buffer[32];
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static uint8_t buf_idx;
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uint8_t *data;
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rt_uint8_t t = 0;
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switch(msg)
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{
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case U8X8_MSG_BYTE_SEND:
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data = (uint8_t *)arg_ptr;
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while( arg_int > 0 )
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{
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buffer[buf_idx++] = *data;
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data++;
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arg_int--;
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}
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break;
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case U8X8_MSG_BYTE_INIT:
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i2c_bus = rt_i2c_bus_device_find(U8G2_I2C_DEVICE_NAME);
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if (i2c_bus == RT_NULL)
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{
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rt_kprintf("[u8g2] Failed to find bus %s\n", U8G2_I2C_DEVICE_NAME);
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return 0;
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}
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break;
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case U8X8_MSG_BYTE_SET_DC:
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break;
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case U8X8_MSG_BYTE_START_TRANSFER:
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buf_idx = 0;
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break;
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case U8X8_MSG_BYTE_END_TRANSFER:
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if (i2c_bus == RT_NULL)
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{
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rt_kprintf("[u8g2] Failed to find bus %s\n", U8G2_I2C_DEVICE_NAME);
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return 0;
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}
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// I2C Data Transfer
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msgs.addr = u8x8_GetI2CAddress(u8x8)>>1;
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msgs.flags = RT_I2C_WR;
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msgs.buf = buffer;
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msgs.len = buf_idx;
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while(rt_i2c_transfer(i2c_bus, &msgs, 1) != 1 && t < MAX_RETRY)
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{
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t++;
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};
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if(t >= MAX_RETRY)
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{
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return 0;
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}
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break;
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default:
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return 0;
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}
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return 1;
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}
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#endif /* U8G2_USE_HW_I2C */
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#if defined U8G2_USE_HW_SPI
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uint8_t u8x8_byte_rtthread_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
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struct rt_spi_message spi_msg;
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switch(msg)
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{
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case U8X8_MSG_BYTE_SEND:
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spi_msg.send_buf = arg_ptr;
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spi_msg.recv_buf = RT_NULL;
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spi_msg.length = arg_int;
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spi_msg.cs_take = 0;
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spi_msg.cs_release = 0;
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spi_msg.next = RT_NULL;
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rt_spi_transfer_message(&u8g2_spi_dev, &spi_msg);
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break;
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case U8X8_MSG_BYTE_INIT:
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/* SPI mode has to be mapped to the mode of the current controller, at least Uno, Due, 101 have different SPI_MODEx values */
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/* 0: clock active high, data out on falling edge, clock default value is zero, takover on rising edge */
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/* 1: clock active high, data out on rising edge, clock default value is zero, takover on falling edge */
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/* 2: clock active low, data out on rising edge */
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/* 3: clock active low, data out on falling edge */
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u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
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rt_hw_spi_config(u8x8->display_info->spi_mode, u8x8->display_info->sck_clock_hz, u8x8->pins[U8X8_PIN_CS]);
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break;
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case U8X8_MSG_BYTE_SET_DC:
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u8x8_gpio_SetDC(u8x8, arg_int);
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break;
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case U8X8_MSG_BYTE_START_TRANSFER:
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u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level);
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u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL);
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break;
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case U8X8_MSG_BYTE_END_TRANSFER:
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u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL);
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u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
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break;
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default:
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return 0;
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}
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return 1;
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}
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#endif /* U8G2_USE_HW_SPI */
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