449 lines
12 KiB
C
449 lines
12 KiB
C
/*
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RTC for the STM32L031
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EXTI line
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17 RTC alarm
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19 RTC tamper & timestamp & CSS_LSE
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20 RTC wakeup timer
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__enable_irq()
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__disable_irq()
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*/
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#include "stm32l031xx.h"
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#include "delay.h"
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#include "u8g2.h"
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#include "rtc.h"
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#include "key.h"
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/*=======================================================================*/
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/* external functions */
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uint8_t u8x8_gpio_and_delay_stm32l0(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
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/*=======================================================================*/
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/* global variables */
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#define TAMPER_SYSTICK_DELAY 5
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volatile unsigned long SysTickCount = 0;
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volatile unsigned long RTCIRQCount = 0;
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volatile unsigned long Tamper2Count = 0;
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volatile unsigned long Tamper3Count = 0;
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rtc_t rtc;
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u8g2_t u8g2;
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/*=======================================================================*/
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/* utility function */
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void enableRCCRTCWrite(void) U8G2_NOINLINE;
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void enableRCCRTCWrite(void)
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{
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//RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface */
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//PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */
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}
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void disableRCCRTCWrite(void) U8G2_NOINLINE;
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void disableRCCRTCWrite(void)
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{
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//PWR->CR &= ~PWR_CR_DBP; /* disable write access to RCC->CSR and RTC */
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//RCC->APB1ENR &= ~RCC_APB1ENR_PWREN; /* disable power interface */
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}
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/*=======================================================================*/
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void __attribute__ ((interrupt, used)) SysTick_Handler(void)
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{
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SysTickCount++;
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if ( Tamper3Count > 0 )
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{
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Tamper3Count--;
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if ( Tamper3Count == 0 )
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{
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//enableRCCRTCWrite();
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RTC->ISR &= ~RTC_ISR_TAMP3F; /* clear tamper flag, allow new tamper event */
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//disableRCCRTCWrite();
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}
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}
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else
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{
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RTC->ISR &= ~RTC_ISR_TAMP3F; /* clear tamper flag, allow new tamper event */
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}
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if ( Tamper2Count > 0 )
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{
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Tamper2Count--;
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if ( Tamper2Count == 0 )
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{
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//enableRCCRTCWrite();
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RTC->ISR &= ~RTC_ISR_TAMP2F; /* clear tamper flag, allow new tamper event */
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//disableRCCRTCWrite();
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}
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}
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else
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{
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RTC->ISR &= ~RTC_ISR_TAMP2F; /* clear tamper flag, allow new tamper event */
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}
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}
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void __attribute__ ((interrupt, used)) RTC_IRQHandler(void)
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{
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//enableRCCRTCWrite();
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if ( (EXTI->PR & EXTI_PR_PIF20) != 0 ) /* interrupt caused by wake up */
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{
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EXTI->PR = EXTI_PR_PIF20; /* wake up is connected to line 20, clear this IRQ */
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}
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/* the wake up time flag must be cleared, otherwise no further IRQ will happen */
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/* in principle, this should happen only when a IRQ line 20 IRQ happens, but */
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/* it will be more safe to clear this flag for any interrupt */
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RTC->ISR &= ~RTC_ISR_WUTF; /* clear the wake up flag */
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if ( (EXTI->PR & EXTI_PR_PIF19) != 0 ) /* interrupt caused by tamper event */
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{
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EXTI->PR = EXTI_PR_PIF19; /* clear tamper IRQ */
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/* The TAMPxF flag has to be cleared, but this is done in the systick handler after some delay */
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//RTC->ISR &= ~RTC_ISR_TAMP3F;
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//RTC->ISR &= ~RTC_ISR_TAMP2F;
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if ( RTC->ISR & RTC_ISR_TAMP3F )
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{
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key_add(KEY_NEXT);
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Tamper3Count = TAMPER_SYSTICK_DELAY;
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}
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if ( RTC->ISR & RTC_ISR_TAMP2F )
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{
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key_add(KEY_SELECT);
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Tamper2Count = TAMPER_SYSTICK_DELAY;
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}
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}
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//disableRCCRTCWrite();
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RTCIRQCount++;
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}
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/*=======================================================================*/
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/*
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Enable several power regions: PWR, GPIOA
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Enable write access to RTC
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This must be executed after each reset.
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*/
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void startUp(void)
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{
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RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
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RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface */
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PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */
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}
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/*=======================================================================*/
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/*
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Set internal high speed clock as clock for the system
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Also call SystemCoreClockUpdate()
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This must be executed after each reset.
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*/
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void startHSIClock()
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{
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/* test if the current clock source is something else than HSI */
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if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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{
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/* enable HSI */
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RCC->CR |= RCC_CR_HSION;
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/* wait until HSI becomes ready */
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while ( (RCC->CR & RCC_CR_HSIRDY) == 0 )
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;
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/* enable the HSI "divide by 4" bit */
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RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN);
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/* wait until the "divide by 4" flag is enabled */
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while((RCC->CR & RCC_CR_HSIDIVF) == 0)
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;
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/* then use the HSI clock */
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RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI;
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/* wait until HSI clock is used */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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;
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}
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/* disable PLL */
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RCC->CR &= (uint32_t)(~RCC_CR_PLLON);
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/* wait until PLL is inactive */
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while((RCC->CR & RCC_CR_PLLRDY) != 0)
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;
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/* set latency to 1 wait state */
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FLASH->ACR |= FLASH_ACR_LATENCY;
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/* At this point the HSI runs with 4 MHz */
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/* Multiply by 16 device by 2 --> 32 MHz */
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RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2);
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/* enable PLL */
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RCC->CR |= RCC_CR_PLLON;
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/* wait until the PLL is ready */
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while ((RCC->CR & RCC_CR_PLLRDY) == 0)
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;
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/* use the PLL has clock source */
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RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL);
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/* wait until the PLL source is active */
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
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;
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}
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/*=======================================================================*/
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/*
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Setup systick interrupt.
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A call to SystemCoreClockUpdate() is required before calling this function.
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This must be executed after each reset.
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*/
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void startSysTick(void)
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{
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SysTick->LOAD = (SystemCoreClock/1000)*50 - 1; /* 50ms task */
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SysTick->VAL = 0;
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SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
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}
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/*=======================================================================*/
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/*
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Setup u8g2
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This must be executed only after POR reset.
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*/
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void initDisplay(void)
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{
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/* setup display */
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u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, U8G2_R0, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_stm32l0);
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u8g2_InitDisplay(&u8g2);
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u8g2_SetPowerSave(&u8g2, 0);
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u8g2_SetFont(&u8g2, u8g2_font_6x12_tf);
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u8g2_ClearBuffer(&u8g2);
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u8g2_DrawStr(&u8g2, 0,12, "STM32L031");
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u8g2_DrawStr(&u8g2, 0,24, u8x8_u8toa(SystemCoreClock/1000000, 2));
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u8g2_DrawStr(&u8g2, 20,24, "MHz");
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u8g2_SendBuffer(&u8g2);
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}
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/*=======================================================================*/
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/*
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configure and start RTC
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This must be executed only after POR reset.
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*/
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void initRTC(void)
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{
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/* real time clock enable */
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//enableRCCRTCWrite();
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RTC->WPR = 0x0ca; /* disable RTC write protection */
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RTC->WPR = 0x053;
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/* externel 32K clock source */
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RCC->CSR |= RCC_CSR_LSEBYP; /* bypass oscillator */
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/* externel 32K oscillator */
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//RCC->CSR &= ~RCC_CSR_LSEBYP; /* no bypass oscillator */
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//RCC->CSR &= ~RCC_CSR_LSEDRV_Msk /* lowest drive */
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//RCC->CSR |= RCC_CSR_LSEDRV_0; /* medium low drive */
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RCC->CSR |= RCC_CSR_LSEON; /* enable low speed external clock */
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delay_micro_seconds(100000*5); /* LSE requires between 100ms to 200ms */
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/*
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if ( RCC->CSR & RCC_CSR_LSERDY )
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display_Write("32K Clock Ready\n");
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else
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display_Write("32K Clock Error\n");
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*/
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RCC->CSR &= ~RCC_CSR_RTCSEL_Msk; /* no clock selection for RTC */
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RCC->CSR |= RCC_CSR_RTCSEL_LSE; /* select LSE */
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RCC->CSR |= RCC_CSR_RTCEN; /* enable RTC */
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/* RTC Start */
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RTC->ISR = RTC_ISR_INIT; /* request RTC stop */
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while((RTC->ISR & RTC_ISR_INITF)!=RTC_ISR_INITF) /* wait for stop */
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;
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RTC->PRER = 0x07f00ff;
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RTC->TR = 0;
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RTC->ISR =~ RTC_ISR_INIT; /* start RTC */
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RTC->WPR = 0; /* enable RTC write protection */
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RTC->WPR = 0;
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//disableRCCRTCWrite();
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}
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/*=======================================================================*/
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/*
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enable RTC wakeup and interrupt
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This must be executed after any reset.
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*/
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void startRTCWakeUp(void)
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{
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/* wake up time setup & start */
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//enableRCCRTCWrite();
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RTC->WPR = 0x0ca; /* disable RTC write protection */
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RTC->WPR = 0x053;
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RTC->CR &=~ RTC_CR_WUTE; /* disable wakeup timer for reprogramming */
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while((RTC->ISR & RTC_ISR_WUTWF) != RTC_ISR_WUTWF)
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;
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RTC->WUTR = 0; /* reload is 1: 1Hz with the 1Hz clock */
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RTC->CR &= ~RTC_CR_WUCKSEL; /* clear selection register */
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RTC->CR |= RTC_CR_WUCKSEL_2; /* select the 1Hz clock */
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RTC->CR |= RTC_CR_WUTE | RTC_CR_WUTIE ;
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RTC->ISR &= ~RTC_ISR_WUTF; /* clear the wake up flag... is this required? */
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/* tamper (button) detection */
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/* low level, filtered, pullup enabled, IRQ enabled, Sample Freq is 128Hz */
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RTC->TAMPCR =
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RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP3E |
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RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP2E |
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RTC_TAMPCR_TAMPPRCH_0 | RTC_TAMPCR_TAMPFLT_1 | RTC_TAMPCR_TAMPFREQ;
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/* wake up IRQ is connected to line 20 */
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EXTI->RTSR |= EXTI_RTSR_RT20; /* rising edge for wake up line */
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EXTI->IMR |= EXTI_IMR_IM20; /* interrupt enable */
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/* tamper IRQ is connected to line 19 */
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EXTI->RTSR |= EXTI_RTSR_RT19; /* rising edge for wake up line */
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EXTI->IMR |= EXTI_IMR_IM19; /* interrupt enable */
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RTC->WPR = 0; /* enable RTC write protection */
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RTC->WPR = 0;
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//disableRCCRTCWrite();
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}
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int cursor_pos = 0;
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int select_pos = 0;
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/*=======================================================================*/
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int main()
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{
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int i;
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startHSIClock();
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SystemCoreClockUpdate(); /* Update SystemCoreClock() */
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startUp();
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//SystemCoreClock = 32000000UL;
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startSysTick();
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RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
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__NOP();
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__NOP();
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/* LED output line */
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GPIOA->MODER &= ~GPIO_MODER_MODE13; /* clear mode for PA13 */
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GPIOA->MODER |= GPIO_MODER_MODE13_0; /* Output mode for PA13 */
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_13; /* Push/Pull for PA13 */
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GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED13; /* low speed for PA13 */
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD13; /* no pullup/pulldown for PA13 */
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GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr PA13 */
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GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic set PA13 */
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/* PA0, button input */
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GPIOA->MODER &= ~GPIO_MODER_MODE0; /* clear mode for PA0 */
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD0; /* no pullup/pulldown for PA0 */
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GPIOA->PUPDR |= GPIO_PUPDR_PUPD0_0; /* pullup for PA0 */
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/* PA2, button input */
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GPIOA->MODER &= ~GPIO_MODER_MODE2; /* clear mode for PA2 */
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD2; /* no pullup/pulldown for PA2 */
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GPIOA->PUPDR |= GPIO_PUPDR_PUPD2_0; /* pullup for PA2 */
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initDisplay();
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initRTC();
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startRTCWakeUp();
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NVIC_SetPriority(RTC_IRQn, 0);
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NVIC_EnableIRQ(RTC_IRQn);
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for(;;)
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{
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u8g2_ClearBuffer(&u8g2);
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rtc_register_to_bcd(&rtc);
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rtc_bcd_to_ymd_hms(&rtc);
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rtc_draw_time(&rtc, &u8g2);
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RTC->WPR = 0x0ca; /* disable RTC write protection */
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RTC->WPR = 0x053;
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RTC->TAMPCR &= ~RTC_TAMPCR_TAMP3E;
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RTC->TAMPCR &= ~RTC_TAMPCR_TAMP2E;
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__NOP(); /* add delay after disable tamper so that GPO can read the value */
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__NOP();
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if ( GPIOA->IDR & GPIO_IDR_ID0 )
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u8g2_DrawStr(&u8g2, 15, 45, "+");
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else
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u8g2_DrawStr(&u8g2, 15, 45, "-");
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if ( GPIOA->IDR & GPIO_IDR_ID2 )
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u8g2_DrawStr(&u8g2, 0, 45, "+");
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else
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u8g2_DrawStr(&u8g2, 0, 45, "-");
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RTC->TAMPCR |= RTC_TAMPCR_TAMP3E;
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RTC->TAMPCR |= RTC_TAMPCR_TAMP2E;
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RTC->WPR = 0; /* enable RTC write protection */
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RTC->WPR = 0;
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u8g2_DrawStr(&u8g2, 30,45, u8x8_u8toa(RTCIRQCount, 3));
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u8g2_DrawStr(&u8g2, 90,45, u8x8_u8toa(key_queue_start, 2));
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for( i = 0; i < 4; i++ )
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{
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if ( i == select_pos )
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u8g2_DrawBox(&u8g2, i*20+10, 50, 10, 10);
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else
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u8g2_DrawFrame(&u8g2, i*20+10, 50, 10, 10);
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if ( i == cursor_pos )
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u8g2_DrawFrame(&u8g2, i*20+10-1, 50-1, 10+2, 10+2);
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}
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u8g2_SendBuffer(&u8g2);
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delay_micro_seconds(50000);
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GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic set PA13 */
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delay_micro_seconds(50000);
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GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic clr PA13 */
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for(;;)
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{
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i = key_get();
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if ( i == KEY_NONE )
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break;
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if ( i == KEY_SELECT )
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select_pos = cursor_pos;
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if ( i == KEY_NEXT )
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cursor_pos = ( cursor_pos + 1 ) & 3;
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}
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//display_WriteUnsigned(RTC->TR);
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//display_Write("\n");
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}
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}
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