178 lines
4.2 KiB
C
178 lines
4.2 KiB
C
#include <util/delay.h>
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#include "u8x8_avr.h"
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#ifdef AVR_USE_HW_I2C
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#include <avr-hw-i2c/i2cmaster.h>
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#endif
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#ifdef AVR_USE_HW_SPI
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#ifndef SCK_DDR
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#error "SCK_DDR must be defined externally, eg: -DSCK_DDR=DDRB, for atmega328p."
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#endif
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#ifndef SCK_BIT
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#error "SCK_BIT must be defined externally, eg: -DSCK_BIT=5, for atmega328p."
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#endif
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#ifndef MOSI_DDR
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#error "MOSI_DDR must be defined externally, eg: -DMOSI_DDR=DDRB, for atmega328p."
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#endif
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#ifndef MOSI_BIT
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#error "MOSI_BIT must be defined externally, eg: -DMOSI_BIT=3, for atmega328p."
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#endif
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#endif
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#define P_CPU_NS (1000000000UL / F_CPU)
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#ifdef AVR_USE_HW_SPI
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uint8_t u8x8_byte_avr_hw_spi (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
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uint8_t *data;
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switch (msg) {
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case U8X8_MSG_BYTE_INIT:
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SCK_DDR |= _BV (SCK_BIT);
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MOSI_DDR |= _BV (MOSI_BIT);
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SPCR = (_BV (SPE) | _BV (MSTR));
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switch (u8x8->display_info->spi_mode) {
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case 0:
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break;
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case 1:
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SPCR |= _BV (CPHA);
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break;
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case 2:
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SPCR |= _BV (CPOL);
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break;
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case 3:
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SPCR |= _BV (CPOL);
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SPCR |= _BV (CPHA);
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break;
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};
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switch (F_CPU / u8x8->display_info->sck_clock_hz) {
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case 2:
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SPSR |= _BV (SPI2X);
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break;
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case 4:
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break;
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case 8:
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SPSR |= _BV (SPI2X);
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SPCR |= _BV (SPR0);
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break;
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case 16:
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SPCR |= _BV (SPR0);
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break;
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case 32:
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SPSR |= _BV (SPI2X);
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SPCR |= _BV (SPR1);
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break;
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case 64:
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SPCR |= _BV (SPR1);
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break;
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case 128:
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SPCR |= _BV (SPR1);
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SPCR |= _BV (SPR0);
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break;
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}
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u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
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break;
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case U8X8_MSG_BYTE_SET_DC:
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u8x8_gpio_SetDC(u8x8, arg_int);
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break;
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case U8X8_MSG_BYTE_START_TRANSFER:
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u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level);
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u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL);
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break;
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case U8X8_MSG_BYTE_SEND:
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data = (uint8_t *) arg_ptr;
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while (arg_int > 0) {
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SPDR = (uint8_t) * data;
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while (!(SPSR & _BV (SPIF)));
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data++;
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arg_int--;
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}
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break;
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case U8X8_MSG_BYTE_END_TRANSFER:
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u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL);
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u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
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break;
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default:
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return 0;
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}
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return 1;
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}
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#endif
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#ifdef AVR_USE_HW_I2C
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uint8_t u8x8_byte_avr_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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uint8_t *data;
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switch(msg){
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case U8X8_MSG_BYTE_SEND:
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data = (uint8_t *)arg_ptr;
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while( arg_int-- )
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i2c_write(*data++);
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break;
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case U8X8_MSG_BYTE_INIT:
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i2c_init();
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break;
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case U8X8_MSG_BYTE_SET_DC:
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/* ignored for i2c */
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break;
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case U8X8_MSG_BYTE_START_TRANSFER:
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i2c_start_wait(u8x8_GetI2CAddress(u8x8)+I2C_WRITE);
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break;
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case U8X8_MSG_BYTE_END_TRANSFER:
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i2c_stop();
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break;
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default:
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return 0;
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}
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return 1;
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}
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#endif
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uint8_t u8x8_avr_delay (u8x8_t * u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
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uint8_t cycles;
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switch(msg) {
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case U8X8_MSG_DELAY_NANO: // delay arg_int * 1 nano second
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// At 20Mhz, each cycle is 50ns, the call itself is slower.
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break;
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case U8X8_MSG_DELAY_100NANO: // delay arg_int * 100 nano seconds
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// Approximate best case values...
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#define CALL_CYCLES 26UL
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#define CALC_CYCLES 4UL
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#define RETURN_CYCLES 4UL
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#define CYCLES_PER_LOOP 4UL
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cycles = (100UL * arg_int) / (P_CPU_NS * CYCLES_PER_LOOP);
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if (cycles > CALL_CYCLES + RETURN_CYCLES + CALC_CYCLES)
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break;
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__asm__ __volatile__ (
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"1: sbiw %0,1" "\n\t" // 2 cycles
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"brne 1b":"=w" (cycles):"0" (cycles) // 2 cycles
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);
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break;
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case U8X8_MSG_DELAY_10MICRO: // delay arg_int * 10 micro seconds
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while( arg_int-- ) _delay_us(10);
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break;
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case U8X8_MSG_DELAY_MILLI: // delay arg_int * 1 milli second
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while( arg_int-- ) _delay_ms(1);
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break;
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default:
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return 0;
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}
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return 1;
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}
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