101 lines
2.3 KiB
C
101 lines
2.3 KiB
C
/*
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* lpc8xx_adc.h
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*
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* Created on: This day, August 18, 2016
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* Author: The Creator
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*/
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#ifndef LPC8XX_ADC_H_
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#define LPC8XX_ADC_H_
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// CTRL register shifters
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#define ADC_CLKDIV 0
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#define ADC_LPWRMODE 10
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#define ADC_CALMODE 30
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// Sequence A and B control register shifters
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#define ADC_CHANNELS 0
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#define ADC_TRIGGER 12
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#define ADC_TRIGPOL 18
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#define ADC_SYNCBYPASS 19
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#define ADC_START 26
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#define ADC_BURST 27
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#define ADC_SINGLESTEP 28
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#define ADC_LOWPRIO 29
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#define ADC_MODE 30
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#define ADC_SEQ_ENA 31
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// ADC hardware trigger inputs
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#define NO_TRIGGER 0
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#define PININT0_IRQ 1
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#define PININT1_IRQ 2
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#define TIM0_MAT3 5
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#define CMP0_OUT_ADC 6
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#define GPIO_INT_BMATCH 7
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#define ARM_TXEV 8
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// Threshold compare register shifters
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#define THRLOW 15
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#define THRHIGH 15
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// INTEN register shifters
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#define SEQA_INTEN 0
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#define SEQB_INTEN 1
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#define OVR_INTEN 2
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#define ADCMPINTEN0 3
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#define ADCMPINTEN1 5
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#define ADCMPINTEN2 7
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#define ADCMPINTEN3 9
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#define ADCMPINTEN4 11
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#define ADCMPINTEN5 13
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#define ADCMPINTEN6 15
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#define ADCMPINTEN7 17
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#define ADCMPINTEN8 19
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#define ADCMPINTEN9 21
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#define ADCMPINTEN10 23
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#define ADCMPINTEN11 25
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// FLAGS register shifters
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#define ADC_THCMP0 0
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#define ADC_THCMP1 1
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#define ADC_THCMP2 2
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#define ADC_THCMP3 3
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#define ADC_THCMP4 4
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#define ADC_THCMP5 5
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#define ADC_THCMP6 6
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#define ADC_THCMP7 7
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#define ADC_THCMP8 8
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#define ADC_THCMP9 9
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#define ADC_THCMP10 10
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#define ADC_THCMP11 11
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#define ADC_OVERRUN0 12
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#define ADC_OVERRUN1 13
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#define ADC_OVERRUN2 14
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#define ADC_OVERRUN3 15
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#define ADC_OVERRUN4 16
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#define ADC_OVERRUN5 17
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#define ADC_OVERRUN6 18
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#define ADC_OVERRUN7 19
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#define ADC_OVERRUN8 20
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#define ADC_OVERRUN9 21
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#define ADC_OVERRUN10 22
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#define ADC_OVERRUN11 23
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#define ADC_SEQA_OVR 24
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#define ADC_SEQB_OVR 25
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#define ADC_SEQA_INT 28
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#define ADC_SEQB_INT 29
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#define ADC_THCMP_INT 30
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#define ADC_OVR_INT 31
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// TRM register shifters
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#define ADC_VRANGE 5
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#endif /* LPC8XX_ADC_H_ */
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