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issue #1362

This commit is contained in:
kraus 2020-12-25 18:17:38 +01:00
parent 2ba22eff45
commit e1ded8eca8
17 changed files with 23 additions and 23 deletions
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2
csrc/u8x8_d_sh1106_64x32.c
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@ -51,7 +51,7 @@ static const uint8_t u8x8_d_sh1106_64x32_init_seq[] = {
U8X8_C(0x040), /* set display start line to 0, 0.42 OLED */
U8X8_CA(0xad, 0x8b), /* DC-DC ON/OFF Mode Set: Built-in DC-DC is used, Normal Display (POR = 0x8b) */
U8X8_C(0x33), /* set charge pump voltage 0x30 (POR) .. 0x33 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.66 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.66 OLED */

2
csrc/u8x8_d_sh1106_72x40.c
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@ -51,7 +51,7 @@ static const uint8_t u8x8_d_sh1106_72x40_init_seq[] = {
U8X8_C(0x040), /* set display start line to 0, 0.42 OLED */
U8X8_CA(0xad, 0x8b), /* DC-DC ON/OFF Mode Set: Built-in DC-DC is used, Normal Display (POR = 0x8b) */
U8X8_C(0x33), /* set charge pump voltage 0x30 (POR) .. 0x33 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.66 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.66 OLED */

4
csrc/u8x8_d_sh1107.c
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@ -164,7 +164,7 @@ static const uint8_t u8x8_d_sh1107_64x128_noname_init_seq[] = {
U8X8_C(0x0ae), /* display off */
U8X8_CA(0x0dc, 0x000), /* start line */
U8X8_CA(0x081, 0x02f), /* [2] set contrast control */
U8X8_C(0x020), /* use page addressing mode */
U8X8_C(0x020), /* addressing mode */
// U8X8_C(0x0a1), /* segment remap a0/a1*/
// U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
@ -246,7 +246,7 @@ static const uint8_t u8x8_d_sh1107_seeed_96x96_init_seq[] = {
//U8X8_CA(0x0a8, 0x03f), /* multiplex ratio */
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_CA(0x0dc, 0x000), /* start line */
//U8X8_CA(0x020, 0x000), /* page addressing mode */
//U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

2
csrc/u8x8_d_sh1108.c
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@ -159,7 +159,7 @@ static const uint8_t u8x8_d_sh1108_160x160_noname_init_seq[] = {
U8X8_C(0x0ae), /* display off */
U8X8_CA(0x0d5, 0x060), /* clock divide ratio and oscillator frequency */
U8X8_CA(0x0a9, 0x003), /* set display resolution, 0=64x160, 1=96x160, 2=128x160, 3=160x160 */
U8X8_C(0x020), /* use page addressing mode */
U8X8_C(0x020), /* addressing mode */
U8X8_CA(0x081, 0x01f), /* set contrast control */
U8X8_CA(0x0ad, 0x80), /* DC/DC control 80=Use external Vpp, 89=Use internal DC/DC*/
U8X8_C(0x030), /* set discharge VSL level, 0x030..0x03f */

4
csrc/u8x8_d_ssd1305.c
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@ -166,7 +166,7 @@ static const uint8_t u8x8_d_ssd1305_128x32_noname_init_seq[] = {
U8X8_CA(0x0a8, 0x03f), /* multiplex ratio */
U8X8_CA(0x0d3, 32), /* display offset to 32 */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
@ -329,7 +329,7 @@ static const uint8_t u8x8_d_ssd1305_128x64_adafruit_init_seq[] = {
U8X8_CA(0x0a8, 0x03f), /* multiplex ratio */
U8X8_CA(0x0d3, 0x040), /* display offset to 32 */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

2
csrc/u8x8_d_ssd1306_128x32.c
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@ -50,7 +50,7 @@ static const uint8_t u8x8_d_ssd1306_128x32_univision_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

6
csrc/u8x8_d_ssd1306_128x64_noname.c
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@ -50,7 +50,7 @@ static const uint8_t u8x8_d_ssd1306_128x64_noname_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, SSD1306 only, should be removed for SH1106 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
@ -87,7 +87,7 @@ static const uint8_t u8x8_d_ssd1306_128x64_vcomh0_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
@ -123,7 +123,7 @@ static const uint8_t u8x8_d_ssd1306_128x64_alt0_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, SSD1306 only, should be removed for SH1106 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

2
csrc/u8x8_d_ssd1306_2040x16.c
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@ -50,7 +50,7 @@ U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
/// according to the datasheet, 0x00 is NOT page addressing mode, but horizontal addressing mode;
/// so it looks like u8g2 expects horizontal addressing (and the inline comment is wrong) while the Winstar example
/// actually uses page addressing (which is the reset default)
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.71 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.71 OLED */

2
csrc/u8x8_d_ssd1306_48x64.c
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@ -50,7 +50,7 @@ U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
/// according to the datasheet, 0x00 is NOT page addressing mode, but horizontal addressing mode;
/// so it looks like u8g2 expects horizontal addressing (and the inline comment is wrong) while the Winstar example
/// actually uses page addressing (which is the reset default)
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.71 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.71 OLED */

4
csrc/u8x8_d_ssd1306_64x32.c
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@ -174,7 +174,7 @@ static const uint8_t u8x8_d_ssd1306_64x32_noname_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1 */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
@ -223,7 +223,7 @@ static const uint8_t u8x8_d_ssd1306_64x32_1f_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1 */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

2
csrc/u8x8_d_ssd1306_64x48.c
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@ -50,7 +50,7 @@ static const uint8_t u8x8_d_ssd1306_64x48_er_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset, 0.66 OLED */
U8X8_C(0x040), /* set display start line to 0, 0.66 OLED */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, 0.66 OLED 0x14*/
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.66 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.66 OLED */

2
csrc/u8x8_d_ssd1306_72x40.c
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@ -102,7 +102,7 @@ static const uint8_t u8x8_d_ssd1306_72x40_er_init_seq[] = {
U8X8_C(0x0a6), /* none inverted normal display mode */
U8X8_C(0x0a4), /* output ram to display */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.66 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.66 OLED */

2
csrc/u8x8_d_ssd1306_96x16.c
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@ -50,7 +50,7 @@ static const uint8_t u8x8_d_ssd1306_96x16_er_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset, 0.69 OLED */
U8X8_C(0x040), /* set display start line to 0, 0.69 OLED */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, 0.66 OLED 0x14*/
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1, 0.66 OLED */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse, 0.66 OLED */

2
csrc/u8x8_d_ssd1309.c
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@ -165,7 +165,7 @@ static const uint8_t u8x8_d_ssd1309_128x64_noname_init_seq[] = {
U8X8_CA(0x0d5, 0x0a0), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
//U8X8_CA(0x0a8, 0x03f), /* multiplex ratio */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x020, 0x002), /* page addressing mode */
U8X8_CA(0x020, 0x002), /* horizontal addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

2
csrc/u8x8_d_ssd1316.c
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@ -173,7 +173,7 @@ static const uint8_t u8x8_d_ssd1316_128x32_init_seq[] = {
U8X8_CA(0x08d, 0x015), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, */
//U8X8_CA(0x0a2, 0x000), /* set display start line to 0 */
//U8X8_CA(0x020, 0x000), /* page addressing mode */
//U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
// Flipmode

2
csrc/u8x8_d_ssd1317.c
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@ -55,7 +55,7 @@ static const uint8_t u8x8_d_ssd1317_96x96_init_seq[] = {
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_CA(0x0a2, 0x000), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, SSD1306 only, should be removed for SH1106 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
U8X8_C(0x0a0), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */

4
csrc/u8x8_d_ssd1318.c
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@ -82,7 +82,7 @@ static const uint8_t u8x8_d_ssd1318_128x96_icp_init_seq[] = {
U8X8_CA(0x0db, 0x030), /* vcomh deselect level, value from issue 784 example code */
//U8X8_CA(0x020, 0x000), /* page addressing mode */
//U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
//U8X8_C(0x02e), /* Deactivate scroll */
U8X8_C(0x0a4), /* output ram to display */
@ -127,7 +127,7 @@ static const uint8_t u8x8_d_ssd1318_128x96_xcp_init_seq[] = {
U8X8_CA(0x0db, 0x030), /* vcomh deselect level, value from issue 784 example code */
//U8X8_CA(0x020, 0x000), /* page addressing mode */
//U8X8_CA(0x020, 0x000), /* horizontal addressing mode */
//U8X8_C(0x02e), /* Deactivate scroll */
U8X8_C(0x0a4), /* output ram to display */