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Renames sck_clock_mode -> spi_mode. Implemented SPI modes for HW SPI.

This commit is contained in:
Bas Stottelaar 2016-07-26 20:38:55 +02:00
parent 42e08abd5a
commit cf846d814d
18 changed files with 37 additions and 37 deletions
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8
cppsrc/U8x8lib.cpp
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@ -156,7 +156,7 @@ extern "C" uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uin
{
uint8_t i, b;
uint8_t *data;
uint8_t takeover_edge = u8x8_GetSckTakeoverEdge(u8x8);
uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8);
uint8_t not_takeover_edge = 1 - takeover_edge;
/* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */
@ -213,7 +213,7 @@ extern "C" uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uin
/* no wait required here */
/* for SPI: setup correct level of the clock signal */
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSckTakeoverEdge(u8x8));
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8));
break;
case U8X8_MSG_BYTE_SET_DC:
u8x8_gpio_SetDC(u8x8, arg_int);
@ -282,7 +282,7 @@ extern "C" uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8g2, uint8_t msg, uint8_t a
/* for SPI: setup correct level of the clock signal */
pinMode(11, OUTPUT);
pinMode(13, OUTPUT);
digitalWrite(13, u8x8_GetSckTakeoverEdge(u8g2_GetU8x8(u8g2)));
digitalWrite(13, u8x8_GetSPIClockPhase(u8g2_GetU8x8(u8g2)));
break;
case U8X8_MSG_BYTE_SET_DC:
@ -298,7 +298,7 @@ extern "C" uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8g2, uint8_t msg, uint8_t a
SPI.setClockDivider( SPI_CLOCK_DIV4 );
else
SPI.setClockDivider( SPI_CLOCK_DIV8 );
SPI.setDataMode(SPI_MODE0);
SPI.setDataMode(u8g2->display_info->spi_mode);
SPI.setBitOrder(MSBFIRST);
u8x8_gpio_SetCS(u8g2, u8g2->display_info->chip_enable_level);

6
csrc/u8x8.h
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@ -217,7 +217,7 @@ struct u8x8_display_info_struct
/* 2: clock active low, data out on rising edge */
/* 3: clock active low, data out on falling edge */
/* most displays have clock mode 1 */
uint8_t sck_clock_mode;
uint8_t spi_mode;
/* == I2C == */
uint8_t i2c_bus_clock_100kHz; /* UC1601: 1000000000/275 = 37 *100k */
@ -317,8 +317,8 @@ struct u8x8_struct
#define u8x8_GetRows(u8x8) ((u8x8)->display_info->tile_height)
#define u8x8_GetI2CAddress(u8x8) ((u8x8)->i2c_address)
#define u8x8_SetGPIOResult(u8x8, val) ((u8x8)->gpio_result = (val))
#define u8x8_GetSckTakeoverEdge(u8x8) ((u8x8)->display_info->sck_clock_mode & 0x01)
#define u8x8_GetSckPolarity(u8x8) (((u8x8)->display_info->sck_clock_mode & 0x10) >> 1)
#define u8x8_GetSPIClockPhase(u8x8) ((u8x8)->display_info->spi_mode & 0x01)
#define u8x8_GetSPIClockPolarity(u8x8) (((u8x8)->display_info->spi_mode & 0x10) >> 1)
#ifdef U8X8_USE_PINS

14
csrc/u8x8_byte.c
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@ -66,7 +66,7 @@ uint8_t u8x8_byte_EndTransfer(u8x8_t *u8x8)
Uses:
u8x8->display_info->sda_setup_time_ns
u8x8->display_info->sck_pulse_width_ns
u8x8->display_info->sck_clock_mode
u8x8->display_info->spi_mode
u8x8->display_info->chip_disable_level
u8x8->display_info->chip_enable_level
u8x8->display_info->post_chip_enable_wait_ns
@ -89,7 +89,7 @@ uint8_t u8x8_byte_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void
{
uint8_t i, b;
uint8_t *data;
uint8_t takeover_edge = u8x8_GetSckTakeoverEdge(u8x8);
uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8);
uint8_t not_takeover_edge = 1 - takeover_edge;
switch(msg)
@ -123,7 +123,7 @@ uint8_t u8x8_byte_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void
/* no wait required here */
/* for SPI: setup correct level of the clock signal */
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSckTakeoverEdge(u8x8));
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8));
break;
case U8X8_MSG_BYTE_SET_DC:
u8x8_gpio_SetDC(u8x8, arg_int);
@ -250,7 +250,7 @@ uint8_t u8x8_byte_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void
{
uint8_t i;
uint8_t *data;
uint8_t takeover_edge = u8x8_GetSckTakeoverEdge(u8x8);
uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8);
uint8_t not_takeover_edge = 1 - takeover_edge;
uint16_t b;
static uint8_t last_dc;
@ -288,7 +288,7 @@ uint8_t u8x8_byte_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void
/* no wait required here */
/* for SPI: setup correct level of the clock signal */
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSckTakeoverEdge(u8x8));
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8));
break;
case U8X8_MSG_BYTE_SET_DC:
last_dc = arg_int;
@ -314,7 +314,7 @@ uint8_t u8x8_byte_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void
static void u8x8_byte_st7920_send_byte(u8x8_t *u8x8, uint8_t b) U8X8_NOINLINE;
static void u8x8_byte_st7920_send_byte(u8x8_t *u8x8, uint8_t b)
{
uint8_t takeover_edge = u8x8_GetSckTakeoverEdge(u8x8);
uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8);
uint8_t not_takeover_edge = 1 - takeover_edge;
uint8_t cnt;
@ -376,7 +376,7 @@ uint8_t u8x8_byte_st7920_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void
/* no wait required here */
/* for SPI: setup correct level of the clock signal */
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSckTakeoverEdge(u8x8));
u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8));
break;
case U8X8_MSG_BYTE_SET_DC:
last_dc = arg_int;

2
csrc/u8x8_d_ld7032_60x32.c
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@ -181,7 +181,7 @@ static const u8x8_display_info_t u8x8_ld7032_60x32_display_info =
/* post_reset_wait_ms = */ 100,
/* sda_setup_time_ns = */ 30, /* 20ns, but cycle time is 60ns, so use 60/2 */
/* sck_pulse_width_ns = */ 30, /* 20ns, but cycle time is 60ns, so use 60/2 */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 20,
/* write_pulse_width_ns = */ 40,

2
csrc/u8x8_d_ls013b7dh03.c
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@ -54,7 +54,7 @@ static const u8x8_display_info_t u8x8_ls013b7dh03_128x128_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 227, /* 227 nsec according to the datasheet */
/* sck_pulse_width_ns = */ 255, /* 450 nsec according to the datasheet */
/* sck_clock_mode = */ 3, /* active low, rising edge */
/* spi_mode = */ 3, /* active low, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 100,
/* write_pulse_width_ns = */ 100,

2
csrc/u8x8_d_ssd1306_128x32.c
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@ -188,7 +188,7 @@ static const u8x8_display_info_t u8x8_ssd1306_128x32_univision_display_info =
/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
/* sda_setup_time_ns = */ 50, /* SSD1306: 15ns, but cycle time is 100ns, so use 100/2 */
/* sck_pulse_width_ns = */ 50, /* SSD1306: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 40,
/* write_pulse_width_ns = */ 150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */

4
csrc/u8x8_d_ssd1306_128x64_noname.c
View File

@ -188,7 +188,7 @@ static const u8x8_display_info_t u8x8_ssd1306_128x64_noname_display_info =
/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
/* sda_setup_time_ns = */ 50, /* SSD1306: 15ns, but cycle time is 100ns, so use 100/2 */
/* sck_pulse_width_ns = */ 50, /* SSD1306: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 40,
/* write_pulse_width_ns = */ 150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */
@ -222,7 +222,7 @@ static const u8x8_display_info_t u8x8_sh1106_128x64_noname_display_info =
/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
/* sda_setup_time_ns = */ 50, /* SSD1306: 15ns, but cycle time is 100ns, so use 100/2 */
/* sck_pulse_width_ns = */ 50, /* SSD1306: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 40,
/* write_pulse_width_ns = */ 150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */

2
csrc/u8x8_d_ssd1322.c
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@ -198,7 +198,7 @@ static const u8x8_display_info_t u8x8_ssd1322_256x64_display_info =
/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
/* sda_setup_time_ns = */ 50, /* SSD1322: 15ns, but cycle time is 100ns, so use 100/2 */
/* sck_pulse_width_ns = */ 50, /* SSD1322: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 10,
/* write_pulse_width_ns = */ 150, /* SSD1322: cycle time is 300ns, so use 300/2 = 150 */

4
csrc/u8x8_d_st7565.c
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@ -81,7 +81,7 @@ static const u8x8_display_info_t u8x8_st7565_128x64_display_info =
/* post_reset_wait_ms = */ 1,
/* sda_setup_time_ns = */ 50, /* st7565 datasheet, table 26, tsds */
/* sck_pulse_width_ns = */ 120, /* half of cycle time (100ns according to datasheet), AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 40, /* st7565 datasheet, table 24, tds8 */
/* write_pulse_width_ns = */ 80, /* st7565 datasheet, table 24, tcclw */
@ -104,7 +104,7 @@ static const u8x8_display_info_t u8x8_st7565_128x32_display_info =
/* post_reset_wait_ms = */ 1,
/* sda_setup_time_ns = */ 50, /* st7565 datasheet, table 26, tsds */
/* sck_pulse_width_ns = */ 120, /* half of cycle time (100ns according to datasheet), AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 40, /* st7565 datasheet, table 24, tds8 */
/* write_pulse_width_ns = */ 80, /* st7565 datasheet, table 24, tcclw */

4
csrc/u8x8_d_st7920.c
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@ -156,7 +156,7 @@ static const u8x8_display_info_t u8x8_st7920_192x32_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 20,
/* sck_pulse_width_ns = */ 140, /* datasheet ST7920 */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 30,
/* write_pulse_width_ns = */ 40,
@ -179,7 +179,7 @@ static const u8x8_display_info_t u8x8_st7920_128x64_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 20,
/* sck_pulse_width_ns = */ 140, /* datasheet ST7920 */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 30,
/* write_pulse_width_ns = */ 40,

6
csrc/u8x8_d_t6963.c
View File

@ -134,7 +134,7 @@ static const u8x8_display_info_t u8x8_t6963_240x128_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 20,
/* sck_pulse_width_ns = */ 140,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 80,
/* write_pulse_width_ns = */ 80,
@ -220,7 +220,7 @@ static const u8x8_display_info_t u8x8_t6963_256x64_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 20,
/* sck_pulse_width_ns = */ 140,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 80,
/* write_pulse_width_ns = */ 80,
@ -302,7 +302,7 @@ static const u8x8_display_info_t u8x8_t6963_128x64_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 20,
/* sck_pulse_width_ns = */ 140,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 80,
/* write_pulse_width_ns = */ 80,

2
csrc/u8x8_d_uc1701_dogs102.c
View File

@ -107,7 +107,7 @@ static const u8x8_display_info_t u8x8_uc1701_display_info =
/* post_reset_wait_ms = */ 6,
/* sda_setup_time_ns = */ 12,
/* sck_pulse_width_ns = */ 75, /* half of cycle time (100ns according to datasheet), AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
/* sck_clock_mode = */ 1, /* active high, rising edge */
/* spi_mode = */ 1, /* active high, rising edge */
/* i2c_bus_clock_100kHz = */ 4,
/* data_setup_time_ns = */ 30,
/* write_pulse_width_ns = */ 40,

4
sys/arduino/test/test.ino
View File

@ -74,7 +74,7 @@ uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8g2, uint8_t msg, uint8_t arg_int, voi
/* no wait required here */
/* for SPI: setup correct level of the clock signal */
digitalWrite(13, u8x8_GetSckTakeoverEdge(u8g2_GetU8x8(u8g2)));
digitalWrite(13, u8x8_GetSPIClockPhase(u8g2_GetU8x8(u8g2)));
break;
case U8X8_MSG_BYTE_SET_DC:
u8x8_gpio_SetDC(u8g2, arg_int);
@ -82,7 +82,7 @@ uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8g2, uint8_t msg, uint8_t arg_int, voi
case U8X8_MSG_BYTE_START_TRANSFER:
SPI.begin();
SPI.setClockDivider( SPI_CLOCK_DIV2 );
SPI.setDataMode(SPI_MODE0);
SPI.setDataMode(u8g2->display_info->spi_mode);
SPI.setBitOrder(MSBFIRST);
u8x8_gpio_SetCS(u8g2, u8g2->display_info->chip_enable_level);

4
sys/arduino/text/text.ino
View File

@ -273,7 +273,7 @@ uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8g2, uint8_t msg, uint8_t arg_int, voi
/* no wait required here */
/* for SPI: setup correct level of the clock signal */
digitalWrite(13, u8x8_GetSckTakeoverEdge(u8g2_GetU8x8(u8g2)));
digitalWrite(13, u8x8_GetSPIClockPhase(u8g2_GetU8x8(u8g2)));
break;
case U8X8_MSG_BYTE_SET_DC:
u8x8_gpio_SetDC(u8g2, arg_int);
@ -281,7 +281,7 @@ uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8g2, uint8_t msg, uint8_t arg_int, voi
case U8X8_MSG_BYTE_START_TRANSFER:
SPI.begin();
SPI.setClockDivider( SPI_CLOCK_DIV2 );
SPI.setDataMode(SPI_MODE0);
SPI.setDataMode(u8g2->display_info->spi_mode);
SPI.setBitOrder(MSBFIRST);
u8x8_gpio_SetCS(u8g2, u8g2->display_info->chip_enable_level);

2
sys/sdl/common/u8x8_d_sdl_128x64.c
View File

@ -194,7 +194,7 @@ static const u8x8_display_info_t u8x8_sdl_128x64_info =
/* post_reset_wait_ms = */ 0,
/* sda_setup_time_ns = */ 0,
/* sck_pulse_width_ns = */ 0,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 0,
/* data_setup_time_ns = */ 0,
/* write_pulse_width_ns = */ 0,

4
sys/tga/common/u8x8_d_tga.c
View File

@ -201,7 +201,7 @@ static const u8x8_display_info_t u8x8_tga_desc_info =
/* post_reset_wait_ms = */ 0,
/* sda_setup_time_ns = */ 0,
/* sck_pulse_width_ns = */ 0,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 0,
/* data_setup_time_ns = */ 0,
/* write_pulse_width_ns = */ 0,
@ -306,7 +306,7 @@ static const u8x8_display_info_t u8x8_tga_lcd_info =
/* post_reset_wait_ms = */ 0,
/* sda_setup_time_ns = */ 0,
/* sck_pulse_width_ns = */ 0,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 0,
/* data_setup_time_ns = */ 0,
/* write_pulse_width_ns = */ 0,

2
sys/utf8/common/u8x8_d_utf8.c
View File

@ -143,7 +143,7 @@ static const u8x8_display_info_t u8x8_utf8_info =
/* post_reset_wait_ms = */ 0,
/* sda_setup_time_ns = */ 0,
/* sck_pulse_width_ns = */ 0,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 0,
/* data_setup_time_ns = */ 0,
/* write_pulse_width_ns = */ 0,

2
tools/font/build/u8g2_d_tga.c
View File

@ -184,7 +184,7 @@ static const u8x8_display_info_t u8x8_tga_info =
/* post_reset_wait_ms = */ 0,
/* sda_setup_time_ns = */ 0,
/* sck_pulse_width_ns = */ 0,
/* sck_clock_mode = */ 1,
/* spi_mode = */ 1,
/* i2c_bus_clock_100kHz = */ 0,
/* data_setup_time_ns = */ 0,
/* write_pulse_width_ns = */ 0,