diff --git a/sys/arm-linux/tools/codebuild/Makefile b/sys/arm-linux/tools/codebuild/Makefile
index d4b5d5aa..60ae0049 100644
--- a/sys/arm-linux/tools/codebuild/Makefile
+++ b/sys/arm-linux/tools/codebuild/Makefile
@@ -17,6 +17,8 @@ codebuild: $(SRC)
 	sed -n '/\/\* display_controller_list_start \*\//,/\/\* display_controller_list_end \*\//{p;}'  ../../../../tools/codebuild/codebuild.c | sed '1d;$d' > controller_list.txt
 	sed -i '/\/\* display_controller_list_start \*\// r controller_list.txt' ./codebuild.c
 	rm controller_list.txt
+
+	# Remove the extra line /* display_controller_list_end */
 	sed -i '0,/\/\* display_controller_list_end \*\// s///' ./codebuild.c
 	sed -i 'N;s/\n\/\* display_controller_list_end \*\//\/\* display_controller_list_end \*\//' ./codebuild.c
 
diff --git a/sys/rt-thread/port/U8g2lib.h b/sys/rt-thread/port/U8g2lib.h
index 4e68bc57..7b88fd91 100644
--- a/sys/rt-thread/port/U8g2lib.h
+++ b/sys/rt-thread/port/U8g2lib.h
@@ -2497,6 +2497,144 @@ class U8G2_SH1107_SEEED_96X96_F_HW_I2C : public U8G2 {
   }
 };
 #endif
+class U8G2_SH1107_128X80_1_4W_SW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_SH1107_128X80_1_4W_HW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_SH1107_128X80_1_3W_SW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_SH1107_128X80_1_6800 : public U8G2 {
+  public: U8G2_SH1107_128X80_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SH1107_128X80_1_8080 : public U8G2 {
+  public: U8G2_SH1107_128X80_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SH1107_128X80_2_4W_SW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_SH1107_128X80_2_4W_HW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_SH1107_128X80_2_3W_SW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_SH1107_128X80_2_6800 : public U8G2 {
+  public: U8G2_SH1107_128X80_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SH1107_128X80_2_8080 : public U8G2 {
+  public: U8G2_SH1107_128X80_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SH1107_128X80_F_4W_SW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_SH1107_128X80_F_4W_HW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_SH1107_128X80_F_3W_SW_SPI : public U8G2 {
+  public: U8G2_SH1107_128X80_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_SH1107_128X80_F_6800 : public U8G2 {
+  public: U8G2_SH1107_128X80_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SH1107_128X80_F_8080 : public U8G2 {
+  public: U8G2_SH1107_128X80_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_128x80_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SH1107_128X80_1_SW_I2C : public U8G2 {
+  public: U8G2_SH1107_128X80_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_i2c_128x80_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_SH1107_128X80_1_HW_I2C : public U8G2 {
+  public: U8G2_SH1107_128X80_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_i2c_128x80_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_SH1107_128X80_2_SW_I2C : public U8G2 {
+  public: U8G2_SH1107_128X80_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_i2c_128x80_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_SH1107_128X80_2_HW_I2C : public U8G2 {
+  public: U8G2_SH1107_128X80_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_i2c_128x80_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_SH1107_128X80_F_SW_I2C : public U8G2 {
+  public: U8G2_SH1107_128X80_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_i2c_128x80_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_SH1107_128X80_F_HW_I2C : public U8G2 {
+  public: U8G2_SH1107_128X80_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_sh1107_i2c_128x80_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8G2_SH1107_128X128_1_4W_SW_SPI : public U8G2 {
   public: U8G2_SH1107_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
     u8g2_Setup_sh1107_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -3463,6 +3601,144 @@ class U8G2_SSD1306_128X32_WINSTAR_F_HW_I2C : public U8G2 {
   }
 };
 #endif
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_4W_SW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_4W_HW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_3W_SW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_6800 : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_8080 : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_4W_SW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_4W_HW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_3W_SW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_6800 : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_8080 : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_4W_SW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_4W_HW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_3W_SW_SPI : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_6800 : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_8080 : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_SW_I2C : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_i2c_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_SSD1306_102X64_EA_OLEDS102_1_HW_I2C : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_i2c_102x64_ea_oleds102_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_SW_I2C : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_i2c_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_SSD1306_102X64_EA_OLEDS102_2_HW_I2C : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_i2c_102x64_ea_oleds102_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_SW_I2C : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_i2c_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_SSD1306_102X64_EA_OLEDS102_F_HW_I2C : public U8G2 {
+  public: U8G2_SSD1306_102X64_EA_OLEDS102_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_ssd1306_i2c_102x64_ea_oleds102_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8G2_SH1106_128X32_VISIONOX_1_4W_SW_SPI : public U8G2 {
   public: U8G2_SH1106_128X32_VISIONOX_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
     u8g2_Setup_sh1106_128x32_visionox_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -6613,6 +6889,78 @@ class U8G2_LD7032_60X32_ALT_F_HW_I2C : public U8G2 {
   }
 };
 #endif
+class U8G2_ST7920_256X32_1_8080 : public U8G2 {
+  public: U8G2_ST7920_256X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_p_256x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7920_256X32_2_8080 : public U8G2 {
+  public: U8G2_ST7920_256X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_p_256x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7920_256X32_F_8080 : public U8G2 {
+  public: U8G2_ST7920_256X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_p_256x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7920_256X32_1_6800 : public U8G2 {
+  public: U8G2_ST7920_256X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_256x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7920_256X32_2_6800 : public U8G2 {
+  public: U8G2_ST7920_256X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_256x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7920_256X32_F_6800 : public U8G2 {
+  public: U8G2_ST7920_256X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_256x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7920_256X32_1_SW_SPI : public U8G2 {
+  public: U8G2_ST7920_256X32_1_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_s_256x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_ST7920_256X32_1_HW_SPI : public U8G2 {
+  public: U8G2_ST7920_256X32_1_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_s_256x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset);
+  }
+};
+class U8G2_ST7920_256X32_2_SW_SPI : public U8G2 {
+  public: U8G2_ST7920_256X32_2_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_s_256x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_ST7920_256X32_2_HW_SPI : public U8G2 {
+  public: U8G2_ST7920_256X32_2_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_s_256x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset);
+  }
+};
+class U8G2_ST7920_256X32_F_SW_SPI : public U8G2 {
+  public: U8G2_ST7920_256X32_F_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_s_256x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_ST7920_256X32_F_HW_SPI : public U8G2 {
+  public: U8G2_ST7920_256X32_F_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7920_s_256x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset);
+  }
+};
 class U8G2_ST7920_192X32_1_8080 : public U8G2 {
   public: U8G2_ST7920_192X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
     u8g2_Setup_st7920_p_192x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
@@ -7987,6 +8335,144 @@ class U8G2_UC1608_240X128_F_HW_I2C : public U8G2 {
   }
 };
 #endif
+class U8G2_UC1609_SLG19264_1_4W_SW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_UC1609_SLG19264_1_4W_HW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_UC1609_SLG19264_1_3W_SW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_1_6800 : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_1_8080 : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_2_4W_SW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_UC1609_SLG19264_2_4W_HW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_UC1609_SLG19264_2_3W_SW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_2_6800 : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_2_8080 : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_F_4W_SW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_UC1609_SLG19264_F_4W_HW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_UC1609_SLG19264_F_3W_SW_SPI : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_F_6800 : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_F_8080 : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_slg19264_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_UC1609_SLG19264_1_SW_I2C : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_i2c_slg19264_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_UC1609_SLG19264_1_HW_I2C : public U8G2 {
+  public: U8G2_UC1609_SLG19264_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_i2c_slg19264_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_UC1609_SLG19264_2_SW_I2C : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_i2c_slg19264_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_UC1609_SLG19264_2_HW_I2C : public U8G2 {
+  public: U8G2_UC1609_SLG19264_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_i2c_slg19264_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_UC1609_SLG19264_F_SW_I2C : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_i2c_slg19264_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_UC1609_SLG19264_F_HW_I2C : public U8G2 {
+  public: U8G2_UC1609_SLG19264_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_uc1609_i2c_slg19264_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8G2_UC1638_160X128_1_4W_SW_SPI : public U8G2 {
   public: U8G2_UC1638_160X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
     u8g2_Setup_uc1638_160x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -11761,6 +12247,126 @@ class U8G2_ST7571_128X128_F_HW_I2C : public U8G2 {
   }
 };
 #endif
+class U8G2_ST7571_128X96_1_4W_SW_SPI : public U8G2 {
+  public: U8G2_ST7571_128X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_ST7571_128X96_1_4W_HW_SPI : public U8G2 {
+  public: U8G2_ST7571_128X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_ST7571_128X96_1_6800 : public U8G2 {
+  public: U8G2_ST7571_128X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7571_128X96_1_8080 : public U8G2 {
+  public: U8G2_ST7571_128X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7571_128X96_2_4W_SW_SPI : public U8G2 {
+  public: U8G2_ST7571_128X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_ST7571_128X96_2_4W_HW_SPI : public U8G2 {
+  public: U8G2_ST7571_128X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_ST7571_128X96_2_6800 : public U8G2 {
+  public: U8G2_ST7571_128X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7571_128X96_2_8080 : public U8G2 {
+  public: U8G2_ST7571_128X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7571_128X96_F_4W_SW_SPI : public U8G2 {
+  public: U8G2_ST7571_128X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_ST7571_128X96_F_4W_HW_SPI : public U8G2 {
+  public: U8G2_ST7571_128X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_ST7571_128X96_F_6800 : public U8G2 {
+  public: U8G2_ST7571_128X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7571_128X96_F_8080 : public U8G2 {
+  public: U8G2_ST7571_128X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_128x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_ST7571_128X96_1_SW_I2C : public U8G2 {
+  public: U8G2_ST7571_128X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_i2c_128x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_ST7571_128X96_1_HW_I2C : public U8G2 {
+  public: U8G2_ST7571_128X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_i2c_128x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_ST7571_128X96_2_SW_I2C : public U8G2 {
+  public: U8G2_ST7571_128X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_i2c_128x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_ST7571_128X96_2_HW_I2C : public U8G2 {
+  public: U8G2_ST7571_128X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_i2c_128x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
+class U8G2_ST7571_128X96_F_SW_I2C : public U8G2 {
+  public: U8G2_ST7571_128X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_i2c_128x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8G2_ST7571_128X96_F_HW_I2C : public U8G2 {
+  public: U8G2_ST7571_128X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_st7571_i2c_128x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8G2_ST7586S_S028HN118A_1_4W_SW_SPI : public U8G2 {
   public: U8G2_ST7586S_S028HN118A_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
     u8g2_Setup_st7586s_s028hn118a_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -15169,7 +15775,84 @@ class U8G2_S1D15721_240X64_F_8080 : public U8G2 {
     u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
   }
 };
-
-#endif /* U8X8_USE_PINS */
+class U8G2_GU800_128X64_1_4W_SW_SPI : public U8G2 {
+  public: U8G2_GU800_128X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_GU800_128X64_1_4W_HW_SPI : public U8G2 {
+  public: U8G2_GU800_128X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_GU800_128X64_1_6800 : public U8G2 {
+  public: U8G2_GU800_128X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_GU800_128X64_1_8080 : public U8G2 {
+  public: U8G2_GU800_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_GU800_128X64_2_4W_SW_SPI : public U8G2 {
+  public: U8G2_GU800_128X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_GU800_128X64_2_4W_HW_SPI : public U8G2 {
+  public: U8G2_GU800_128X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_GU800_128X64_2_6800 : public U8G2 {
+  public: U8G2_GU800_128X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_GU800_128X64_2_8080 : public U8G2 {
+  public: U8G2_GU800_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_GU800_128X64_F_4W_SW_SPI : public U8G2 {
+  public: U8G2_GU800_128X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8G2_GU800_128X64_F_4W_HW_SPI : public U8G2 {
+  public: U8G2_GU800_128X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8G2_GU800_128X64_F_6800 : public U8G2 {
+  public: U8G2_GU800_128X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8G2_GU800_128X64_F_8080 : public U8G2 {
+  public: U8G2_GU800_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() {
+    u8g2_Setup_gu800_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+#endif // U8X8_USE_PINS
 
 #endif /* _U8G2LIB_HH */
diff --git a/sys/rt-thread/port/U8x8lib.h b/sys/rt-thread/port/U8x8lib.h
index 34b5a21d..c0657e62 100644
--- a/sys/rt-thread/port/U8x8lib.h
+++ b/sys/rt-thread/port/U8x8lib.h
@@ -289,6 +289,7 @@ class U8X8_NULL : public U8X8 {
   }
 };
 
+
 /* generated code (codebuild), u8g2 project */
 class U8X8_SSD1305_128X32_NONAME_4W_SW_SPI : public U8X8 {
   public: U8X8_SSD1305_128X32_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
@@ -988,6 +989,52 @@ class U8X8_SH1107_SEEED_96X96_HW_I2C : public U8X8 {
   }
 };
 #endif
+class U8X8_SH1107_128X80_4W_SW_SPI : public U8X8 {
+  public: U8X8_SH1107_128X80_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8X8_SH1107_128X80_4W_HW_SPI : public U8X8 {
+  public: U8X8_SH1107_128X80_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8X8_SH1107_128X80_3W_SW_SPI : public U8X8 {
+  public: U8X8_SH1107_128X80_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8X8_SH1107_128X80_6800 : public U8X8 {
+  public: U8X8_SH1107_128X80_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_SH1107_128X80_8080 : public U8X8 {
+  public: U8X8_SH1107_128X80_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_SH1107_128X80_SW_I2C : public U8X8 {
+  public: U8X8_SH1107_128X80_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8X8_SH1107_128X80_HW_I2C : public U8X8 {
+  public: U8X8_SH1107_128X80_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x80, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8X8_SH1107_128X128_4W_SW_SPI : public U8X8 {
   public: U8X8_SH1107_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
     u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -1310,6 +1357,52 @@ class U8X8_SSD1306_128X32_WINSTAR_HW_I2C : public U8X8 {
   }
 };
 #endif
+class U8X8_SSD1306_102X64_EA_OLEDS102_4W_SW_SPI : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8X8_SSD1306_102X64_EA_OLEDS102_4W_HW_SPI : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8X8_SSD1306_102X64_EA_OLEDS102_3W_SW_SPI : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8X8_SSD1306_102X64_EA_OLEDS102_6800 : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_SSD1306_102X64_EA_OLEDS102_8080 : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_SSD1306_102X64_EA_OLEDS102_SW_I2C : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8X8_SSD1306_102X64_EA_OLEDS102_HW_I2C : public U8X8 {
+  public: U8X8_SSD1306_102X64_EA_OLEDS102_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_ssd1306_102x64_ea_oleds102, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8X8_SH1106_128X32_VISIONOX_4W_SW_SPI : public U8X8 {
   public: U8X8_SH1106_128X32_VISIONOX_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
     u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -2360,6 +2453,30 @@ class U8X8_LD7032_60X32_ALT_HW_I2C : public U8X8 {
   }
 };
 #endif
+class U8X8_ST7920_256X32_8080 : public U8X8 {
+  public: U8X8_ST7920_256X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7920_256x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_ST7920_256X32_6800 : public U8X8 {
+  public: U8X8_ST7920_256X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7920_256x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_ST7920_256X32_SW_SPI : public U8X8 {
+  public: U8X8_ST7920_256X32_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7920_256x32, u8x8_cad_st7920_spi, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8X8_ST7920_256X32_HW_SPI : public U8X8 {
+  public: U8X8_ST7920_256X32_HW_SPI(uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7920_256x32, u8x8_cad_st7920_spi, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset);
+  }
+};
 class U8X8_ST7920_192X32_8080 : public U8X8 {
   public: U8X8_ST7920_192X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
     u8x8_Setup(getU8x8(), u8x8_d_st7920_192x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
@@ -2818,6 +2935,52 @@ class U8X8_UC1608_240X128_HW_I2C : public U8X8 {
   }
 };
 #endif
+class U8X8_UC1609_SLG19264_4W_SW_SPI : public U8X8 {
+  public: U8X8_UC1609_SLG19264_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8X8_UC1609_SLG19264_4W_HW_SPI : public U8X8 {
+  public: U8X8_UC1609_SLG19264_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8X8_UC1609_SLG19264_3W_SW_SPI : public U8X8 {
+  public: U8X8_UC1609_SLG19264_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset);
+  }
+};
+class U8X8_UC1609_SLG19264_6800 : public U8X8 {
+  public: U8X8_UC1609_SLG19264_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_UC1609_SLG19264_8080 : public U8X8 {
+  public: U8X8_UC1609_SLG19264_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_UC1609_SLG19264_SW_I2C : public U8X8 {
+  public: U8X8_UC1609_SLG19264_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8X8_UC1609_SLG19264_HW_I2C : public U8X8 {
+  public: U8X8_UC1609_SLG19264_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_uc1609_slg19264, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8X8_UC1638_160X128_4W_SW_SPI : public U8X8 {
   public: U8X8_UC1638_160X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
     u8x8_Setup(getU8x8(), u8x8_d_uc1638_160x128, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -4076,6 +4239,46 @@ class U8X8_ST7571_128X128_HW_I2C : public U8X8 {
   }
 };
 #endif
+class U8X8_ST7571_128X96_4W_SW_SPI : public U8X8 {
+  public: U8X8_ST7571_128X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7571_128x96, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8X8_ST7571_128X96_4W_HW_SPI : public U8X8 {
+  public: U8X8_ST7571_128X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7571_128x96, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8X8_ST7571_128X96_6800 : public U8X8 {
+  public: U8X8_ST7571_128X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7571_128x96, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_ST7571_128X96_8080 : public U8X8 {
+  public: U8X8_ST7571_128X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7571_128x96, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_ST7571_128X96_SW_I2C : public U8X8 {
+  public: U8X8_ST7571_128X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7571_128x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_SW_I2C(getU8x8(), clock,  data,  reset);
+  }
+};
+#if defined U8G2_USE_HW_I2C
+class U8X8_ST7571_128X96_HW_I2C : public U8X8 {
+  public: U8X8_ST7571_128X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_st7571_128x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data);
+  }
+};
+#endif
 class U8X8_ST7586S_S028HN118A_4W_SW_SPI : public U8X8 {
   public: U8X8_ST7586S_S028HN118A_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
     u8x8_Setup(getU8x8(), u8x8_d_st7586s_s028hn118a, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
@@ -5212,7 +5415,32 @@ class U8X8_S1D15721_240X64_8080 : public U8X8 {
     u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
   }
 };
-
+class U8X8_GU800_128X64_4W_SW_SPI : public U8X8 {
+  public: U8X8_GU800_128X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_gu800_128x64, u8x8_gu800_cad_110, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset);
+  }
+};
+#if defined U8G2_USE_HW_SPI
+class U8X8_GU800_128X64_4W_HW_SPI : public U8X8 {
+  public: U8X8_GU800_128X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_gu800_128x64, u8x8_gu800_cad_110, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset);
+  }
+};
+#endif
+class U8X8_GU800_128X64_6800 : public U8X8 {
+  public: U8X8_GU800_128X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_gu800_128x64, u8x8_gu800_cad_110, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
+class U8X8_GU800_128X64_8080 : public U8X8 {
+  public: U8X8_GU800_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() {
+    u8x8_Setup(getU8x8(), u8x8_d_gu800_128x64, u8x8_gu800_cad_110, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread);
+    u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset);
+  }
+};
 #endif // U8X8_USE_PINS
 
 #endif // U8X8LIB_HH
diff --git a/sys/rt-thread/tools/Makefile b/sys/rt-thread/tools/Makefile
deleted file mode 100644
index 59f2014a..00000000
--- a/sys/rt-thread/tools/Makefile
+++ /dev/null
@@ -1,20 +0,0 @@
-# 
-# U8g2 codebuilder
-# 
-
-CFLAGS = -g -Wall 
-#CFLAGS = -O4 -Wall
-
-SRC = codebuild.c
-
-OBJ = $(SRC:.c=.o)
-
-codebuild: $(SRC)
-	$(CC) -Wall -g $(LDFLAGS) $(SRC) -o codebuild
-
-clean:	
-	-rm ./codebuild
-
-build: codebuild
-	./codebuild
-	
\ No newline at end of file
diff --git a/sys/rt-thread/tools/codebuild/.gitignore b/sys/rt-thread/tools/codebuild/.gitignore
new file mode 100644
index 00000000..dd0b11d2
--- /dev/null
+++ b/sys/rt-thread/tools/codebuild/.gitignore
@@ -0,0 +1,6 @@
+codebuild
+u8g2*
+u8x8*
+*.o
+*.md
+*.h
diff --git a/sys/rt-thread/tools/codebuild/Makefile b/sys/rt-thread/tools/codebuild/Makefile
new file mode 100644
index 00000000..60ae0049
--- /dev/null
+++ b/sys/rt-thread/tools/codebuild/Makefile
@@ -0,0 +1,48 @@
+# 
+# U8g2 codebuilder
+# 
+
+CFLAGS = -g -Wall 
+#CFLAGS = -O4 -Wall
+
+SRC = codebuild.c
+
+OBJ = $(SRC:.c=.o)
+
+codebuild: $(SRC)
+	# Remove previous controller_list
+	sed -i '/\/\* display_controller_list_start \*\//,/\/\* display_controller_list_end \*\//{//!d}'  ./codebuild.c
+
+	# Get the latest controller_list
+	sed -n '/\/\* display_controller_list_start \*\//,/\/\* display_controller_list_end \*\//{p;}'  ../../../../tools/codebuild/codebuild.c | sed '1d;$d' > controller_list.txt
+	sed -i '/\/\* display_controller_list_start \*\// r controller_list.txt' ./codebuild.c
+	rm controller_list.txt
+
+	# Remove the extra line /* display_controller_list_end */
+	sed -i '0,/\/\* display_controller_list_end \*\// s///' ./codebuild.c
+	sed -i 'N;s/\n\/\* display_controller_list_end \*\//\/\* display_controller_list_end \*\//' ./codebuild.c
+
+	$(CC) -Wall -g $(LDFLAGS) $(SRC) -o codebuild
+
+clean:	
+	-rm ./codebuild
+
+build: codebuild
+	./codebuild
+
+install: build
+	cp u8g2_d_setup.c u8g2_d_memory.c ../../../../csrc/
+
+	# Remove previous C++ headers
+	sed -i '/\/\* generated code (codebuild), u8g2 project \*\//,/#endif \/\/ U8X8_USE_PINS/{//!d}'  ../../port/U8g2lib.h
+	sed -i '/\/\* generated code (codebuild), u8g2 project \*\//,/#endif \/\/ U8X8_USE_PINS/{//!d}'  ../../port/U8x8lib.h
+
+	# Copy C++ headers into file 
+	sed -i '/\/\* generated code (codebuild), u8g2 project \*\// r U8g2lib.h' ../../port/U8g2lib.h
+	sed -i '/\/\* generated code (codebuild), u8g2 project \*\// r U8x8lib.h' ../../port/U8x8lib.h
+
+	# Remove the extra line /* generated code (codebuild), u8g2 project */
+	sed -i '0,/\/\* generated code (codebuild), u8g2 project \*\// s///' ../../port/U8g2lib.h
+	sed -i '0,/\/\* generated code (codebuild), u8g2 project \*\// s///' ../../port/U8x8lib.h
+	sed -i 'N;s/\n\/\* generated code (codebuild), u8g2 project \*\//\/\* generated code (codebuild), u8g2 project \*\//' ../../port/U8g2lib.h
+	sed -i 'N;s/\n\/\* generated code (codebuild), u8g2 project \*\//\/\* generated code (codebuild), u8g2 project \*\//' ../../port/U8x8lib.h
diff --git a/sys/rt-thread/tools/codebuild.c b/sys/rt-thread/tools/codebuild/codebuild.c
similarity index 96%
rename from sys/rt-thread/tools/codebuild.c
rename to sys/rt-thread/tools/codebuild/codebuild.c
index 39dbaf88..83d38764 100644
--- a/sys/rt-thread/tools/codebuild.c
+++ b/sys/rt-thread/tools/codebuild/codebuild.c
@@ -254,6 +254,23 @@ struct controller controller_list[] =
     }
   },
 
+ {
+    "sh1107", 	10, 	16, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "128x80" },  /* actually this is a 80x128 display */
+      { NULL }
+    }
+  },
+  {
+    "sh1107", 	10, 	16, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "128x80" }, /* actually this is a 80x128 display */
+      { NULL }
+    }
+  },
+
    {
     "sh1107", 	 16, 	16, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080,
     "", /* is_generate_u8g2_class= */ 1,
@@ -328,6 +345,23 @@ struct controller controller_list[] =
     }
   },  
 
+  {
+    "ssd1306", 	13, 	8, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "102x64_ea_oleds102" },
+      { NULL }
+    }
+  },
+  {
+    "ssd1306", 	13, 	8, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "102x64_ea_oleds102" },
+      { NULL }
+    }
+  },  
+
   
   {
     "sh1106", 	16, 	4, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080,
@@ -672,6 +706,32 @@ struct controller controller_list[] =
       { NULL }
     }
   },
+  
+  {
+    "st7920", 	32, 	4, 	"u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "p", COM_8080,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "256x32" },
+      { NULL }
+    }
+  },
+  {
+    "st7920", 	32, 	4, 	"u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_6800,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "256x32" },
+      { NULL }
+    }
+  },
+  {
+    "st7920", 	32, 	4, 	"u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_st7920_spi", "s", COM_ST7920SPI,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "256x32" },
+      { NULL }
+    }
+  },
+  
   {
     "st7920", 	24, 	4, 	"u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "p", COM_8080,
     "", /* is_generate_u8g2_class= */ 1,
@@ -696,6 +756,7 @@ struct controller controller_list[] =
       { NULL }
     }
   },
+  
   {
     "st7920", 	16, 	8, 	"u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "p", COM_8080,
     "", /* is_generate_u8g2_class= */ 1,
@@ -852,6 +913,24 @@ struct controller controller_list[] =
     }
   },  
 
+  {
+    "uc1609", 	24, 	8, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "slg19264" },
+      { NULL }
+    }
+  },  
+
+  {
+    "uc1609", 	24, 	8, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "slg19264" },
+      { NULL }
+    }
+  },  
+  
   {
     "uc1638", 	20, 	16, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080,
     "", /* is_generate_u8g2_class= */ 1,
@@ -1174,6 +1253,23 @@ struct controller controller_list[] =
       { NULL }
     }
   },
+
+  {
+    "st7571", 		16, 	12, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "128x96" },
+      { NULL }
+    }
+  },
+  {
+    "st7571", 		16, 	12, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "128x96" },
+      { NULL }
+    }
+  },
   
   
   {
@@ -1636,6 +1732,15 @@ struct controller controller_list[] =
       { NULL }
     }
   },
+
+  {
+    "gu800", 	16, 	8, 	"u8g2_ll_hvline_vertical_top_lsb", "u8x8_gu800_cad_110", "", COM_4WSPI|COM_6800|COM_8080,
+    "", /* is_generate_u8g2_class= */ 1,
+    {
+      { "128x64" },
+      { NULL }
+    }
+  },
   
   {
     "a2printer", 	48, 	30, 	"u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_empty", "", COM_UART,