boost converter
This commit is contained in:
kraus
parent
4db469252f
commit
96405a3438
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@ -4,7 +4,7 @@
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Assumes LED at Pin 6, GPIO PA0
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*/
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#include "stm32l031xx.h"
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#include "stm32l011xx.h"
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volatile unsigned long SysTickCount = 0;
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@ -0,0 +1,151 @@
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#
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# Generic and Simple GNU ARM Makefile
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#
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# Desinged for the gnu-arm-none-eabi tool chain
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#
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# Features
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# - create hex file
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# - create assembler listing (.dis)
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#
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# Limitations
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# - only C-files supported
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# - no automatic dependency checking (call 'make clean' if any .h files are changed)
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#
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# Targets:
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# make
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# create hex file, no upload
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# make upload
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# create and upload hex file
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# make clean
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# delete all generated files
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#
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# Note:
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# Display list make database: make -p -f/dev/null | less
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#
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#================================================
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# External tools
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# The base directory of gcc-arm-none-eabi
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# Can be empty on Ubuntu and installed gcc-arm-none-eabi
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# If set, GCCBINPATH must contain a "/" at the end.
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# GCCBINPATH:=/usr/bin/ <<<< Ubuntu version is broken at the moment
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GCCBINPATH:=/home/kraus/prg/gcc-arm-none-eabi-7-2018-q2-update/bin/
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#================================================
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# Project Information
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# The name for the project
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TARGETNAME:=blink
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# The source files of the project
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CSRC:=$(wildcard *.c)
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SSRC:=$(wildcard ../stm32l0xx/src/*.s)
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# The CPU architecture (will be used for -mcpu)
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# for the LPC824, can we use "cortex-m0plus"?
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MCPU:=cortex-m0plus
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# Include directory for the system include files
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SYSINC:=../stm32l0xx/inc
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SYSSRC:=$(wildcard ../stm32l0xx/src/*.c)
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# Include directory for the u8g2 include files
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#U8G2INC:=../../../../csrc/
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#U8G2SRC:=$(wildcard ../../../../csrc/*.c)
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# directory for FatFS
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#FFINC:=../fatfs
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#FFSRC:=$(wildcard ../fatfs/*.c)
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# Directory for the linker script
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LDSCRIPTDIR:=.
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# Name of the linker script (must be the "keep" script, because the other script is not always working)
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LDSCRIPT:=stm32l011x4.ld
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#================================================
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# Main part of the Makefile starts here. Usually no changes are needed.
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# Internal Variable Names
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LIBNAME:=$(TARGETNAME).a
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ELFNAME:=$(TARGETNAME).elf
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HEXNAME:=$(TARGETNAME).hex
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DISNAME:=$(TARGETNAME).dis
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MAPNAME:=$(TARGETNAME).map
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OBJ:=$(CSRC:.c=.o) $(SSRC:.s=.o) $(SYSSRC:.c=.o)
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# $(SYSSRC:.c=.o) $(U8G2SRC:.c=.o) $(FFSRC:.c=.o)
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# Replace standard build tools by arm tools
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AS:=$(GCCBINPATH)arm-none-eabi-as
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CC:=$(GCCBINPATH)arm-none-eabi-gcc
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AR:=$(GCCBINPATH)arm-none-eabi-ar
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OBJCOPY:=$(GCCBINPATH)arm-none-eabi-objcopy
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OBJDUMP:=$(GCCBINPATH)arm-none-eabi-objdump
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SIZE:=$(GCCBINPATH)arm-none-eabi-size
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# Common flags
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COMMON_FLAGS = -mthumb -mcpu=$(MCPU)
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COMMON_FLAGS += -DSTM32L011xx
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COMMON_FLAGS += -Wall -I. -I$(SYSINC) -I$(U8G2INC)
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# define stack size (defaults to 0x0100)
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# COMMON_FLAGS += -D__STACK_SIZE=0x0100
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# COMMON_FLAGS += -Os -flto
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COMMON_FLAGS += -Os
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# COMMON_FLAGS += -fstack-protector
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# COMMON_FLAGS += -finstrument-functions
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# Do not use stand libs startup code. Uncomment this for gcclib procedures
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# memcpy still works, but might be required for __aeabi_uidiv
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# COMMON_FLAGS += -nostdlib
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# remove unused data and function
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#COMMON_FLAGS += -ffunction-sections -fdata-sections -fshort-wchar
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COMMON_FLAGS += -ffunction-sections -fdata-sections
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# C flags
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CFLAGS:=$(COMMON_FLAGS) -std=gnu99
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# LD flags
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# remove unreferenced procedures and variables, but __isr_vector
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GC:=-Wl,--gc-sections -Wl,--undefined=__isr_vector
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MAP:=-Wl,-Map=$(MAPNAME)
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LFLAGS:=$(COMMON_FLAGS) $(GC) $(MAP)
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#LDLIBS:=--specs=nosys.specs -lc -lc -lnosys -L$(LDSCRIPTDIR) -T $(LDSCRIPT)
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LDLIBS:=--specs=nosys.specs -L$(LDSCRIPTDIR) -T $(LDSCRIPT)
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# Additional Suffixes
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.SUFFIXES: .elf .hex .bin .dis
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# Targets
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.PHONY: all
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all: $(DISNAME) $(HEXNAME)
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$(SIZE) $(ELFNAME)
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.PHONY: upload
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# stm32flash v0.5 does not support STM32L011, so use the latest snapshot
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upload: $(DISNAME) $(HEXNAME) $(ELFNAME)
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~/git/stm32flash-code/stm32flash -e 127 -g 0 -w $(HEXNAME) -v /dev/ttyUSB0
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$(SIZE) $(ELFNAME)
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.PHONY: clean
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clean:
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$(RM) $(OBJ) $(HEXNAME) $(ELFNAME) $(LIBNAME) $(DISNAME) $(MAPNAME) libssp.a libssp_nonshared.a
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# implicit rules
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.elf.hex:
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$(OBJCOPY) -O ihex $< $@
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# explicit rules
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$(ELFNAME): $(LIBNAME)($(OBJ)) libssp.a libssp_nonshared.a
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$(LINK.o) $(LFLAGS) $(LIBNAME) $(LDLIBS) -o $@
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$(DISNAME): $(ELFNAME)
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$(OBJDUMP) -D -S $< > $@
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# create empty ssp libs for -fstack-protector-all -fstack-protector
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libssp.a:
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$(AR) rcs $@
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libssp_nonshared.a:
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$(AR) rcs $@
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@ -0,0 +1,192 @@
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/*
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boost converter project for the STM32L011x4
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STM32L011D3P D=14Pin 3=8KB P=TTSOP
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STM32L011D4P D=14Pin 4=16KB P=TTSOP
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STM32L011F3P F=20Pin 3=8KB P=TTSOP
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STM32L011F4P F=20Pin 4=16KB P=TTSOP
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TSSOP20:
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PB9/BOOT 1 20 PA14
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PC14 2 19 PA13
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PC15 3 18 PA10 TIM21_CH1, TIM2_CH3
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Reset 4 17 PA9 TIM21_CH2
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VDDA 5 16 VDD
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PA0 C1- 6 15 GND
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PA1 C1+ 7 14 PB1 ADC9
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PA2 C2- TX 8 13 PA7 C2+
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PA3 C2+ RX 9 12 PA6 ADC6
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PA4 C1- C2- 10 11 PA5 C1- C2-
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Comp 2:
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Input: REFINT /4
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Input: PA7 (C2+),
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Output: PA9 (TIM21_CH2)
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Comp 1:
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Input: REFINT
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Input: PA1 (C1+)
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Output: PA10 (TIM2_CH3)
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*/
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#include "stm32l011xx.h"
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/*===============================================*/
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/*
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systick IRQ
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*/
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volatile unsigned long SysTickCount = 0;
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void __attribute__ ((interrupt, used)) SysTick_Handler(void)
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{
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SysTickCount++;
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if ( SysTickCount & 1 )
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GPIOA->BSRR = GPIO_BSRR_BS_0; /* atomic set PA0 */
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else
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GPIOA->BSRR = GPIO_BSRR_BR_0; /* atomic clr PA0 */
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}
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/*===============================================*/
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/*
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boost converter
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PA6=Output to N-MOS Gate
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PA7=Reference Input
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*/
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void boost_converter(void)
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{
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/* assumes, that SYSCFG_CRGR3 is not locked */
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/* assumes, that COMP2 is not locked */
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/* setup internal reference (ca. 1.2V) */
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SYSCFG->CFGR3 |= SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP; /* enable VREFINT during low power mode */
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while( (SYSCFG->CFGR3 & SYSCFG_CFGR3_VREFINT_RDYF) == 0 ) /* wait for VREFINT until it becomes ready */
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;
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/* configure PA7 as COMP2 Plus input */
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/* GPIO has to be in input state without any pull up/down resistor: This is default, so nothing needs to be done here */
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/* configure PA9 as TIM21 output */
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GPIOA->MODER &= ~GPIO_MODER_MODE0; /* clear mode */
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GPIOA->MODER |= GPIO_MODER_MODE9_0; /* Output mode */
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_9; /* no Push/Pull */
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GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED9; /* low speed */
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD9; /* no pullup/pulldown */
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GPIOA->BSRR = GPIO_BSRR_BR_9; /* atomic clr */
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GPIOA->AFR[1] &= GPIO_AFRH_AFRH1_Msk;
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GPIOA->AFR[1] |= 5<<GPIO_AFRH_AFRH1_Pos; /* AF5 selects TIM21 */
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/* setup COMP2 */
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/*
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COMP2 has only one register: CSR
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Bit 31: Lock bit, will lock CSR until next reset if set to 1
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Bit 30: Output value, considering polarity
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Bit 15: Polarity, 0: Not inverted
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Bits 10:8: Plus input
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000: PA3
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001: PB4
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010: PB5
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011: PB6
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100: PB7
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101: PA7 (for category 1 devices only)
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Bits 6:4: Minus input
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000: VREFINT
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001: PA2
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010: PA4
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011: PA5
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100: 1/4 VREFINT
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101: 1/2 VREFINT
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110: 3/4 VREFINT
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111: PB
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Bit 3: Speed selection, 0: Low speed
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Bit 0: Enable
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*/
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/* select PA7 as positive input --> 101, only available for the STM32L011 */
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COMP2->CSR &= ~(uint32_t)COMP_CSR_COMP2INPSEL;
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COMP2->CSR |= COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_2;
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/*
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0.306V
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20mA 15 Ohm 20.4mA
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20mA 18 Ohm 17mA
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350mA 1 Ohm 306mA --> 300mWatt
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*/
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/* select 1/4 internal reference voltage --> 0.306 Volt -->100 */
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COMP2->CSR &= ~(uint32_t)COMP_CSR_COMP2INNSEL;
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COMP2->CSR |= COMP_CSR_COMP2INNSEL_2;
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/* invert polarity */
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COMP2->CSR |= COMP_CSR_COMP2POLARITY;
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/* comparator enable */
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COMP2->CSR |= COMP_CSR_COMP2EN;
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/* setup PWM mode for TIM21 */
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/* configure output compare for channel 2 of TIM21 */
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TIM21->CCMR1 &= ~(uint32_t)TIM_CCMR1_CC2S;
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/* configure pwm mode 1 */
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TIM21->CCMR1 &= ~(uint32_t)TIM_CCMR1_OC2M; /* clear mode to 000 */
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TIM21->CCMR1 |= TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1; /* pwm mode 1 (110) */
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TIM21->CCMR1 |= TIM_CCMR1_OC2PE; /* load modified CCR1 during update event only */
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TIM21->PSC = 0; /* run with max speed (2 MHz after reset) */
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TIM21->ARR = 20; /* period of 20 clocks (100KHz if sys clock is not modified */
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TIM21->CCR2 = 10; /* a value between 0 and ARR, which defines the duty cycle */
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/* output the result of channel 2 to PA9 */
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TIM21->CCER |= TIM_CCER_CC2E;
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/* do not invert the output polarity (this is also the default value) */
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TIM21->CCER &= ~(uint32_t)TIM_CCER_CC2P;
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/* use up counter (this is also the default value) */
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TIM21->CR1 &= ~(uint32_t)TIM_CR1_DIR;
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/* do not use "one pulse mode" (continues mode, this is also the default value) */
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TIM21->CR1 &= ~(uint32_t)TIM_CR1_OPM;
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/* always generate an update event (this is also default) */
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TIM21->CR1 &= ~(uint32_t)TIM_CR1_UDIS;
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/* update event can be caused by UG bit and overflow (this is default) */
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TIM21->CR1 &= ~(uint32_t)TIM_CR1_URS;
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/* enable the counter */
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TIM21->CR1 |= TIM_CR1_CEN;
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}
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int main()
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{
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RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
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RCC->APB2ENR |= RCC_APB2ENR_ADCEN;
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RCC->APB2ENR |= RCC_APB2ENR_TIM21EN;
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
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__NOP();
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__NOP();
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GPIOA->MODER &= ~GPIO_MODER_MODE0; /* clear mode for PA0 */
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GPIOA->MODER |= GPIO_MODER_MODE0_0; /* Output mode for PA0 */
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_0; /* no Push/Pull for PA0 */
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GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED0; /* low speed for PA0 */
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD0; /* no pullup/pulldown for PA0 */
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GPIOA->BSRR = GPIO_BSRR_BR_0; /* atomic clr PA0 */
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-
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SysTick->LOAD = 2000*500 - 1;
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SysTick->VAL = 0;
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SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
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for(;;)
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;
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}
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@ -0,0 +1,245 @@
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/*
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||||
stm32l011x4.ld
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||||
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Modified for stm32l0 from the original nokeep.ld script from the
|
||||
arm-none-eabi examples by olikraus@gmail.com
|
||||
|
||||
Assuming, that the original nokeep.ld file is available under
|
||||
the GNU General Public License, this file is available under the
|
||||
same license.
|
||||
|
||||
There are three modifications:
|
||||
|
||||
1. Provide symbols for the stm32l0 startup code
|
||||
|
||||
The following symbols are required for the stm32l0 startup
|
||||
code (e.g. startup_stm32l011xx.s)
|
||||
|
||||
_sidata start address for the initialization values of the .data section
|
||||
_sdata start address for the .data section. defined in linker script
|
||||
_edata end address for the .data section. defined in linker script
|
||||
_sbss start address for the .bss section. defined in linker script
|
||||
_ebss end address for the .bss section. defined in linker script
|
||||
_estack top address of the stack
|
||||
|
||||
2. Stack size estimation / calculation
|
||||
|
||||
_Stack_Size has been added to allow better stack size calculation
|
||||
|
||||
3. KEEP keywords
|
||||
|
||||
Additionall KEEPs added for .init and .fini. Without this KEEP the
|
||||
generated code will not work, because of the missing _init function.
|
||||
|
||||
4. Bugfix: Allign the end of the flash area
|
||||
|
||||
*/
|
||||
|
||||
_Stack_Size = 0x400; /* stm32l0: estimated amount of stack */
|
||||
|
||||
|
||||
/* Linker script to configure memory regions.
|
||||
* Need modifying for a specific board.
|
||||
* FLASH.ORIGIN: starting address of flash
|
||||
* FLASH.LENGTH: length of flash
|
||||
* RAM.ORIGIN: starting address of RAM bank 0
|
||||
* RAM.LENGTH: length of RAM bank 0
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 16K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 2K
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __copy_table_start__
|
||||
* __copy_table_end__
|
||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.isr_vector))
|
||||
*(.text*)
|
||||
|
||||
/* the st32l0 startup code calls __libc_init_array, which calls the _init */
|
||||
/* ... sooo.... better keep the init and fini sections */
|
||||
|
||||
KEEP ( *(.init) )
|
||||
KEEP ( *(.fini) )
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
*(.eh_frame*)
|
||||
|
||||
/* allign the end of the flash area */
|
||||
. = ALIGN(4);
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
/* To copy multiple ROM to RAM sections,
|
||||
* uncomment .copy.table section and,
|
||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG (__data_end__ - __data_start__)
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG (__data2_end__ - __data2_start__)
|
||||
__copy_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
/* To clear multiple BSS sections,
|
||||
* uncomment .zero.table section and,
|
||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
||||
/*
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
LONG (__bss_start__)
|
||||
LONG (__bss_end__ - __bss_start__)
|
||||
LONG (__bss2_start__)
|
||||
LONG (__bss2_end__ - __bss2_start__)
|
||||
__zero_table_end__ = .;
|
||||
} > FLASH
|
||||
*/
|
||||
|
||||
__etext = .;
|
||||
_sidata = .; /* for stm32l0 startup code */
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
_sdata = .; /* for stm32l0 startup code */
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
*(.preinit_array)
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
*(SORT(.init_array.*))
|
||||
*(.init_array)
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
*(SORT(.fini_array.*))
|
||||
*(.fini_array)
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
*(.jcr)
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
_edata = .; /* for stm32l0 startup code */
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
_sbss = .; /* for stm32l0 startup code */
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
_ebss = .; /* for stm32l0 startup code */
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
. = . + _Stack_Size; /* estimated stack size */
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_estack = __StackTop; /* for stm32l0 startup code */
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
Loading…
Reference in New Issue