From 91fc163a7c7570e043dcfe5dddb6e6dd526ba102 Mon Sep 17 00:00:00 2001 From: olikraus Date: Sun, 4 Dec 2016 09:08:37 +0100 Subject: [PATCH] byte function for ks0108, #88 --- csrc/u8x8.h | 6 ++++ csrc/u8x8_byte.c | 79 +++++++++++++++++------------------------------- 2 files changed, 34 insertions(+), 51 deletions(-) diff --git a/csrc/u8x8.h b/csrc/u8x8.h index ab35d31e..d2cfdc8f 100644 --- a/csrc/u8x8.h +++ b/csrc/u8x8.h @@ -576,6 +576,7 @@ uint8_t u8x8_byte_8bit_6800mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void uint8_t u8x8_byte_8bit_8080mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_byte_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); /* uint8_t u8x8_byte_st7920_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); */ +uint8_t u8x8_byte_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_byte_ssd13xx_sw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_byte_sw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); @@ -626,6 +627,11 @@ uint8_t u8x8_byte_sw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_p #define U8X8_MSG_GPIO_I2C_CLOCK U8X8_MSG_GPIO(U8X8_PIN_I2C_CLOCK) #define U8X8_MSG_GPIO_I2C_DATA U8X8_MSG_GPIO(U8X8_PIN_I2C_DATA) + +#define U8X8_MSG_GPIO_CS1 U8X8_MSG_GPIO(U8X8_PIN_CS1) /* KS0108 extra chip select */ +#define U8X8_MSG_GPIO_CS2 U8X8_MSG_GPIO(U8X8_PIN_CS2) /* KS0108 extra chip select */ + + /* these message expect the return value in u8x8->gpio_result */ #define U8X8_MSG_GPIO_MENU_SELECT U8X8_MSG_GPIO(U8X8_PIN_MENU_SELECT) #define U8X8_MSG_GPIO_MENU_NEXT U8X8_MSG_GPIO(U8X8_PIN_MENU_NEXT) diff --git a/csrc/u8x8_byte.c b/csrc/u8x8_byte.c index 071f7348..6bc58968 100644 --- a/csrc/u8x8_byte.c +++ b/csrc/u8x8_byte.c @@ -309,92 +309,69 @@ uint8_t u8x8_byte_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void /*=========================================*/ -#ifdef OLDOLDOLD +static void u8x8_byte_set_ks0108_cs(u8x8_t *u8x8, uint8_t arg) U8X8_NOINLINE; -static void u8x8_byte_st7920_send_byte(u8x8_t *u8x8, uint8_t b) U8X8_NOINLINE; -static void u8x8_byte_st7920_send_byte(u8x8_t *u8x8, uint8_t b) +static void u8x8_byte_set_ks0108_cs(u8x8_t *u8x8, uint8_t arg) { - uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8); - uint8_t not_takeover_edge = 1 - takeover_edge; - uint8_t cnt; - - cnt = 8; - do - { - if ( b & 128 ) - u8x8_gpio_SetSPIData(u8x8, 1); - else - u8x8_gpio_SetSPIData(u8x8, 0); - - u8x8_gpio_SetSPIClock(u8x8, not_takeover_edge); - u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sda_setup_time_ns); - u8x8_gpio_SetSPIClock(u8x8, takeover_edge); - u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sck_pulse_width_ns); - - b<<=1; - cnt--; - } while( cnt != 0 ); - + u8x8_gpio_SetCS(u8x8, arg&1); + arg = arg >> 1; + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_CS1, arg&1); + arg = arg >> 2; + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_CS2, arg&2); } -uint8_t u8x8_byte_st7920_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +/* 6800 mode */ +uint8_t u8x8_byte_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) { + uint8_t i, b; uint8_t *data; - uint8_t b; - static uint8_t last_dc; switch(msg) { case U8X8_MSG_BYTE_SEND: - - if ( last_dc == 0 ) - { - /* command */ - u8x8_byte_st7920_send_byte(u8x8, 0x0f8); - } - else - { - /* data */ - u8x8_byte_st7920_send_byte(u8x8, 0x0fa); - } - data = (uint8_t *)arg_ptr; - while( arg_int > 0 ) { b = *data; - u8x8_byte_st7920_send_byte(u8x8, b & 0x0f0); - u8x8_byte_st7920_send_byte(u8x8, b << 4); data++; arg_int--; + for( i = U8X8_MSG_GPIO_D0; i <= U8X8_MSG_GPIO_D7; i++ ) + { + u8x8_gpio_call(u8x8, i, b&1); + b >>= 1; + } + + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 1); + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); } break; case U8X8_MSG_BYTE_INIT: /* disable chipselect */ - u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); - /* no wait required here */ - - /* for SPI: setup correct level of the clock signal */ - u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8)); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* ensure that the enable signal is high */ + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); break; case U8X8_MSG_BYTE_SET_DC: - last_dc = arg_int; + u8x8_gpio_SetDC(u8x8, arg_int); break; case U8X8_MSG_BYTE_START_TRANSFER: - u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + /* expects 3 bits in arg_int for the chip select lines */ + u8x8_byte_set_ks0108_cs(u8x8, arg_int); u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); break; case U8X8_MSG_BYTE_END_TRANSFER: u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); - u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + u8x8_byte_set_ks0108_cs(u8x8, arg_int); break; default: return 0; } return 1; } -#endif + /*=========================================*/