From 6caa2ae955696001cdb14384848c69c0bc98cf26 Mon Sep 17 00:00:00 2001 From: wuhanstudio Date: Wed, 4 Aug 2021 20:19:24 +0100 Subject: [PATCH] add rt-thread cpp support --- SConscript | 60 +- .../ssd1306_12864_4wire_hw_spi_example.c | 19 +- .../ssd1306_12864_4wire_hw_spi_example.cpp | 33 + .../ssd1306_12864_4wire_sw_spi_example.c | 19 +- .../ssd1306_12864_4wire_sw_spi_example.cpp | 34 + .../examples/ssd1306_12864_hw_i2c_example.c | 6 +- .../examples/ssd1306_12864_hw_i2c_example.cpp | 20 + .../examples/ssd1306_12864_sw_i2c_example.c | 13 +- .../examples/ssd1306_12864_sw_i2c_example.cpp | 29 + .../examples/st7920_12864_8080_example.c | 66 + .../examples/st7920_12864_8080_example.cpp | 48 + sys/rt-thread/port/Print.cpp | 234 + sys/rt-thread/port/Print.h | 94 + sys/rt-thread/port/Printable.h | 39 + sys/rt-thread/port/U8g2lib.cpp | 76 + sys/rt-thread/port/U8g2lib.h | 15175 ++++++++++++++++ sys/rt-thread/port/U8x8lib.cpp | 1876 ++ sys/rt-thread/port/U8x8lib.h | 5185 ++++++ sys/rt-thread/port/u8g2_port.c | 140 +- sys/rt-thread/port/u8g2_port.h | 36 +- sys/rt-thread/tools/Makefile | 20 + sys/rt-thread/tools/codebuild.c | 2619 +++ 22 files changed, 25725 insertions(+), 116 deletions(-) create mode 100644 sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.cpp create mode 100644 sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.cpp create mode 100644 sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.cpp create mode 100644 sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.cpp create mode 100644 sys/rt-thread/examples/st7920_12864_8080_example.c create mode 100644 sys/rt-thread/examples/st7920_12864_8080_example.cpp create mode 100644 sys/rt-thread/port/Print.cpp create mode 100644 sys/rt-thread/port/Print.h create mode 100644 sys/rt-thread/port/Printable.h create mode 100644 sys/rt-thread/port/U8g2lib.cpp create mode 100644 sys/rt-thread/port/U8g2lib.h create mode 100644 sys/rt-thread/port/U8x8lib.cpp create mode 100644 sys/rt-thread/port/U8x8lib.h create mode 100644 sys/rt-thread/tools/Makefile create mode 100644 sys/rt-thread/tools/codebuild.c diff --git a/SConscript b/SConscript index 4f9222a8..a5c0ee17 100644 --- a/SConscript +++ b/SConscript @@ -1,19 +1,63 @@ + from building import * import rtconfig # get current directory cwd = GetCurrentDir() -# The set of source files associated with this SConscript file. -src = Glob('csrc/*.c') -src += Glob('sys/rt-thread/port/*.c') -src += Glob('sys/rt-thread/examples/*.c') -path = [cwd + '/'] +# The set of source files associated with this SConscript file. +src = Glob('sys/rt-thread/port/u8g2_port.c') +src += Glob('csrc/*.c') + +if(GetDepend('U8G2_USE_CPP')): + src += Glob('sys/rt-thread/port/*.cpp') + +if(not GetDepend('U8G2_USE_CPP')): + + if GetDepend('U8G2_USING_SW_I2C_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.c') + + if GetDepend('U8G2_USING_HW_I2C_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.c') + + if GetDepend('U8G2_USING_SW_SPI_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.c') + + if GetDepend('U8G2_USING_HW_SPI_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.c') + + if GetDepend('U8G2_USING_8080_ST7920'): + src += Glob('sys/rt-thread/examples/st7920_12864_8080_example.c') + + if GetDepend('U8G2_USING_I2C_YL40'): + src += Glob('sys/rt-thread/examples/yl_40_example.c') + +else: + + # Basic Examples + if GetDepend('U8G2_USING_SW_I2C_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.cpp') + + if GetDepend('U8G2_USING_HW_I2C_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.cpp') + + if GetDepend('U8G2_USING_SW_SPI_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.cpp') + + if GetDepend('U8G2_USING_HW_SPI_SSD1306'): + src += Glob('sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.cpp') + + if GetDepend('U8G2_USING_8080_ST7920'): + src += Glob('sys/rt-thread/examples/st7920_12864_8080_example.cpp') + + if GetDepend('U8G2_USING_I2C_YL40'): + src += Glob('sys/rt-thread/examples/yl_40_example.c') + +path = [cwd + '/sys/rt-thread/port'] path += [cwd + '/csrc'] -path += [cwd + '/sys/rt-thread/port'] LOCAL_CCFLAGS = '' -group = DefineGroup('u8g2s', src, depend = [''], CPPPATH = path, LOCAL_CCFLAGS = LOCAL_CCFLAGS, CPPDEFINES=['RTT_U8G2']) +group = DefineGroup('U8G2', src, depend = ['PKG_USING_U8G2'], CPPPATH = path, LOCAL_CCFLAGS = LOCAL_CCFLAGS, CPPDEFINES=['RTT_U8G2']) -Return('group') \ No newline at end of file +Return('group') diff --git a/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.c b/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.c index deee7ff7..9115e39f 100644 --- a/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.c +++ b/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.c @@ -1,27 +1,26 @@ #include #include #include -#include #include // You may reference Drivers/drv_gpio.c for pinout -// In u8x8.h #define U8X8_USE_PINS +// In u8x8.h #define U8X8_USE_PINS -#define OLED_SPI_PIN_RES GET_PIN(A, 2) // PA2 -#define OLED_SPI_PIN_DC GET_PIN(A, 1) // PA1 -#define OLED_SPI_PIN_CS GET_PIN(A, 0) // PA0 +#define OLED_SPI_PIN_RES 2 // PA2 +#define OLED_SPI_PIN_DC 1 // PA1 +#define OLED_SPI_PIN_CS 0 // PA0 -static void ssd1306_12864_4wire_hw_spi_example(int argc,char *argv[]) +static void u8g2_ssd1306_12864_4wire_hw_spi_example(int argc,char *argv[]) { u8g2_t u8g2; // Initialization - u8g2_Setup_ssd1306_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_rt_4wire_hw_spi, u8x8_rt_gpio_and_delay); + u8g2_Setup_ssd1306_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_CS, OLED_SPI_PIN_CS); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_DC, OLED_SPI_PIN_DC); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_RESET, OLED_SPI_PIN_RES); - - u8g2_InitDisplay(&u8g2); + + u8g2_InitDisplay(&u8g2); u8g2_SetPowerSave(&u8g2, 0); // Draw Graphics @@ -35,4 +34,4 @@ static void ssd1306_12864_4wire_hw_spi_example(int argc,char *argv[]) u8g2_DrawGlyph(&u8g2, 112, 56, 0x2603 ); u8g2_SendBuffer(&u8g2); } -MSH_CMD_EXPORT(ssd1306_12864_4wire_hw_spi_example, sw 4wire spi ssd1306 sample); +MSH_CMD_EXPORT(u8g2_ssd1306_12864_4wire_hw_spi_example, hardware 4 wire spi ssd1306 sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.cpp b/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.cpp new file mode 100644 index 00000000..afd3581a --- /dev/null +++ b/sys/rt-thread/examples/ssd1306_12864_4wire_hw_spi_example.cpp @@ -0,0 +1,33 @@ +#include +#include +#include +#include + +// You may reference Drivers/drv_gpio.c for pinout +// In u8x8.h #define U8X8_USE_PINS + +#define OLED_SPI_PIN_RES 2 // PA2 +#define OLED_SPI_PIN_DC 1 // PA1 +#define OLED_SPI_PIN_CS 0 // PA0 + +// Check https://github.com/olikraus/u8g2/wiki/u8g2setupcpp for all supported devices +static U8G2_SSD1306_128X64_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, + /* cs=*/ OLED_SPI_PIN_CS, + /* dc=*/ OLED_SPI_PIN_DC, + /* reset=*/ OLED_SPI_PIN_RES); + // same as the NONAME variant, but may solve the "every 2nd line skipped" problem + +static void u8g2_ssd1306_12864_4wire_hw_spi_example(int argc,char *argv[]) +{ + u8g2.begin(); + u8g2.clearBuffer(); // clear the internal memory + u8g2.setFont(u8g2_font_6x13_tr); // choose a suitable font + u8g2.drawStr(1, 18, "U8g2 on RT-Thread"); // write something to the internal memory + u8g2.setFont(u8g2_font_5x8_tr); // choose a suitable font + u8g2.drawStr(1, 56, "2.29 Milestone"); // write something to the internal memory + u8g2.sendBuffer(); // transfer internal memory to the display + u8g2.setFont(u8g2_font_unifont_t_symbols); + u8g2.drawGlyph(112, 56, 0x2603 ); + u8g2.sendBuffer(); +} +MSH_CMD_EXPORT(u8g2_ssd1306_12864_4wire_hw_spi_example, hw 4wire spi ssd1306 sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.c b/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.c index 6267eac4..da94eea4 100644 --- a/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.c +++ b/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.c @@ -1,24 +1,23 @@ #include #include #include -#include #include // You may reference Drivers/drv_gpio.c for pinout -// In u8x8.h #define U8X8_USE_PINS +// In u8x8.h #define U8X8_USE_PINS -#define OLED_SPI_PIN_CLK GET_PIN(A, 5) // PA5 -#define OLED_SPI_PIN_MOSI GET_PIN(A, 7) // PA7 -#define OLED_SPI_PIN_RES GET_PIN(A, 2) // PA2 -#define OLED_SPI_PIN_DC GET_PIN(A, 1) // PA1 -#define OLED_SPI_PIN_CS GET_PIN(A, 0) // PA0 +#define OLED_SPI_PIN_CLK 5 // PA5 +#define OLED_SPI_PIN_MOSI 7 // PA7 +#define OLED_SPI_PIN_RES 2 // PA2 +#define OLED_SPI_PIN_DC 1 // PA1 +#define OLED_SPI_PIN_CS 0 // PA0 -static void ssd1306_12864_4wire_sw_spi_example(int argc,char *argv[]) +static void u8g2_ssd1306_12864_4wire_sw_spi_example(int argc,char *argv[]) { u8g2_t u8g2; // Initialization - u8g2_Setup_ssd1306_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_4wire_sw_spi, u8x8_rt_gpio_and_delay); + u8g2_Setup_ssd1306_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_SPI_CLOCK, OLED_SPI_PIN_CLK); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_SPI_DATA, OLED_SPI_PIN_MOSI); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_CS, OLED_SPI_PIN_CS); @@ -39,4 +38,4 @@ static void ssd1306_12864_4wire_sw_spi_example(int argc,char *argv[]) u8g2_DrawGlyph(&u8g2, 112, 56, 0x2603 ); u8g2_SendBuffer(&u8g2); } -MSH_CMD_EXPORT(ssd1306_12864_4wire_sw_spi_example, sw 4wire spi ssd1306 sample); +MSH_CMD_EXPORT(u8g2_ssd1306_12864_4wire_sw_spi_example, sw 4wire spi ssd1306 sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.cpp b/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.cpp new file mode 100644 index 00000000..8abde7b9 --- /dev/null +++ b/sys/rt-thread/examples/ssd1306_12864_4wire_sw_spi_example.cpp @@ -0,0 +1,34 @@ +#include +#include +#include +#include + +// You may reference Drivers/drv_gpio.c for pinout +// In u8x8.h #define U8X8_USE_PINS + +#define OLED_SPI_PIN_CLK 5 // PA5 +#define OLED_SPI_PIN_MOSI 7 // PA7 +#define OLED_SPI_PIN_RES 2 // PA2 +#define OLED_SPI_PIN_DC 1 // PA1 +#define OLED_SPI_PIN_CS 0 // PA0 + +// Check https://github.com/olikraus/u8g2/wiki/u8g2setupcpp for all supported devices +static U8G2_SSD1306_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0,\ + /* clock=*/ OLED_SPI_PIN_CLK,\ + /* data=*/ OLED_SPI_PIN_MOSI,\ + /* cs=*/ OLED_SPI_PIN_CS,\ + /* dc=*/ OLED_SPI_PIN_DC,\ + /* reset=*/ OLED_SPI_PIN_RES); + +static void u8g2_ssd1306_12864_4wire_sw_spi_example(int argc,char *argv[]) +{ + u8g2.begin(); + u8g2.clearBuffer(); // clear the internal memory + u8g2.setFont(u8g2_font_6x13_tr); // choose a suitable font + u8g2.drawStr(1, 18, "U8g2 on RT-Thread"); // write something to the internal memory + u8g2.sendBuffer(); // transfer internal memory to the display + u8g2.setFont(u8g2_font_unifont_t_symbols); + u8g2.drawGlyph(112, 56, 0x2603 ); + u8g2.sendBuffer(); +} +MSH_CMD_EXPORT(u8g2_ssd1306_12864_4wire_sw_spi_example, sw 4wire spi ssd1306 sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.c b/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.c index 20fe3d69..e28f8af1 100644 --- a/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.c +++ b/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.c @@ -3,12 +3,12 @@ #include #include -static void ssd1306_12864_hw_i2c_example(int argc,char *argv[]) +static void u8g2_ssd1306_12864_hw_i2c_example(int argc,char *argv[]) { u8g2_t u8g2; // Initialization - u8g2_Setup_ssd1306_i2c_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_rt_hw_i2c, u8x8_rt_gpio_and_delay); + u8g2_Setup_ssd1306_i2c_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); u8g2_InitDisplay(&u8g2); u8g2_SetPowerSave(&u8g2, 0); @@ -23,4 +23,4 @@ static void ssd1306_12864_hw_i2c_example(int argc,char *argv[]) u8g2_DrawGlyph(&u8g2, 112, 56, 0x2603 ); u8g2_SendBuffer(&u8g2); } -MSH_CMD_EXPORT(ssd1306_12864_hw_i2c_example, i2c ssd1306 sample); +MSH_CMD_EXPORT(u8g2_ssd1306_12864_hw_i2c_example, i2c ssd1306 sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.cpp b/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.cpp new file mode 100644 index 00000000..6c95bcfe --- /dev/null +++ b/sys/rt-thread/examples/ssd1306_12864_hw_i2c_example.cpp @@ -0,0 +1,20 @@ +#include +#include +#include +#include + +// Check https://github.com/olikraus/u8g2/wiki/u8g2setupcpp for all supported devices +static U8G2_SH1106_128X64_NONAME_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); + +static void u8g2_ssd1306_12864_hw_i2c_example(int argc,char *argv[]) +{ + u8g2.begin(); + u8g2.clearBuffer(); // clear the internal memory + u8g2.setFont(u8g2_font_6x13_tr); // choose a suitable font + u8g2.drawStr(1, 18, "U8g2 on RT-Thread"); // write something to the internal memory + u8g2.sendBuffer(); // transfer internal memory to the display + u8g2.setFont(u8g2_font_unifont_t_symbols); + u8g2.drawGlyph(112, 56, 0x2603 ); + u8g2.sendBuffer(); +} +MSH_CMD_EXPORT(u8g2_ssd1306_12864_hw_i2c_example, i2c ssd1306 sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.c b/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.c index 89e2ace7..82077c10 100644 --- a/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.c +++ b/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.c @@ -1,20 +1,19 @@ #include #include #include -#include #include -#define OLED_I2C_PIN_SCL GET_PIN(B, 6) // PB6 -#define OLED_I2C_PIN_SDA GET_PIN(B, 7) // PB7 +#define OLED_I2C_PIN_SCL 22 // PB6 +#define OLED_I2C_PIN_SDA 23 // PB7 -static void ssd1306_12864_sw_i2c_example(int argc,char *argv[]) +static void u8g2_ssd1306_12864_sw_i2c_example(int argc,char *argv[]) { u8g2_t u8g2; // Initialization - u8g2_Setup_ssd1306_i2c_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_sw_i2c, u8x8_rt_gpio_and_delay); + u8g2_Setup_ssd1306_i2c_128x64_noname_f( &u8g2, U8G2_R0, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_I2C_CLOCK, OLED_I2C_PIN_SCL); - u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_I2C_DATA, OLED_I2C_PIN_SDA); + u8x8_SetPin(u8g2_GetU8x8(&u8g2), U8X8_PIN_I2C_DATA, OLED_I2C_PIN_SDA); u8g2_InitDisplay(&u8g2); u8g2_SetPowerSave(&u8g2, 0); @@ -30,4 +29,4 @@ static void ssd1306_12864_sw_i2c_example(int argc,char *argv[]) u8g2_DrawGlyph(&u8g2, 112, 56, 0x2603 ); u8g2_SendBuffer(&u8g2); } -MSH_CMD_EXPORT(ssd1306_12864_sw_i2c_example, i2c ssd1306 software i2c sample); +MSH_CMD_EXPORT(u8g2_ssd1306_12864_sw_i2c_example, i2c ssd1306 software i2c sample); diff --git a/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.cpp b/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.cpp new file mode 100644 index 00000000..55996d5e --- /dev/null +++ b/sys/rt-thread/examples/ssd1306_12864_sw_i2c_example.cpp @@ -0,0 +1,29 @@ +#include +#include +#include +#include + +// You may reference Drivers/drv_gpio.c for pinout +// In u8x8.h #define U8X8_USE_PINS +#define OLED_I2C_PIN_SCL 22 // PB6 +#define OLED_I2C_PIN_SDA 23 // PB7 + +// Check https://github.com/olikraus/u8g2/wiki/u8g2setupcpp for all supported devices +static U8G2_SSD1306_128X64_NONAME_F_SW_I2C u8g2(U8G2_R0, + /* clock=*/ OLED_I2C_PIN_SCL, + /* data=*/ OLED_I2C_PIN_SDA, + /* reset=*/ U8X8_PIN_NONE); + // All Boards without Reset of the Display + +static void u8g2_ssd1306_12864_sw_i2c_example(int argc,char *argv[]) +{ + u8g2.begin(); + u8g2.clearBuffer(); // clear the internal memory + u8g2.setFont(u8g2_font_6x13_tr); // choose a suitable font + u8g2.drawStr(1, 18, "U8g2 on RT-Thread"); // write something to the internal memory + u8g2.sendBuffer(); // transfer internal memory to the display + u8g2.setFont(u8g2_font_unifont_t_symbols); + u8g2.drawGlyph(112, 56, 0x2603 ); + u8g2.sendBuffer(); +} +MSH_CMD_EXPORT(u8g2_ssd1306_12864_sw_i2c_example, i2c ssd1306 software i2c sample); diff --git a/sys/rt-thread/examples/st7920_12864_8080_example.c b/sys/rt-thread/examples/st7920_12864_8080_example.c new file mode 100644 index 00000000..413354d5 --- /dev/null +++ b/sys/rt-thread/examples/st7920_12864_8080_example.c @@ -0,0 +1,66 @@ +#include +#include +#include +#include + +// You may reference Drivers/drv_gpio.c for pinout +// In u8x8.h #define U8X8_USE_PINS + +#define ST7920_8080_PIN_D0 31 // PB15 +#define ST7920_8080_PIN_D1 30 // PB14 +#define ST7920_8080_PIN_D2 29 // PB13 +#define ST7920_8080_PIN_D3 28 // PB12 +#define ST7920_8080_PIN_D4 38 // PC6 +#define ST7920_8080_PIN_D5 39 // PC7 +#define ST7920_8080_PIN_D6 40 // PC8 +#define ST7920_8080_PIN_D7 41 // PC9 +#define ST7920_8080_PIN_EN 15 // PA15 +#define ST7920_8080_PIN_CS U8X8_PIN_NONE +#define ST7920_8080_PIN_DC 11 // PA11 +#define ST7920_8080_PIN_RST 12 // PA12 + +void u8x8_SetPin_8Bit_8080(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t wr, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, wr); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +static void u8g2_st7920_12864_8080_example(int argc,char *argv[]) +{ + u8g2_t u8g2; + + // Initialization + u8g2_Setup_st7920_p_128x64_f(&u8g2, U8G2_R0, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(u8g2_GetU8x8(&u8g2), + ST7920_8080_PIN_D0, ST7920_8080_PIN_D1, + ST7920_8080_PIN_D2, ST7920_8080_PIN_D3, + ST7920_8080_PIN_D4, ST7920_8080_PIN_D5, + ST7920_8080_PIN_D6, ST7920_8080_PIN_D7, + ST7920_8080_PIN_EN, ST7920_8080_PIN_CS, + ST7920_8080_PIN_DC, ST7920_8080_PIN_RST); + + u8g2_InitDisplay(&u8g2); + u8g2_SetPowerSave(&u8g2, 0); + + // Draw Graphics + /* full buffer example, setup procedure ends in _f */ + u8g2_ClearBuffer(&u8g2); + u8g2_SetFont(&u8g2, u8g2_font_baby_tf); + u8g2_DrawStr(&u8g2, 1, 18, "U8g2 on RT-Thread"); + u8g2_SendBuffer(&u8g2); + + u8g2_SetFont(&u8g2, u8g2_font_unifont_t_symbols); + u8g2_DrawGlyph(&u8g2, 112, 56, 0x2603 ); + u8g2_SendBuffer(&u8g2); +} +MSH_CMD_EXPORT(u8g2_st7920_12864_8080_example, st7920 12864 LCD sample); diff --git a/sys/rt-thread/examples/st7920_12864_8080_example.cpp b/sys/rt-thread/examples/st7920_12864_8080_example.cpp new file mode 100644 index 00000000..f414edd8 --- /dev/null +++ b/sys/rt-thread/examples/st7920_12864_8080_example.cpp @@ -0,0 +1,48 @@ +#include +#include +#include +#include + +// You may reference Drivers/drv_gpio.c for pinout +// In u8x8.h #define U8X8_USE_PINS + +#define ST7920_8080_PIN_D0 31 // PB15 +#define ST7920_8080_PIN_D1 30 // PB14 +#define ST7920_8080_PIN_D2 29 // PB13 +#define ST7920_8080_PIN_D3 28 // PB12 +#define ST7920_8080_PIN_D4 38 // PC6 +#define ST7920_8080_PIN_D5 39 // PC7 +#define ST7920_8080_PIN_D6 40 // PC8 +#define ST7920_8080_PIN_D7 41 // PC9 +#define ST7920_8080_PIN_EN 15 // PA15 +#define ST7920_8080_PIN_CS U8X8_PIN_NONE +#define ST7920_8080_PIN_DC 11 // PA11 +#define ST7920_8080_PIN_RST 12 // PA12 + +// Check https://github.com/olikraus/u8g2/wiki/u8g2setupcpp for all supported devices +static U8G2_ST7920_128X64_F_8080 u8g2(U8G2_R0, + ST7920_8080_PIN_D0, + ST7920_8080_PIN_D1, + ST7920_8080_PIN_D2, + ST7920_8080_PIN_D3, + ST7920_8080_PIN_D4, + ST7920_8080_PIN_D5, + ST7920_8080_PIN_D6, + ST7920_8080_PIN_D7, + /*enable=*/ ST7920_8080_PIN_EN, + /*cs=*/ ST7920_8080_PIN_CS, + /*dc=*/ ST7920_8080_PIN_DC, + /*reset=*/ ST7920_8080_PIN_RST); + +static void u8g2_st7920_12864_8080_example(int argc,char *argv[]) +{ + u8g2.begin(); + u8g2.clearBuffer(); // clear the internal memory + u8g2.setFont(u8g2_font_6x13_tr); // choose a suitable font + u8g2.drawStr(1, 18, "U8g2 on RT-Thread"); // write something to the internal memory + u8g2.sendBuffer(); // transfer internal memory to the display + u8g2.setFont(u8g2_font_unifont_t_symbols); + u8g2.drawGlyph(112, 56, 0x2603 ); + u8g2.sendBuffer(); +} +MSH_CMD_EXPORT(u8g2_st7920_12864_8080_example, st7920 12864 LCD sample); diff --git a/sys/rt-thread/port/Print.cpp b/sys/rt-thread/port/Print.cpp new file mode 100644 index 00000000..1a0c6141 --- /dev/null +++ b/sys/rt-thread/port/Print.cpp @@ -0,0 +1,234 @@ +/* + Print.cpp - Base class that provides print() and println() + Copyright (c) 2008 David A. Mellis. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + + Modified 23 November 2006 by David A. Mellis + Modified 03 August 2015 by Chuck Todd + */ + +#include +#include +#include +// Use Self-defined isnan isinf in Print.h +//#include + +#include "Print.h" + +// Public Methods ////////////////////////////////////////////////////////////// + +/* default implementation: may be overridden */ +size_t Print::write(const uint8_t *buffer, size_t size) +{ + size_t n = 0; + while (size--) { + if (write(*buffer++)) n++; + else break; + } + return n; +} + +size_t Print::print(const char str[]) +{ + return write(str); +} + +size_t Print::print(char c) +{ + return write(c); +} + +size_t Print::print(unsigned char b, int base) +{ + return print((unsigned long) b, base); +} + +size_t Print::print(int n, int base) +{ + return print((long) n, base); +} + +size_t Print::print(unsigned int n, int base) +{ + return print((unsigned long) n, base); +} + +size_t Print::print(long n, int base) +{ + if (base == 0) { + return write(n); + } else if (base == 10) { + if (n < 0) { + int t = print('-'); + n = -n; + return printNumber(n, 10) + t; + } + return printNumber(n, 10); + } else { + return printNumber(n, base); + } +} + +size_t Print::print(unsigned long n, int base) +{ + if (base == 0) return write(n); + else return printNumber(n, base); +} + +size_t Print::print(double n, int digits) +{ + return printFloat(n, digits); +} + +size_t Print::print(const Printable& x) +{ + return x.printTo(*this); +} + +size_t Print::println(void) +{ + return write("\r\n"); +} + +size_t Print::println(const char c[]) +{ + size_t n = print(c); + n += println(); + return n; +} + +size_t Print::println(char c) +{ + size_t n = print(c); + n += println(); + return n; +} + +size_t Print::println(unsigned char b, int base) +{ + size_t n = print(b, base); + n += println(); + return n; +} + +size_t Print::println(int num, int base) +{ + size_t n = print(num, base); + n += println(); + return n; +} + +size_t Print::println(unsigned int num, int base) +{ + size_t n = print(num, base); + n += println(); + return n; +} + +size_t Print::println(long num, int base) +{ + size_t n = print(num, base); + n += println(); + return n; +} + +size_t Print::println(unsigned long num, int base) +{ + size_t n = print(num, base); + n += println(); + return n; +} + +size_t Print::println(double num, int digits) +{ + size_t n = print(num, digits); + n += println(); + return n; +} + +size_t Print::println(const Printable& x) +{ + size_t n = print(x); + n += println(); + return n; +} + +// Private Methods ///////////////////////////////////////////////////////////// + +size_t Print::printNumber(unsigned long n, uint8_t base) +{ + char buf[8 * sizeof(long) + 1]; // Assumes 8-bit chars plus zero byte. + char *str = &buf[sizeof(buf) - 1]; + + *str = '\0'; + + // prevent crash if called with base == 1 + if (base < 2) base = 10; + + do { + char c = n % base; + n /= base; + + *--str = c < 10 ? c + '0' : c + 'A' - 10; + } while(n); + + return write(str); +} + +size_t Print::printFloat(double number, uint8_t digits) +{ + size_t n = 0; + + if (isnan(number)) return print("nan"); + if (isinf(number)) return print("inf"); + if (number > 4294967040.0) return print ("ovf"); // constant determined empirically + if (number <-4294967040.0) return print ("ovf"); // constant determined empirically + + // Handle negative numbers + if (number < 0.0) + { + n += print('-'); + number = -number; + } + + // Round correctly so that print(1.999, 2) prints as "2.00" + double rounding = 0.5; + for (uint8_t i=0; i 0) { + n += print('.'); + } + + // Extract digits from the remainder one at a time + while (digits-- > 0) + { + remainder *= 10.0; + unsigned int toPrint = (unsigned int)(remainder); + n += print(toPrint); + remainder -= toPrint; + } + + return n; +} diff --git a/sys/rt-thread/port/Print.h b/sys/rt-thread/port/Print.h new file mode 100644 index 00000000..445ebd6c --- /dev/null +++ b/sys/rt-thread/port/Print.h @@ -0,0 +1,94 @@ +/* + Print.h - Base class that provides print() and println() + Copyright (c) 2008 David A. Mellis. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef Print_h +#define Print_h + +#include +#include // for size_t +#include +#include "Printable.h" + +#define DEC 10 +#define HEX 16 +#define OCT 8 +#ifdef BIN // Prevent warnings if BIN is previously defined in "iotnx4.h" or similar +#undef BIN +#endif +#define BIN 2 + +class Print +{ + private: + int write_error; + size_t printNumber(unsigned long, uint8_t); + size_t printFloat(double, uint8_t); + int isnan(double x) { return x != x; }; + int isinf(double x) { return !isnan(x) && isnan(x - x); }; + protected: + void setWriteError(int err = 1) { write_error = err; } + public: + Print() : write_error(0) {} + + int getWriteError() { return write_error; } + void clearWriteError() { setWriteError(0); } + + virtual size_t write(uint8_t) = 0; + size_t write(const char *str) { + if (str == NULL) return 0; + return write((const uint8_t *)str, strlen(str)); + } + virtual size_t write(const uint8_t *buffer, size_t size); + size_t write(const char *buffer, size_t size) { + return write((const uint8_t *)buffer, size); + } + + // default to zero, meaning "a single write may block" + // should be overriden by subclasses with buffering + virtual int availableForWrite() { return 0; } + + // size_t print(const __FlashStringHelper *); + // size_t print(const String &); + size_t print(const char[]); + size_t print(char); + size_t print(unsigned char, int = DEC); + size_t print(int, int = DEC); + size_t print(unsigned int, int = DEC); + size_t print(long, int = DEC); + size_t print(unsigned long, int = DEC); + size_t print(double, int = 2); + size_t print(const Printable&); + + // size_t println(const __FlashStringHelper *); + // size_t println(const String &s); + size_t println(const char[]); + size_t println(char); + size_t println(unsigned char, int = DEC); + size_t println(int, int = DEC); + size_t println(unsigned int, int = DEC); + size_t println(long, int = DEC); + size_t println(unsigned long, int = DEC); + size_t println(double, int = 2); + size_t println(const Printable&); + size_t println(void); + + virtual void flush() { /* Empty implementation for backward compatibility */ } +}; + +#endif diff --git a/sys/rt-thread/port/Printable.h b/sys/rt-thread/port/Printable.h new file mode 100644 index 00000000..d2cc5033 --- /dev/null +++ b/sys/rt-thread/port/Printable.h @@ -0,0 +1,39 @@ +/* + Printable.h - Interface class that allows printing of complex types + Copyright (c) 2011 Adrian McEwen. All right reserved. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef Printable_h +#define Printable_h + +#include + +class Print; + +/** The Printable class provides a way for new classes to allow themselves to be printed. + By deriving from Printable and implementing the printTo method, it will then be possible + for users to print out instances of this class by passing them into the usual + Print::print and Print::println methods. +*/ + +class Printable +{ + public: + virtual size_t printTo(Print& p) const = 0; +}; + +#endif diff --git a/sys/rt-thread/port/U8g2lib.cpp b/sys/rt-thread/port/U8g2lib.cpp new file mode 100644 index 00000000..83f9307e --- /dev/null +++ b/sys/rt-thread/port/U8g2lib.cpp @@ -0,0 +1,76 @@ +/* + + U8g2lib.cpp + + Arduino specific functions + + + Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) + + Copyright (c) 2016, olikraus@gmail.com + All rights reserved. + + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, this list + of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + + +#include "U8g2lib.h" + +static Print *u8g2_print_for_screenshot; + + +void u8g2_print_callback(const char *s) +{ +// yield(); + u8g2_print_for_screenshot->print(s); +} + +void U8G2::writeBufferPBM(Print &p) +{ + u8g2_print_for_screenshot = &p; + u8g2_WriteBufferPBM(getU8g2(), u8g2_print_callback); +} + +void U8G2::writeBufferXBM(Print &p) +{ + u8g2_print_for_screenshot = &p; + u8g2_WriteBufferXBM(getU8g2(), u8g2_print_callback); +} + +void U8G2::writeBufferPBM2(Print &p) +{ + u8g2_print_for_screenshot = &p; + u8g2_WriteBufferPBM2(getU8g2(), u8g2_print_callback); +} + +void U8G2::writeBufferXBM2(Print &p) +{ + u8g2_print_for_screenshot = &p; + u8g2_WriteBufferXBM2(getU8g2(), u8g2_print_callback); +} + + + diff --git a/sys/rt-thread/port/U8g2lib.h b/sys/rt-thread/port/U8g2lib.h new file mode 100644 index 00000000..4e68bc57 --- /dev/null +++ b/sys/rt-thread/port/U8g2lib.h @@ -0,0 +1,15175 @@ +/* + + U8g2lib.h + + C++ RT-Thread wrapper for the u8g2 struct and c functions for the u8g2 library + + Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) + + Copyright (c) 2016, olikraus@gmail.com + All rights reserved. + + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, this list + of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + + Note: + U8x8lib.h is included for the declaration of the helper functions in U8x8lib.cpp. + U8g2 class is based on the u8g2 struct from u8g2_port.h, the U8x8 class from U8x8lib.h is not used. + +*/ + + +#ifndef _U8G2LIB_HH +#define _U8G2LIB_HH + +#include +#include +#include "U8x8lib.h" +#include "u8g2_port.h" +#include "Print.h" + +class U8G2: public Print +{ + protected: + u8g2_t u8g2; + u8x8_char_cb cpp_next_cb; + public: + u8g2_uint_t tx, ty; + + U8G2(void) { cpp_next_cb = u8x8_ascii_next; home(); } + u8x8_t *getU8x8(void) { return u8g2_GetU8x8(&u8g2); } + u8g2_t *getU8g2(void) { return &u8g2; } + + void setI2CAddress(uint8_t adr) { u8g2_SetI2CAddress(&u8g2, adr); } + + + void enableUTF8Print(void) { cpp_next_cb = u8x8_utf8_next; } + void disableUTF8Print(void) { cpp_next_cb = u8x8_ascii_next; } + + /* u8x8 interface */ + uint8_t getCols(void) { return u8x8_GetCols(u8g2_GetU8x8(&u8g2)); } + uint8_t getRows(void) { return u8x8_GetRows(u8g2_GetU8x8(&u8g2)); } + void drawTile(uint8_t x, uint8_t y, uint8_t cnt, uint8_t *tile_ptr) { + u8x8_DrawTile(u8g2_GetU8x8(&u8g2), x, y, cnt, tile_ptr); } + +#ifdef U8X8_WITH_USER_PTR + void *getUserPtr() { return u8g2_GetUserPtr(&u8g2); } + void setUserPtr(void *p) { u8g2_SetUserPtr(&u8g2, p); } +#endif + + +#ifdef U8X8_USE_PINS + /* set the menu pins before calling begin() or initDisplay() */ + void setMenuSelectPin(uint8_t val) { + u8g2_SetMenuSelectPin(&u8g2, val); } + void setMenuPrevPin(uint8_t val) { + u8g2_SetMenuPrevPin(&u8g2, val); } + void setMenuNextPin(uint8_t val) { + u8g2_SetMenuNextPin(&u8g2, val); } + void setMenuUpPin(uint8_t val) { + u8g2_SetMenuUpPin(&u8g2, val); } + void setMenuDownPin(uint8_t val) { + u8g2_SetMenuDownPin(&u8g2, val); } + void setMenuHomePin(uint8_t val) { + u8g2_SetMenuHomePin(&u8g2, val); } +#endif + + /* return 0 for no event or U8X8_MSG_GPIO_MENU_SELECT, */ + /* U8X8_MSG_GPIO_MENU_NEXT, U8X8_MSG_GPIO_MENU_PREV, */ + /* U8X8_MSG_GPIO_MENU_HOME */ + uint8_t getMenuEvent(void) { return u8x8_GetMenuEvent(u8g2_GetU8x8(&u8g2)); } + + void initDisplay(void) { + u8g2_InitDisplay(&u8g2); } + + void clearDisplay(void) { + u8g2_ClearDisplay(&u8g2); } + + void setPowerSave(uint8_t is_enable) { + u8g2_SetPowerSave(&u8g2, is_enable); } + + void setFlipMode(uint8_t mode) { + u8g2_SetFlipMode(&u8g2, mode); } + + void setContrast(uint8_t value) { + u8g2_SetContrast(&u8g2, value); } + + void setDisplayRotation(const u8g2_cb_t *u8g2_cb) { + u8g2_SetDisplayRotation(&u8g2, u8g2_cb); } + + + bool begin(void) { + /* note: call to u8x8_utf8_init is not required here, this is done in the setup procedures before */ + initDisplay(); clearDisplay(); setPowerSave(0); return 1;} + + void beginSimple(void) { + /* does not clear the display and does not wake up the display */ + /* user is responsible for calling clearDisplay() and setPowerSave(0) */ + initDisplay(); } + +#ifdef U8X8_USE_PINS + /* use U8X8_PIN_NONE if a pin is not required */ + bool begin(uint8_t menu_select_pin, uint8_t menu_next_pin, uint8_t menu_prev_pin, uint8_t menu_up_pin = U8X8_PIN_NONE, uint8_t menu_down_pin = U8X8_PIN_NONE, uint8_t menu_home_pin = U8X8_PIN_NONE) { + setMenuSelectPin(menu_select_pin); + setMenuNextPin(menu_next_pin); + setMenuPrevPin(menu_prev_pin); + setMenuUpPin(menu_up_pin); + setMenuDownPin(menu_down_pin); + setMenuHomePin(menu_home_pin); + return begin(); } +#endif + + /* u8g2 */ + +#ifdef U8G2_WITH_CLIP_WINDOW_SUPPORT + void setMaxClipWindow(void) { u8g2_SetMaxClipWindow(&u8g2); } + void setClipWindow(u8g2_uint_t clip_x0, u8g2_uint_t clip_y0, u8g2_uint_t clip_x1, u8g2_uint_t clip_y1) { + u8g2_SetClipWindow(&u8g2, clip_x0, clip_y0, clip_x1, clip_y1 ); } +#endif /* U8G2_WITH_CLIP_WINDOW_SUPPORT */ + + u8g2_uint_t getDisplayHeight(void) { return u8g2_GetDisplayHeight(&u8g2); } + u8g2_uint_t getDisplayWidth(void) { return u8g2_GetDisplayWidth(&u8g2); } + + + /* u8g2_buffer.c */ + void sendBuffer(void) { u8g2_SendBuffer(&u8g2); } + void clearBuffer(void) { u8g2_ClearBuffer(&u8g2); } + + void firstPage(void) { u8g2_FirstPage(&u8g2); } + uint8_t nextPage(void) { return u8g2_NextPage(&u8g2); } + + uint8_t *getBufferPtr(void) { return u8g2_GetBufferPtr(&u8g2); } + uint8_t getBufferTileHeight(void) { return u8g2_GetBufferTileHeight(&u8g2); } + uint8_t getBufferTileWidth(void) { return u8g2_GetBufferTileWidth(&u8g2); } + uint8_t getPageCurrTileRow(void) { return u8g2_GetBufferCurrTileRow(&u8g2); } // obsolete + void setPageCurrTileRow(uint8_t row) { u8g2_SetBufferCurrTileRow(&u8g2, row); } // obsolete + uint8_t getBufferCurrTileRow(void) { return u8g2_GetBufferCurrTileRow(&u8g2); } + void setBufferCurrTileRow(uint8_t row) { u8g2_SetBufferCurrTileRow(&u8g2, row); } + + // this should be renamed to setBufferAutoClear + void setAutoPageClear(uint8_t mode) { u8g2_SetAutoPageClear(&u8g2, mode); } + + void updateDisplayArea(uint8_t tx, uint8_t ty, uint8_t tw, uint8_t th) + { u8g2_UpdateDisplayArea(&u8g2, tx, ty, tw, th); } + void updateDisplay(void) + { u8g2_UpdateDisplay(&u8g2); } + + /* clib/u8g2.hvline.c */ + void setDrawColor(uint8_t color_index) { u8g2_SetDrawColor(&u8g2, color_index); } + uint8_t getDrawColor(void) { return u8g2_GetDrawColor(&u8g2); } + void drawPixel(u8g2_uint_t x, u8g2_uint_t y) { u8g2_DrawPixel(&u8g2, x, y); } + void drawHLine(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w) { u8g2_DrawHLine(&u8g2, x, y, w); } + void drawVLine(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t h) { u8g2_DrawVLine(&u8g2, x, y, h); } + void drawHVLine(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t len, uint8_t dir) { + u8g2_DrawHVLine(&u8g2, x, y, len, dir); } + + /* u8g2_box.c */ + void drawFrame(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w, u8g2_uint_t h) { u8g2_DrawFrame(&u8g2, x, y, w, h); } + void drawRFrame(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w, u8g2_uint_t h, u8g2_uint_t r) { u8g2_DrawRFrame(&u8g2, x, y, w, h,r); } + void drawBox(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w, u8g2_uint_t h) { u8g2_DrawBox(&u8g2, x, y, w, h); } + void drawRBox(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w, u8g2_uint_t h, u8g2_uint_t r) { u8g2_DrawRBox(&u8g2, x, y, w, h,r); } + + /* u8g2_circle.c */ + void drawCircle(u8g2_uint_t x0, u8g2_uint_t y0, u8g2_uint_t rad, uint8_t opt = U8G2_DRAW_ALL) { u8g2_DrawCircle(&u8g2, x0, y0, rad, opt); } + void drawDisc(u8g2_uint_t x0, u8g2_uint_t y0, u8g2_uint_t rad, uint8_t opt = U8G2_DRAW_ALL) { u8g2_DrawDisc(&u8g2, x0, y0, rad, opt); } + void drawEllipse(u8g2_uint_t x0, u8g2_uint_t y0, u8g2_uint_t rx, u8g2_uint_t ry, uint8_t opt = U8G2_DRAW_ALL) { u8g2_DrawEllipse(&u8g2, x0, y0, rx, ry, opt); } + void drawFilledEllipse(u8g2_uint_t x0, u8g2_uint_t y0, u8g2_uint_t rx, u8g2_uint_t ry, uint8_t opt = U8G2_DRAW_ALL) { u8g2_DrawFilledEllipse(&u8g2, x0, y0, rx, ry, opt); } + + /* u8g2_line.c */ + void drawLine(u8g2_uint_t x1, u8g2_uint_t y1, u8g2_uint_t x2, u8g2_uint_t y2) + { u8g2_DrawLine(&u8g2, x1, y1, x2, y2); } + + /* u8g2_bitmap.c */ + void setBitmapMode(uint8_t is_transparent) + { u8g2_SetBitmapMode(&u8g2, is_transparent); } + void drawBitmap(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t cnt, u8g2_uint_t h, const uint8_t *bitmap) + { u8g2_DrawBitmap(&u8g2, x, y, cnt, h, bitmap); } + void drawXBM(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w, u8g2_uint_t h, const uint8_t *bitmap) + { u8g2_DrawXBM(&u8g2, x, y, w, h, bitmap); } + void drawXBMP(u8g2_uint_t x, u8g2_uint_t y, u8g2_uint_t w, u8g2_uint_t h, const uint8_t *bitmap) + { u8g2_DrawXBMP(&u8g2, x, y, w, h, bitmap); } + + + /* u8g2_polygon.c */ + void drawTriangle(int16_t x0, int16_t y0, int16_t x1, int16_t y1, int16_t x2, int16_t y2) + { u8g2_DrawTriangle(&u8g2, x0, y0, x1, y1, x2, y2); } + + /* u8log_u8g2.c */ + void drawLog(u8g2_uint_t x, u8g2_uint_t y, class U8G2LOG &u8g2log); + + /* u8g2_font.c */ + + void setFont(const uint8_t *font) {u8g2_SetFont(&u8g2, font); } + void setFontMode(uint8_t is_transparent) {u8g2_SetFontMode(&u8g2, is_transparent); } + void setFontDirection(uint8_t dir) {u8g2_SetFontDirection(&u8g2, dir); } + + int8_t getAscent(void) { return u8g2_GetAscent(&u8g2); } + int8_t getDescent(void) { return u8g2_GetDescent(&u8g2); } + + void setFontPosBaseline(void) { u8g2_SetFontPosBaseline(&u8g2); } + void setFontPosBottom(void) { u8g2_SetFontPosBottom(&u8g2); } + void setFontPosTop(void) { u8g2_SetFontPosTop(&u8g2); } + void setFontPosCenter(void) { u8g2_SetFontPosCenter(&u8g2); } + + void setFontRefHeightText(void) { u8g2_SetFontRefHeightText(&u8g2); } + void setFontRefHeightExtendedText(void) { u8g2_SetFontRefHeightExtendedText(&u8g2); } + void setFontRefHeightAll(void) { u8g2_SetFontRefHeightAll(&u8g2); } + + +/* +uint8_t u8g2_IsGlyph(u8g2_t *u8g2, uint16_t requested_encoding); +int8_t u8g2_GetGlyphWidth(u8g2_t *u8g2, uint16_t requested_encoding); +u8g2_uint_t u8g2_GetStrWidth(u8g2_t *u8g2, const char *s); +u8g2_uint_t u8g2_GetUTF8Width(u8g2_t *u8g2, const char *str); +*/ + + u8g2_uint_t drawGlyph(u8g2_uint_t x, u8g2_uint_t y, uint16_t encoding) { return u8g2_DrawGlyph(&u8g2, x, y, encoding); } + u8g2_uint_t drawStr(u8g2_uint_t x, u8g2_uint_t y, const char *s) { return u8g2_DrawStr(&u8g2, x, y, s); } + u8g2_uint_t drawUTF8(u8g2_uint_t x, u8g2_uint_t y, const char *s) { return u8g2_DrawUTF8(&u8g2, x, y, s); } + u8g2_uint_t drawExtUTF8(u8g2_uint_t x, u8g2_uint_t y, uint8_t to_left, const uint16_t *kerning_table, const char *s) + { return u8g2_DrawExtUTF8(&u8g2, x, y, to_left, kerning_table, s); } + + + u8g2_uint_t getStrWidth(const char *s) { return u8g2_GetStrWidth(&u8g2, s); } + u8g2_uint_t getUTF8Width(const char *s) { return u8g2_GetUTF8Width(&u8g2, s); } + + // not required any more, enable UTF8 for print + //void printUTF8(const char *s) { tx += u8g2_DrawUTF8(&u8g2, tx, ty, s); } + + /* screenshot functions for full buffer mode */ + /* vertical top lsb memory architecture */ + void writeBufferPBM(Print &p); + void writeBufferXBM(Print &p); + /* horizontal right lsb memory architecture */ + /* SH1122, LD7032, ST7920, ST7986, LC7981, T6963, SED1330, RA8835, MAX7219, LS0 */ + void writeBufferPBM2(Print &p); + void writeBufferXBM2(Print &p); + + /* virtual function for print base class */ + virtual size_t write(uint8_t v) { + uint16_t e = cpp_next_cb(&(u8g2.u8x8), v); + + if ( e < 0x0fffe ) + tx += u8g2_DrawGlyph(&u8g2, tx, ty, e); + return 1; + } + + virtual size_t write(const uint8_t *buffer, size_t size) { + size_t cnt = 0; + while( size > 0 ) { + cnt += write(*buffer++); + size--; + } + return cnt; + } + + + /* user interface */ +/* +uint8_t u8g2_UserInterfaceSelectionList(u8g2_t *u8g2, const char *title, uint8_t start_pos, const char *sl); +uint8_t u8g2_UserInterfaceMessage(u8g2_t *u8g2, const char *title1, const char *title2, const char *title3, const char *buttons); +uint8_t u8g2_UserInterfaceInputValue(u8g2_t *u8g2, const char *title, const char *pre, uint8_t *value, uint8_t lo, uint8_t hi, uint8_t digits, const char *post); +*/ + + uint8_t userInterfaceSelectionList(const char *title, uint8_t start_pos, const char *sl) { + return u8g2_UserInterfaceSelectionList(&u8g2, title, start_pos, sl); } + uint8_t userInterfaceMessage(const char *title1, const char *title2, const char *title3, const char *buttons) { + return u8g2_UserInterfaceMessage(&u8g2, title1, title2, title3, buttons); } + uint8_t userInterfaceInputValue(const char *title, const char *pre, uint8_t *value, uint8_t lo, uint8_t hi, uint8_t digits, const char *post) { + return u8g2_UserInterfaceInputValue(&u8g2, title, pre, value, lo, hi, digits, post); } + + + /* LiquidCrystal compatible functions */ + void home(void) { tx = 0; ty = 0; u8x8_utf8_init(u8g2_GetU8x8(&u8g2)); } + void clear(void) { home(); clearDisplay(); clearBuffer(); } + void noDisplay(void) { u8g2_SetPowerSave(&u8g2, 1); } + void display(void) { u8g2_SetPowerSave(&u8g2, 0); } + void setCursor(u8g2_uint_t x, u8g2_uint_t y) { tx = x; ty = y; } + + /* u8glib compatible functions */ + void sleepOn(void) { u8g2_SetPowerSave(&u8g2, 1); } + void sleepOff(void) { u8g2_SetPowerSave(&u8g2, 0); } + void setColorIndex(uint8_t color_index) { u8g2_SetDrawColor(&u8g2, color_index); } + uint8_t getColorIndex(void) { return u8g2_GetDrawColor(&u8g2); } + int8_t getFontAscent(void) { return u8g2_GetAscent(&u8g2); } + int8_t getFontDescent(void) { return u8g2_GetDescent(&u8g2); } + int8_t getMaxCharHeight(void) { return u8g2_GetMaxCharHeight(&u8g2); } + int8_t getMaxCharWidth(void) { return u8g2_GetMaxCharWidth(&u8g2); } + u8g2_uint_t getHeight() { return u8g2_GetDisplayHeight(&u8g2); } + u8g2_uint_t getWidth() { return u8g2_GetDisplayWidth(&u8g2); } + +}; + +class U8G2LOG: public Print +{ + + public: + u8log_t u8log; + + /* the constructor does nothing, use begin() instead */ + U8G2LOG(void) { } + + /* connect to u8g2, draw to u8g2 whenever required */ + bool begin(class U8G2 &u8g2, uint8_t width, uint8_t height, uint8_t *buf) { + u8log_Init(&u8log, width, height, buf); + u8log_SetCallback(&u8log, u8log_u8g2_cb, u8g2.getU8g2()); + return true; + } + + /* disconnected version, manual redraw required */ + bool begin(uint8_t width, uint8_t height, uint8_t *buf) { + u8log_Init(&u8log, width, height, buf); + return true; + } + + void setLineHeightOffset(int8_t line_height_offset) { + u8log_SetLineHeightOffset(&u8log, line_height_offset); } + + void setRedrawMode(uint8_t is_redraw_line_for_each_char) { + u8log_SetRedrawMode(&u8log, is_redraw_line_for_each_char); } + + /* virtual function for print base class */ + virtual size_t write(uint8_t v) { + u8log_WriteChar(&u8log, v); + return 1; + } + + virtual size_t write(const uint8_t *buffer, size_t size) { + size_t cnt = 0; + while( size > 0 ) { + cnt += write(*buffer++); + size--; + } + return cnt; + } + + void writeString(const char *s) { u8log_WriteString(&u8log, s); } + void writeChar(uint8_t c) { u8log_WriteChar(&u8log, c); } + void writeHex8(uint8_t b) { u8log_WriteHex8(&u8log, b); } + void writeHex16(uint16_t v) { u8log_WriteHex16(&u8log, v); } + void writeHex32(uint32_t v) { u8log_WriteHex32(&u8log, v); } + void writeDec8(uint8_t v, uint8_t d) { u8log_WriteDec8(&u8log, v, d); } + void writeDec16(uint8_t v, uint8_t d) { u8log_WriteDec16(&u8log, v, d); } +}; + +/* u8log_u8g2.c */ +inline void U8G2::drawLog(u8g2_uint_t x, u8g2_uint_t y, class U8G2LOG &u8g2log) +{ + u8g2_DrawLog(&u8g2, x, y, &(u8g2log.u8log)); +} + + +/* + U8G2____ + memory + "1" one page + "2" two pages + "f" full frame buffer + communication + "SW SPI" + +*/ + + +#ifdef U8X8_USE_PINS + +/* null device */ +class U8G2_NULL : public U8G2 { + public: U8G2_NULL(const u8g2_cb_t *rotation) : U8G2() { + u8g2_Setup_null(&u8g2, rotation, u8x8_byte_empty, u8x8_dummy_cb); + } +}; + +/* generated code (codebuild), u8g2 project */ +class U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X32_NONAME_1_6800 : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_NONAME_1_8080 : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_ADAFRUIT_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X32_ADAFRUIT_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X32_ADAFRUIT_1_6800 : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_ADAFRUIT_1_8080 : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X32_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X32_NONAME_2_6800 : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_NONAME_2_8080 : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_ADAFRUIT_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X32_ADAFRUIT_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X32_ADAFRUIT_2_6800 : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_ADAFRUIT_2_8080 : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X32_NONAME_F_6800 : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_NONAME_F_8080 : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_noname_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_ADAFRUIT_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X32_ADAFRUIT_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X32_ADAFRUIT_F_6800 : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_ADAFRUIT_F_8080 : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x32_adafruit_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X32_NONAME_1_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_noname_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X32_NONAME_1_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_noname_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X32_ADAFRUIT_1_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_adafruit_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X32_ADAFRUIT_1_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_adafruit_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X32_NONAME_2_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_noname_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X32_NONAME_2_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_noname_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X32_ADAFRUIT_2_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_adafruit_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X32_ADAFRUIT_2_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_adafruit_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X32_NONAME_F_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_noname_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X32_NONAME_F_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_NONAME_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_noname_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X32_ADAFRUIT_F_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_adafruit_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X32_ADAFRUIT_F_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X32_ADAFRUIT_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x32_adafruit_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X64_ADAFRUIT_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X64_ADAFRUIT_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X64_ADAFRUIT_1_6800 : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_ADAFRUIT_1_8080 : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_RAYSTAR_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X64_RAYSTAR_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X64_RAYSTAR_1_6800 : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_RAYSTAR_1_8080 : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_ADAFRUIT_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X64_ADAFRUIT_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X64_ADAFRUIT_2_6800 : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_ADAFRUIT_2_8080 : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_RAYSTAR_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X64_RAYSTAR_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X64_RAYSTAR_2_6800 : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_RAYSTAR_2_8080 : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_ADAFRUIT_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X64_ADAFRUIT_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X64_ADAFRUIT_F_6800 : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_ADAFRUIT_F_8080 : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_adafruit_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_RAYSTAR_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1305_128X64_RAYSTAR_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1305_128X64_RAYSTAR_F_6800 : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_RAYSTAR_F_8080 : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_128x64_raystar_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1305_128X64_ADAFRUIT_1_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_adafruit_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X64_ADAFRUIT_1_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_adafruit_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X64_RAYSTAR_1_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_raystar_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X64_RAYSTAR_1_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_raystar_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X64_ADAFRUIT_2_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_adafruit_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X64_ADAFRUIT_2_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_adafruit_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X64_RAYSTAR_2_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_raystar_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X64_RAYSTAR_2_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_raystar_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X64_ADAFRUIT_F_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_adafruit_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X64_ADAFRUIT_F_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_ADAFRUIT_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_adafruit_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1305_128X64_RAYSTAR_F_SW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_raystar_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1305_128X64_RAYSTAR_F_HW_I2C : public U8G2 { + public: U8G2_SSD1305_128X64_RAYSTAR_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1305_i2c_128x64_raystar_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_2040X16_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_2040X16_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_2040X16_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_2040X16_1_6800 : public U8G2 { + public: U8G2_SSD1306_2040X16_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_2040X16_1_8080 : public U8G2 { + public: U8G2_SSD1306_2040X16_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_2040X16_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_2040X16_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_2040X16_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_2040X16_2_6800 : public U8G2 { + public: U8G2_SSD1306_2040X16_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_2040X16_2_8080 : public U8G2 { + public: U8G2_SSD1306_2040X16_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_2040X16_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_2040X16_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_2040X16_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_2040X16_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_2040X16_F_6800 : public U8G2 { + public: U8G2_SSD1306_2040X16_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_2040X16_F_8080 : public U8G2 { + public: U8G2_SSD1306_2040X16_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_2040x16_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_1_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_1_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_VCOMH0_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_VCOMH0_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_1_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_1_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_ALT0_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_ALT0_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_1_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_1_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_NONAME_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_2_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_2_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_VCOMH0_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_VCOMH0_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_2_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_2_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_ALT0_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_ALT0_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_2_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_2_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_NONAME_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_F_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_F_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_noname_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_VCOMH0_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_VCOMH0_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_F_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_VCOMH0_F_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X64_ALT0_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X64_ALT0_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_F_6800 : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_ALT0_F_8080 : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x64_alt0_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X64_NONAME_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_noname_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_NONAME_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_noname_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_VCOMH0_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_VCOMH0_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_ALT0_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_alt0_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_ALT0_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_alt0_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_NONAME_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_noname_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_NONAME_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_noname_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_VCOMH0_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_VCOMH0_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_ALT0_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_alt0_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_ALT0_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_alt0_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_NONAME_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_NONAME_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_NONAME_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_VCOMH0_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_VCOMH0_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_VCOMH0_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X64_ALT0_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_alt0_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X64_ALT0_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X64_ALT0_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x64_alt0_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_72X40_ER_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_72X40_ER_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_72X40_ER_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_72X40_ER_1_6800 : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_72X40_ER_1_8080 : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_72X40_ER_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_72X40_ER_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_72X40_ER_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_72X40_ER_2_6800 : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_72X40_ER_2_8080 : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_72X40_ER_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_72X40_ER_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_72X40_ER_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_72X40_ER_F_6800 : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_72X40_ER_F_8080 : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_72x40_er_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_72X40_ER_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_72x40_er_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_72X40_ER_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_72X40_ER_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_72x40_er_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_72X40_ER_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_72x40_er_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_72X40_ER_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_72X40_ER_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_72x40_er_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_72X40_ER_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_72x40_er_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_72X40_ER_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_72X40_ER_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_72x40_er_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_NONAME_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_1_6800 : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_1_8080 : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_VCOMH0_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_VCOMH0_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_1_6800 : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_1_8080 : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_WINSTAR_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_WINSTAR_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_1_6800 : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_1_8080 : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_NONAME_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_2_6800 : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_2_8080 : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_VCOMH0_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_VCOMH0_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_2_6800 : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_2_8080 : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_WINSTAR_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_WINSTAR_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_2_6800 : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_2_8080 : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_NONAME_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_F_6800 : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_F_8080 : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_noname_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_VCOMH0_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_VCOMH0_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_F_6800 : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_VCOMH0_F_8080 : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X64_WINSTAR_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X64_WINSTAR_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_F_6800 : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_WINSTAR_F_8080 : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x64_winstar_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X64_NONAME_1_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_noname_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_NONAME_1_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_noname_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_VCOMH0_1_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_VCOMH0_1_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_vcomh0_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_WINSTAR_1_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_winstar_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_WINSTAR_1_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_winstar_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_NONAME_2_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_noname_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_NONAME_2_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_noname_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_VCOMH0_2_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_VCOMH0_2_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_vcomh0_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_WINSTAR_2_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_winstar_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_WINSTAR_2_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_winstar_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_NONAME_F_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_noname_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_NONAME_F_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_NONAME_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_noname_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_VCOMH0_F_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_VCOMH0_F_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_VCOMH0_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_vcomh0_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X64_WINSTAR_F_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_winstar_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X64_WINSTAR_F_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X64_WINSTAR_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x64_winstar_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_72X40_WISE_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_72X40_WISE_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_72X40_WISE_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_72X40_WISE_1_6800 : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_72X40_WISE_1_8080 : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_72X40_WISE_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_72X40_WISE_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_72X40_WISE_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_72X40_WISE_2_6800 : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_72X40_WISE_2_8080 : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_72X40_WISE_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_72X40_WISE_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_72X40_WISE_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_72X40_WISE_F_6800 : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_72X40_WISE_F_8080 : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_72x40_wise_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_72X40_WISE_1_SW_I2C : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_72x40_wise_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_72X40_WISE_1_HW_I2C : public U8G2 { + public: U8G2_SH1106_72X40_WISE_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_72x40_wise_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_72X40_WISE_2_SW_I2C : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_72x40_wise_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_72X40_WISE_2_HW_I2C : public U8G2 { + public: U8G2_SH1106_72X40_WISE_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_72x40_wise_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_72X40_WISE_F_SW_I2C : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_72x40_wise_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_72X40_WISE_F_HW_I2C : public U8G2 { + public: U8G2_SH1106_72X40_WISE_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_72x40_wise_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_64X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_64X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_64X32_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_64X32_1_6800 : public U8G2 { + public: U8G2_SH1106_64X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_64X32_1_8080 : public U8G2 { + public: U8G2_SH1106_64X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_64X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_64X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_64X32_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_64X32_2_6800 : public U8G2 { + public: U8G2_SH1106_64X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_64X32_2_8080 : public U8G2 { + public: U8G2_SH1106_64X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_64X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_64X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_64X32_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_64X32_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_64X32_F_6800 : public U8G2 { + public: U8G2_SH1106_64X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_64X32_F_8080 : public U8G2 { + public: U8G2_SH1106_64X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_64x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_64X32_1_SW_I2C : public U8G2 { + public: U8G2_SH1106_64X32_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_64x32_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_64X32_1_HW_I2C : public U8G2 { + public: U8G2_SH1106_64X32_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_64x32_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_64X32_2_SW_I2C : public U8G2 { + public: U8G2_SH1106_64X32_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_64x32_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_64X32_2_HW_I2C : public U8G2 { + public: U8G2_SH1106_64X32_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_64x32_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_64X32_F_SW_I2C : public U8G2 { + public: U8G2_SH1106_64X32_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_64x32_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_64X32_F_HW_I2C : public U8G2 { + public: U8G2_SH1106_64X32_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_64x32_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_64X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_64X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_64X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_64X128_1_6800 : public U8G2 { + public: U8G2_SH1107_64X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_64X128_1_8080 : public U8G2 { + public: U8G2_SH1107_64X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_64X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_64X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_64X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_64X128_2_6800 : public U8G2 { + public: U8G2_SH1107_64X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_64X128_2_8080 : public U8G2 { + public: U8G2_SH1107_64X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_64X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_64X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_64X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_64X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_64X128_F_6800 : public U8G2 { + public: U8G2_SH1107_64X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_64X128_F_8080 : public U8G2 { + public: U8G2_SH1107_64X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_64x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_64X128_1_SW_I2C : public U8G2 { + public: U8G2_SH1107_64X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_64x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_64X128_1_HW_I2C : public U8G2 { + public: U8G2_SH1107_64X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_64x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_64X128_2_SW_I2C : public U8G2 { + public: U8G2_SH1107_64X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_64x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_64X128_2_HW_I2C : public U8G2 { + public: U8G2_SH1107_64X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_64x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_64X128_F_SW_I2C : public U8G2 { + public: U8G2_SH1107_64X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_64x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_64X128_F_HW_I2C : public U8G2 { + public: U8G2_SH1107_64X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_64x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_SEEED_96X96_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_SEEED_96X96_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_SEEED_96X96_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_1_6800 : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_1_8080 : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_SEEED_96X96_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_SEEED_96X96_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_2_6800 : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_2_8080 : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_SEEED_96X96_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_SEEED_96X96_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_F_6800 : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_F_8080 : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_96x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_96X96_1_SW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_96x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_SEEED_96X96_1_HW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_96x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_SEEED_96X96_2_SW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_96x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_SEEED_96X96_2_HW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_96x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_SEEED_96X96_F_SW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_96x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_SEEED_96X96_F_HW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_96X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_96x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_128X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_128X128_1_6800 : public U8G2 { + public: U8G2_SH1107_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_128X128_1_8080 : public U8G2 { + public: U8G2_SH1107_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_PIMORONI_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_PIMORONI_128X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_1_6800 : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_1_8080 : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_SEEED_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_SEEED_128X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_1_6800 : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_1_8080 : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_128X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_128X128_2_6800 : public U8G2 { + public: U8G2_SH1107_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_128X128_2_8080 : public U8G2 { + public: U8G2_SH1107_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_PIMORONI_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_PIMORONI_128X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_2_6800 : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_2_8080 : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_SEEED_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_SEEED_128X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_2_6800 : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_2_8080 : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_128X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_128X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_128X128_F_6800 : public U8G2 { + public: U8G2_SH1107_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_128X128_F_8080 : public U8G2 { + public: U8G2_SH1107_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_PIMORONI_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_PIMORONI_128X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_F_6800 : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_PIMORONI_128X128_F_8080 : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1107_SEEED_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1107_SEEED_128X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_F_6800 : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_SEEED_128X128_F_8080 : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_seeed_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1107_128X128_1_SW_I2C : public U8G2 { + public: U8G2_SH1107_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_128X128_1_HW_I2C : public U8G2 { + public: U8G2_SH1107_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_PIMORONI_128X128_1_SW_I2C : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_PIMORONI_128X128_1_HW_I2C : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_pimoroni_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_SEEED_128X128_1_SW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_SEEED_128X128_1_HW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_128X128_2_SW_I2C : public U8G2 { + public: U8G2_SH1107_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_128X128_2_HW_I2C : public U8G2 { + public: U8G2_SH1107_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_PIMORONI_128X128_2_SW_I2C : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_PIMORONI_128X128_2_HW_I2C : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_pimoroni_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_SEEED_128X128_2_SW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_SEEED_128X128_2_HW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_128X128_F_SW_I2C : public U8G2 { + public: U8G2_SH1107_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_128X128_F_HW_I2C : public U8G2 { + public: U8G2_SH1107_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_PIMORONI_128X128_F_SW_I2C : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_PIMORONI_128X128_F_HW_I2C : public U8G2 { + public: U8G2_SH1107_PIMORONI_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_pimoroni_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1107_SEEED_128X128_F_SW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1107_SEEED_128X128_F_HW_I2C : public U8G2 { + public: U8G2_SH1107_SEEED_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1107_i2c_seeed_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1108_160X160_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1108_160X160_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1108_160X160_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1108_160X160_1_6800 : public U8G2 { + public: U8G2_SH1108_160X160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1108_160X160_1_8080 : public U8G2 { + public: U8G2_SH1108_160X160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1108_160X160_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1108_160X160_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1108_160X160_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1108_160X160_2_6800 : public U8G2 { + public: U8G2_SH1108_160X160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1108_160X160_2_8080 : public U8G2 { + public: U8G2_SH1108_160X160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1108_160X160_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1108_160X160_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1108_160X160_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1108_160X160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1108_160X160_F_6800 : public U8G2 { + public: U8G2_SH1108_160X160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1108_160X160_F_8080 : public U8G2 { + public: U8G2_SH1108_160X160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_160x160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1108_160X160_1_SW_I2C : public U8G2 { + public: U8G2_SH1108_160X160_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_i2c_160x160_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1108_160X160_1_HW_I2C : public U8G2 { + public: U8G2_SH1108_160X160_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_i2c_160x160_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1108_160X160_2_SW_I2C : public U8G2 { + public: U8G2_SH1108_160X160_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_i2c_160x160_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1108_160X160_2_HW_I2C : public U8G2 { + public: U8G2_SH1108_160X160_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_i2c_160x160_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1108_160X160_F_SW_I2C : public U8G2 { + public: U8G2_SH1108_160X160_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_i2c_160x160_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1108_160X160_F_HW_I2C : public U8G2 { + public: U8G2_SH1108_160X160_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1108_i2c_160x160_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1122_256X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1122_256X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1122_256X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1122_256X64_1_6800 : public U8G2 { + public: U8G2_SH1122_256X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1122_256X64_1_8080 : public U8G2 { + public: U8G2_SH1122_256X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1122_256X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1122_256X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1122_256X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1122_256X64_2_6800 : public U8G2 { + public: U8G2_SH1122_256X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1122_256X64_2_8080 : public U8G2 { + public: U8G2_SH1122_256X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1122_256X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1122_256X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1122_256X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1122_256X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1122_256X64_F_6800 : public U8G2 { + public: U8G2_SH1122_256X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1122_256X64_F_8080 : public U8G2 { + public: U8G2_SH1122_256X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_256x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1122_256X64_1_SW_I2C : public U8G2 { + public: U8G2_SH1122_256X64_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_i2c_256x64_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1122_256X64_1_HW_I2C : public U8G2 { + public: U8G2_SH1122_256X64_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_i2c_256x64_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1122_256X64_2_SW_I2C : public U8G2 { + public: U8G2_SH1122_256X64_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_i2c_256x64_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1122_256X64_2_HW_I2C : public U8G2 { + public: U8G2_SH1122_256X64_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_i2c_256x64_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1122_256X64_F_SW_I2C : public U8G2 { + public: U8G2_SH1122_256X64_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_i2c_256x64_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1122_256X64_F_HW_I2C : public U8G2 { + public: U8G2_SH1122_256X64_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1122_i2c_256x64_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X32_UNIVISION_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X32_UNIVISION_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X32_UNIVISION_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_1_6800 : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_1_8080 : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X32_WINSTAR_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X32_WINSTAR_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_1_6800 : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_1_8080 : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X32_UNIVISION_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X32_UNIVISION_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_2_6800 : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_2_8080 : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X32_WINSTAR_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X32_WINSTAR_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_2_6800 : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_2_8080 : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X32_UNIVISION_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X32_UNIVISION_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_F_6800 : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_F_8080 : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_univision_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_128X32_WINSTAR_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_128X32_WINSTAR_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_F_6800 : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_WINSTAR_F_8080 : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_128x32_winstar_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_128X32_UNIVISION_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_univision_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_univision_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X32_WINSTAR_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_winstar_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X32_WINSTAR_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_winstar_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X32_UNIVISION_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_univision_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X32_UNIVISION_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_univision_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X32_WINSTAR_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_winstar_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X32_WINSTAR_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_winstar_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X32_UNIVISION_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_univision_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X32_UNIVISION_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_UNIVISION_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_univision_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_128X32_WINSTAR_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_winstar_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_128X32_WINSTAR_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_128X32_WINSTAR_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_128x32_winstar_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X32_VISIONOX_1_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X32_VISIONOX_1_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X32_VISIONOX_1_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_1_6800 : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_1_8080 : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_2_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X32_VISIONOX_2_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X32_VISIONOX_2_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_2_6800 : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_2_8080 : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_F_4W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SH1106_128X32_VISIONOX_F_4W_HW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SH1106_128X32_VISIONOX_F_3W_SW_SPI : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_F_6800 : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_F_8080 : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_128x32_visionox_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SH1106_128X32_VISIONOX_1_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x32_visionox_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X32_VISIONOX_1_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x32_visionox_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X32_VISIONOX_2_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x32_visionox_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X32_VISIONOX_2_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x32_visionox_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SH1106_128X32_VISIONOX_F_SW_I2C : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x32_visionox_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SH1106_128X32_VISIONOX_F_HW_I2C : public U8G2 { + public: U8G2_SH1106_128X32_VISIONOX_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sh1106_i2c_128x32_visionox_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X48_ER_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X48_ER_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X48_ER_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X48_ER_1_6800 : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X48_ER_1_8080 : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X48_ER_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X48_ER_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X48_ER_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X48_ER_2_6800 : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X48_ER_2_8080 : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X48_ER_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X48_ER_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X48_ER_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X48_ER_F_6800 : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X48_ER_F_8080 : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x48_er_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X48_ER_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x48_er_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X48_ER_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X48_ER_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x48_er_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X48_ER_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x48_er_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X48_ER_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X48_ER_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x48_er_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X48_ER_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x48_er_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X48_ER_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X48_ER_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x48_er_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_48X64_WINSTAR_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_48X64_WINSTAR_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_48X64_WINSTAR_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_1_6800 : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_1_8080 : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_48X64_WINSTAR_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_48X64_WINSTAR_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_2_6800 : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_2_8080 : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_48X64_WINSTAR_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_48X64_WINSTAR_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_F_6800 : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_F_8080 : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_48x64_winstar_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_48X64_WINSTAR_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_48x64_winstar_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_48X64_WINSTAR_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_48x64_winstar_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_48X64_WINSTAR_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_48x64_winstar_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_48X64_WINSTAR_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_48x64_winstar_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_48X64_WINSTAR_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_48x64_winstar_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_48X64_WINSTAR_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_48X64_WINSTAR_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_48x64_winstar_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X32_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X32_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X32_NONAME_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_1_6800 : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_1_8080 : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_1F_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X32_1F_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X32_1F_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X32_1F_1_6800 : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_1F_1_8080 : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X32_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X32_NONAME_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_2_6800 : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_2_8080 : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_1F_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X32_1F_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X32_1F_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X32_1F_2_6800 : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_1F_2_8080 : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X32_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X32_NONAME_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_F_6800 : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_F_8080 : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_noname_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_1F_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_64X32_1F_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_64X32_1F_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_64X32_1F_F_6800 : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_1F_F_8080 : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_64x32_1f_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_64X32_NONAME_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_noname_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X32_NONAME_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_noname_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X32_1F_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_1f_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X32_1F_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_1F_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_1f_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X32_NONAME_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_noname_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X32_NONAME_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_noname_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X32_1F_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_1f_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X32_1F_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_1F_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_1f_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X32_NONAME_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_noname_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X32_NONAME_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_NONAME_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_noname_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_64X32_1F_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_1f_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_64X32_1F_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_64X32_1F_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_64x32_1f_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_96X16_ER_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_96X16_ER_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_96X16_ER_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_96X16_ER_1_6800 : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_96X16_ER_1_8080 : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_96X16_ER_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_96X16_ER_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_96X16_ER_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_96X16_ER_2_6800 : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_96X16_ER_2_8080 : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_96X16_ER_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1306_96X16_ER_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1306_96X16_ER_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1306_96X16_ER_F_6800 : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_96X16_ER_F_8080 : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_96x16_er_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1306_96X16_ER_1_SW_I2C : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_96x16_er_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_96X16_ER_1_HW_I2C : public U8G2 { + public: U8G2_SSD1306_96X16_ER_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_96x16_er_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_96X16_ER_2_SW_I2C : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_96x16_er_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_96X16_ER_2_HW_I2C : public U8G2 { + public: U8G2_SSD1306_96X16_ER_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_96x16_er_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1306_96X16_ER_F_SW_I2C : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_96x16_er_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1306_96X16_ER_F_HW_I2C : public U8G2 { + public: U8G2_SSD1306_96X16_ER_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1306_i2c_96x16_er_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME2_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1309_128X64_NONAME2_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME2_1_6800 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME2_1_8080 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME2_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1309_128X64_NONAME2_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME2_2_6800 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME2_2_8080 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME2_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1309_128X64_NONAME2_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME2_F_6800 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME2_F_8080 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname2_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME2_1_SW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname2_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1309_128X64_NONAME2_1_HW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname2_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME2_2_SW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname2_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1309_128X64_NONAME2_2_HW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname2_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME2_F_SW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname2_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1309_128X64_NONAME2_F_HW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME2_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname2_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME0_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1309_128X64_NONAME0_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME0_1_6800 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME0_1_8080 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME0_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1309_128X64_NONAME0_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME0_2_6800 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME0_2_8080 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME0_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1309_128X64_NONAME0_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME0_F_6800 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME0_F_8080 : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_128x64_noname0_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1309_128X64_NONAME0_1_SW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname0_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1309_128X64_NONAME0_1_HW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname0_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME0_2_SW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname0_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1309_128X64_NONAME0_2_HW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname0_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1309_128X64_NONAME0_F_SW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname0_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1309_128X64_NONAME0_F_HW_I2C : public U8G2 { + public: U8G2_SSD1309_128X64_NONAME0_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1309_i2c_128x64_noname0_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1316_128X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1316_128X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1316_128X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1316_128X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1316_128X32_1_6800 : public U8G2 { + public: U8G2_SSD1316_128X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1316_128X32_1_8080 : public U8G2 { + public: U8G2_SSD1316_128X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1316_128X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1316_128X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1316_128X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1316_128X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1316_128X32_2_6800 : public U8G2 { + public: U8G2_SSD1316_128X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1316_128X32_2_8080 : public U8G2 { + public: U8G2_SSD1316_128X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1316_128X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1316_128X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1316_128X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1316_128X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1316_128X32_F_6800 : public U8G2 { + public: U8G2_SSD1316_128X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1316_128X32_F_8080 : public U8G2 { + public: U8G2_SSD1316_128X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_128x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1316_128X32_1_SW_I2C : public U8G2 { + public: U8G2_SSD1316_128X32_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_i2c_128x32_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1316_128X32_1_HW_I2C : public U8G2 { + public: U8G2_SSD1316_128X32_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_i2c_128x32_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1316_128X32_2_SW_I2C : public U8G2 { + public: U8G2_SSD1316_128X32_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_i2c_128x32_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1316_128X32_2_HW_I2C : public U8G2 { + public: U8G2_SSD1316_128X32_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_i2c_128x32_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1316_128X32_F_SW_I2C : public U8G2 { + public: U8G2_SSD1316_128X32_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_i2c_128x32_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1316_128X32_F_HW_I2C : public U8G2 { + public: U8G2_SSD1316_128X32_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1316_i2c_128x32_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1317_96X96_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1317_96X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1317_96X96_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1317_96X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1317_96X96_1_6800 : public U8G2 { + public: U8G2_SSD1317_96X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1317_96X96_1_8080 : public U8G2 { + public: U8G2_SSD1317_96X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1317_96X96_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1317_96X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1317_96X96_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1317_96X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1317_96X96_2_6800 : public U8G2 { + public: U8G2_SSD1317_96X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1317_96X96_2_8080 : public U8G2 { + public: U8G2_SSD1317_96X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1317_96X96_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1317_96X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1317_96X96_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1317_96X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1317_96X96_F_6800 : public U8G2 { + public: U8G2_SSD1317_96X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1317_96X96_F_8080 : public U8G2 { + public: U8G2_SSD1317_96X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_96x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1317_96X96_1_SW_I2C : public U8G2 { + public: U8G2_SSD1317_96X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_i2c_96x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1317_96X96_1_HW_I2C : public U8G2 { + public: U8G2_SSD1317_96X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_i2c_96x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1317_96X96_2_SW_I2C : public U8G2 { + public: U8G2_SSD1317_96X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_i2c_96x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1317_96X96_2_HW_I2C : public U8G2 { + public: U8G2_SSD1317_96X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_i2c_96x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1317_96X96_F_SW_I2C : public U8G2 { + public: U8G2_SSD1317_96X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_i2c_96x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1317_96X96_F_HW_I2C : public U8G2 { + public: U8G2_SSD1317_96X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1317_i2c_96x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1318_128X96_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1318_128X96_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1318_128X96_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1318_128X96_1_6800 : public U8G2 { + public: U8G2_SSD1318_128X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_1_8080 : public U8G2 { + public: U8G2_SSD1318_128X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1318_128X96_XCP_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1318_128X96_XCP_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_1_6800 : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_1_8080 : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1318_128X96_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1318_128X96_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1318_128X96_2_6800 : public U8G2 { + public: U8G2_SSD1318_128X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_2_8080 : public U8G2 { + public: U8G2_SSD1318_128X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1318_128X96_XCP_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1318_128X96_XCP_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_2_6800 : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_2_8080 : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1318_128X96_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1318_128X96_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1318_128X96_F_6800 : public U8G2 { + public: U8G2_SSD1318_128X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_F_8080 : public U8G2 { + public: U8G2_SSD1318_128X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1318_128X96_XCP_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1318_128X96_XCP_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_F_6800 : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_XCP_F_8080 : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_128x96_xcp_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1318_128X96_1_SW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1318_128X96_1_HW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1318_128X96_XCP_1_SW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_xcp_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1318_128X96_XCP_1_HW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_xcp_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1318_128X96_2_SW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1318_128X96_2_HW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1318_128X96_XCP_2_SW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_xcp_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1318_128X96_XCP_2_HW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_xcp_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1318_128X96_F_SW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1318_128X96_F_HW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1318_128X96_XCP_F_SW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_xcp_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1318_128X96_XCP_F_HW_I2C : public U8G2 { + public: U8G2_SSD1318_128X96_XCP_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1318_i2c_128x96_xcp_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1325_NHD_128X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1325_NHD_128X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_1_6800 : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_1_8080 : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1325_NHD_128X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1325_NHD_128X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_2_6800 : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_2_8080 : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1325_NHD_128X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_F_6800 : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_F_8080 : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_nhd_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1325_NHD_128X64_1_SW_I2C : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_i2c_nhd_128x64_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1325_NHD_128X64_1_HW_I2C : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_i2c_nhd_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1325_NHD_128X64_2_SW_I2C : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_i2c_nhd_128x64_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1325_NHD_128X64_2_HW_I2C : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_i2c_nhd_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1325_NHD_128X64_F_SW_I2C : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_i2c_nhd_128x64_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1325_NHD_128X64_F_HW_I2C : public U8G2 { + public: U8G2_SSD1325_NHD_128X64_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1325_i2c_nhd_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD0323_OS128064_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD0323_OS128064_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD0323_OS128064_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD0323_OS128064_1_6800 : public U8G2 { + public: U8G2_SSD0323_OS128064_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD0323_OS128064_1_8080 : public U8G2 { + public: U8G2_SSD0323_OS128064_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD0323_OS128064_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD0323_OS128064_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD0323_OS128064_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD0323_OS128064_2_6800 : public U8G2 { + public: U8G2_SSD0323_OS128064_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD0323_OS128064_2_8080 : public U8G2 { + public: U8G2_SSD0323_OS128064_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD0323_OS128064_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD0323_OS128064_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD0323_OS128064_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD0323_OS128064_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD0323_OS128064_F_6800 : public U8G2 { + public: U8G2_SSD0323_OS128064_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD0323_OS128064_F_8080 : public U8G2 { + public: U8G2_SSD0323_OS128064_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_os128064_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD0323_OS128064_1_SW_I2C : public U8G2 { + public: U8G2_SSD0323_OS128064_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_i2c_os128064_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD0323_OS128064_1_HW_I2C : public U8G2 { + public: U8G2_SSD0323_OS128064_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_i2c_os128064_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD0323_OS128064_2_SW_I2C : public U8G2 { + public: U8G2_SSD0323_OS128064_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_i2c_os128064_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD0323_OS128064_2_HW_I2C : public U8G2 { + public: U8G2_SSD0323_OS128064_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_i2c_os128064_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD0323_OS128064_F_SW_I2C : public U8G2 { + public: U8G2_SSD0323_OS128064_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_i2c_os128064_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD0323_OS128064_F_HW_I2C : public U8G2 { + public: U8G2_SSD0323_OS128064_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd0323_i2c_os128064_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1326_ER_256X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1326_ER_256X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1326_ER_256X32_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1326_ER_256X32_1_6800 : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1326_ER_256X32_1_8080 : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1326_ER_256X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1326_ER_256X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1326_ER_256X32_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1326_ER_256X32_2_6800 : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1326_ER_256X32_2_8080 : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1326_ER_256X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1326_ER_256X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1326_ER_256X32_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1326_ER_256X32_F_6800 : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1326_ER_256X32_F_8080 : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_er_256x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1326_ER_256X32_1_SW_I2C : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_i2c_er_256x32_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1326_ER_256X32_1_HW_I2C : public U8G2 { + public: U8G2_SSD1326_ER_256X32_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_i2c_er_256x32_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1326_ER_256X32_2_SW_I2C : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_i2c_er_256x32_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1326_ER_256X32_2_HW_I2C : public U8G2 { + public: U8G2_SSD1326_ER_256X32_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_i2c_er_256x32_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1326_ER_256X32_F_SW_I2C : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_i2c_er_256x32_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1326_ER_256X32_F_HW_I2C : public U8G2 { + public: U8G2_SSD1326_ER_256X32_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1326_i2c_er_256x32_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_WS_96X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_WS_96X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_WS_96X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_WS_96X64_1_6800 : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_96X64_1_8080 : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_96X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_WS_96X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_WS_96X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_WS_96X64_2_6800 : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_96X64_2_8080 : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_96X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_WS_96X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_WS_96X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_WS_96X64_F_6800 : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_96X64_F_8080 : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_96x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_96X64_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_96x64_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_WS_96X64_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_96X64_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_96x64_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_WS_96X64_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_96x64_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_WS_96X64_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_96X64_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_96x64_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_WS_96X64_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_96x64_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_WS_96X64_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_96X64_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_96x64_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_SEEED_96X96_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_SEEED_96X96_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_SEEED_96X96_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_1_6800 : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_1_8080 : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_SEEED_96X96_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_SEEED_96X96_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_2_6800 : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_2_8080 : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_SEEED_96X96_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_SEEED_96X96_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_F_6800 : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_F_8080 : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_seeed_96x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_SEEED_96X96_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_seeed_96x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_SEEED_96X96_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_seeed_96x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_SEEED_96X96_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_seeed_96x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_SEEED_96X96_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_seeed_96x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_SEEED_96X96_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_seeed_96x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_SEEED_96X96_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_SEEED_96X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_seeed_96x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_EA_W128128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_EA_W128128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_EA_W128128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_EA_W128128_1_6800 : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_EA_W128128_1_8080 : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_MIDAS_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_MIDAS_128X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_1_6800 : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_1_8080 : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_WS_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_WS_128X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_WS_128X128_1_6800 : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_128X128_1_8080 : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_EA_W128128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_EA_W128128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_EA_W128128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_EA_W128128_2_6800 : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_EA_W128128_2_8080 : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_MIDAS_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_MIDAS_128X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_2_6800 : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_2_8080 : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_WS_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_WS_128X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_WS_128X128_2_6800 : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_128X128_2_8080 : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_EA_W128128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_EA_W128128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_EA_W128128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_EA_W128128_F_6800 : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_EA_W128128_F_8080 : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ea_w128128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_MIDAS_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_MIDAS_128X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_F_6800 : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_MIDAS_128X128_F_8080 : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_midas_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_WS_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_WS_128X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_WS_128X128_F_6800 : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_WS_128X128_F_8080 : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_ws_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_EA_W128128_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ea_w128128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_EA_W128128_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_EA_W128128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ea_w128128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_MIDAS_128X128_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_midas_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_MIDAS_128X128_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_midas_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_WS_128X128_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_WS_128X128_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_EA_W128128_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ea_w128128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_EA_W128128_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_EA_W128128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ea_w128128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_MIDAS_128X128_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_midas_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_MIDAS_128X128_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_midas_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_WS_128X128_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_WS_128X128_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_EA_W128128_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ea_w128128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_EA_W128128_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_EA_W128128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ea_w128128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_MIDAS_128X128_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_midas_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_MIDAS_128X128_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_MIDAS_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_midas_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_WS_128X128_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_WS_128X128_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_WS_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_ws_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_VISIONOX_128X96_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_VISIONOX_128X96_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_VISIONOX_128X96_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_1_6800 : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_1_8080 : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_VISIONOX_128X96_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_VISIONOX_128X96_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_2_6800 : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_2_8080 : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1327_VISIONOX_128X96_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1327_VISIONOX_128X96_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_F_6800 : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_F_8080 : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_visionox_128x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_VISIONOX_128X96_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_visionox_128x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_VISIONOX_128X96_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_visionox_128x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_VISIONOX_128X96_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_visionox_128x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_VISIONOX_128X96_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_visionox_128x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1327_VISIONOX_128X96_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_visionox_128x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_SSD1327_VISIONOX_128X96_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_VISIONOX_128X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_visionox_128x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1329_128X96_NONAME_1_6800 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_1_8080 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1329_128X96_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1329_128X96_NONAME_2_6800 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_2_8080 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1329_128X96_NONAME_F_6800 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_F_8080 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_96X96_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1329_96X96_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1329_96X96_NONAME_1_6800 : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_96X96_NONAME_1_8080 : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_96X96_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1329_96X96_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1329_96X96_NONAME_2_6800 : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_96X96_NONAME_2_8080 : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_96X96_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1329_96X96_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1329_96X96_NONAME_F_6800 : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_96X96_NONAME_F_8080 : public U8G2 { + public: U8G2_SSD1329_96X96_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_96x96_noname_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LD7032_60X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LD7032_60X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LD7032_60X32_ALT_1_4W_SW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_ALT_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_alt_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LD7032_60X32_ALT_1_4W_HW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_ALT_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_alt_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LD7032_60X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LD7032_60X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LD7032_60X32_ALT_2_4W_SW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_ALT_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_alt_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LD7032_60X32_ALT_2_4W_HW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_ALT_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_alt_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LD7032_60X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LD7032_60X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LD7032_60X32_ALT_F_4W_SW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_ALT_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_alt_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LD7032_60X32_ALT_F_4W_HW_SPI : public U8G2 { + public: U8G2_LD7032_60X32_ALT_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_60x32_alt_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LD7032_60X32_1_SW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_LD7032_60X32_1_HW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_LD7032_60X32_ALT_1_SW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_ALT_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_alt_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_LD7032_60X32_ALT_1_HW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_ALT_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_alt_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_LD7032_60X32_2_SW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_LD7032_60X32_2_HW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_LD7032_60X32_ALT_2_SW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_ALT_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_alt_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_LD7032_60X32_ALT_2_HW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_ALT_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_alt_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_LD7032_60X32_F_SW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_LD7032_60X32_F_HW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_LD7032_60X32_ALT_F_SW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_ALT_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_alt_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_LD7032_60X32_ALT_F_HW_I2C : public U8G2 { + public: U8G2_LD7032_60X32_ALT_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ld7032_i2c_60x32_alt_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7920_192X32_1_8080 : public U8G2 { + public: U8G2_ST7920_192X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_p_192x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_192X32_2_8080 : public U8G2 { + public: U8G2_ST7920_192X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_p_192x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_192X32_F_8080 : public U8G2 { + public: U8G2_ST7920_192X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_p_192x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_192X32_1_6800 : public U8G2 { + public: U8G2_ST7920_192X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_192x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_192X32_2_6800 : public U8G2 { + public: U8G2_ST7920_192X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_192x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_192X32_F_6800 : public U8G2 { + public: U8G2_ST7920_192X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_192x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_192X32_1_SW_SPI : public U8G2 { + public: U8G2_ST7920_192X32_1_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_192x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7920_192X32_1_HW_SPI : public U8G2 { + public: U8G2_ST7920_192X32_1_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_192x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8G2_ST7920_192X32_2_SW_SPI : public U8G2 { + public: U8G2_ST7920_192X32_2_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_192x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7920_192X32_2_HW_SPI : public U8G2 { + public: U8G2_ST7920_192X32_2_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_192x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8G2_ST7920_192X32_F_SW_SPI : public U8G2 { + public: U8G2_ST7920_192X32_F_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_192x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7920_192X32_F_HW_SPI : public U8G2 { + public: U8G2_ST7920_192X32_F_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_192x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8G2_ST7920_128X64_1_8080 : public U8G2 { + public: U8G2_ST7920_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_p_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_128X64_2_8080 : public U8G2 { + public: U8G2_ST7920_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_p_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_128X64_F_8080 : public U8G2 { + public: U8G2_ST7920_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_p_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_128X64_1_6800 : public U8G2 { + public: U8G2_ST7920_128X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_128x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_128X64_2_6800 : public U8G2 { + public: U8G2_ST7920_128X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_128x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_128X64_F_6800 : public U8G2 { + public: U8G2_ST7920_128X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_128x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7920_128X64_1_SW_SPI : public U8G2 { + public: U8G2_ST7920_128X64_1_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_128x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7920_128X64_1_HW_SPI : public U8G2 { + public: U8G2_ST7920_128X64_1_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8G2_ST7920_128X64_2_SW_SPI : public U8G2 { + public: U8G2_ST7920_128X64_2_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_128x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7920_128X64_2_HW_SPI : public U8G2 { + public: U8G2_ST7920_128X64_2_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8G2_ST7920_128X64_F_SW_SPI : public U8G2 { + public: U8G2_ST7920_128X64_F_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_128x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7920_128X64_F_HW_SPI : public U8G2 { + public: U8G2_ST7920_128X64_F_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7920_s_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8G2_LS013B7DH03_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_LS013B7DH03_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh03_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS013B7DH03_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_LS013B7DH03_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh03_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS013B7DH03_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_LS013B7DH03_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh03_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS013B7DH03_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_LS013B7DH03_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh03_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS013B7DH03_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_LS013B7DH03_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh03_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS013B7DH03_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_LS013B7DH03_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh03_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS027B7DH01_400X240_1_4W_SW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_400X240_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_400x240_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS027B7DH01_400X240_1_4W_HW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_400X240_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_400x240_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS027B7DH01_M0_400X240_1_4W_SW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_M0_400X240_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_m0_400x240_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS027B7DH01_M0_400X240_1_4W_HW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_M0_400X240_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_m0_400x240_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS027B7DH01_400X240_2_4W_SW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_400X240_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_400x240_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS027B7DH01_400X240_2_4W_HW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_400X240_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_400x240_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS027B7DH01_M0_400X240_2_4W_SW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_M0_400X240_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_m0_400x240_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS027B7DH01_M0_400X240_2_4W_HW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_M0_400X240_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_m0_400x240_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS027B7DH01_400X240_F_4W_SW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_400X240_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_400x240_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS027B7DH01_400X240_F_4W_HW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_400X240_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_400x240_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS027B7DH01_M0_400X240_F_4W_SW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_M0_400X240_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_m0_400x240_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS027B7DH01_M0_400X240_F_4W_HW_SPI : public U8G2 { + public: U8G2_LS027B7DH01_M0_400X240_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls027b7dh01_m0_400x240_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS013B7DH05_144X168_1_4W_SW_SPI : public U8G2 { + public: U8G2_LS013B7DH05_144X168_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh05_144x168_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS013B7DH05_144X168_1_4W_HW_SPI : public U8G2 { + public: U8G2_LS013B7DH05_144X168_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh05_144x168_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS013B7DH05_144X168_2_4W_SW_SPI : public U8G2 { + public: U8G2_LS013B7DH05_144X168_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh05_144x168_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS013B7DH05_144X168_2_4W_HW_SPI : public U8G2 { + public: U8G2_LS013B7DH05_144X168_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh05_144x168_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_LS013B7DH05_144X168_F_4W_SW_SPI : public U8G2 { + public: U8G2_LS013B7DH05_144X168_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh05_144x168_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_LS013B7DH05_144X168_F_4W_HW_SPI : public U8G2 { + public: U8G2_LS013B7DH05_144X168_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ls013b7dh05_144x168_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_EA_DOGS102_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1701_EA_DOGS102_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_EA_DOGS102_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_1_6800 : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_1_8080 : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1701_EA_DOGS102_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_EA_DOGS102_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_2_6800 : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_2_8080 : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1701_EA_DOGS102_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_EA_DOGS102_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_F_6800 : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_EA_DOGS102_F_8080 : public U8G2 { + public: U8G2_UC1701_EA_DOGS102_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_ea_dogs102_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_MINI12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1701_MINI12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_MINI12864_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1701_MINI12864_1_6800 : public U8G2 { + public: U8G2_UC1701_MINI12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_MINI12864_1_8080 : public U8G2 { + public: U8G2_UC1701_MINI12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_MINI12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1701_MINI12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_MINI12864_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1701_MINI12864_2_6800 : public U8G2 { + public: U8G2_UC1701_MINI12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_MINI12864_2_8080 : public U8G2 { + public: U8G2_UC1701_MINI12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_MINI12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1701_MINI12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1701_MINI12864_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1701_MINI12864_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1701_MINI12864_F_6800 : public U8G2 { + public: U8G2_UC1701_MINI12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1701_MINI12864_F_8080 : public U8G2 { + public: U8G2_UC1701_MINI12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1701_mini12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_PCD8544_84X48_1_4W_SW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_PCD8544_84X48_1_4W_HW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_PCD8544_84X48_1_3W_SW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_PCD8544_84X48_2_4W_SW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_PCD8544_84X48_2_4W_HW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_PCD8544_84X48_2_3W_SW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_PCD8544_84X48_F_4W_SW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_PCD8544_84X48_F_4W_HW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_PCD8544_84X48_F_3W_SW_SPI : public U8G2 { + public: U8G2_PCD8544_84X48_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcd8544_84x48_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_PCF8812_96X65_1_4W_SW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_PCF8812_96X65_1_4W_HW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_PCF8812_96X65_1_3W_SW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_PCF8812_96X65_2_4W_SW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_PCF8812_96X65_2_4W_HW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_PCF8812_96X65_2_3W_SW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_PCF8812_96X65_F_4W_SW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_PCF8812_96X65_F_4W_HW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_PCF8812_96X65_F_3W_SW_SPI : public U8G2 { + public: U8G2_PCF8812_96X65_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_pcf8812_96x65_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_HX1230_96X68_1_4W_SW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_HX1230_96X68_1_4W_HW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_HX1230_96X68_1_3W_SW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_HX1230_96X68_2_4W_SW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_HX1230_96X68_2_4W_HW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_HX1230_96X68_2_3W_SW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_HX1230_96X68_F_4W_SW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_HX1230_96X68_F_4W_HW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_HX1230_96X68_F_3W_SW_SPI : public U8G2 { + public: U8G2_HX1230_96X68_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hx1230_96x68_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1604_JLX19264_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1604_JLX19264_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1604_JLX19264_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1604_JLX19264_1_6800 : public U8G2 { + public: U8G2_UC1604_JLX19264_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1604_JLX19264_1_8080 : public U8G2 { + public: U8G2_UC1604_JLX19264_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1604_JLX19264_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1604_JLX19264_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1604_JLX19264_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1604_JLX19264_2_6800 : public U8G2 { + public: U8G2_UC1604_JLX19264_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1604_JLX19264_2_8080 : public U8G2 { + public: U8G2_UC1604_JLX19264_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1604_JLX19264_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1604_JLX19264_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1604_JLX19264_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1604_JLX19264_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1604_JLX19264_F_6800 : public U8G2 { + public: U8G2_UC1604_JLX19264_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1604_JLX19264_F_8080 : public U8G2 { + public: U8G2_UC1604_JLX19264_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_jlx19264_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1604_JLX19264_1_SW_I2C : public U8G2 { + public: U8G2_UC1604_JLX19264_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_i2c_jlx19264_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1604_JLX19264_1_HW_I2C : public U8G2 { + public: U8G2_UC1604_JLX19264_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_i2c_jlx19264_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1604_JLX19264_2_SW_I2C : public U8G2 { + public: U8G2_UC1604_JLX19264_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_i2c_jlx19264_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1604_JLX19264_2_HW_I2C : public U8G2 { + public: U8G2_UC1604_JLX19264_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_i2c_jlx19264_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1604_JLX19264_F_SW_I2C : public U8G2 { + public: U8G2_UC1604_JLX19264_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_i2c_jlx19264_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1604_JLX19264_F_HW_I2C : public U8G2 { + public: U8G2_UC1604_JLX19264_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1604_i2c_jlx19264_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_ERC24064_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_ERC24064_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_ERC24064_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_ERC24064_1_6800 : public U8G2 { + public: U8G2_UC1608_ERC24064_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC24064_1_8080 : public U8G2 { + public: U8G2_UC1608_ERC24064_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_DEM240064_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_DEM240064_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_DEM240064_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_DEM240064_1_6800 : public U8G2 { + public: U8G2_UC1608_DEM240064_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_DEM240064_1_8080 : public U8G2 { + public: U8G2_UC1608_DEM240064_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC24064_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_ERC24064_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_ERC24064_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_ERC24064_2_6800 : public U8G2 { + public: U8G2_UC1608_ERC24064_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC24064_2_8080 : public U8G2 { + public: U8G2_UC1608_ERC24064_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_DEM240064_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_DEM240064_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_DEM240064_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_DEM240064_2_6800 : public U8G2 { + public: U8G2_UC1608_DEM240064_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_DEM240064_2_8080 : public U8G2 { + public: U8G2_UC1608_DEM240064_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC24064_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_ERC24064_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_ERC24064_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC24064_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_ERC24064_F_6800 : public U8G2 { + public: U8G2_UC1608_ERC24064_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC24064_F_8080 : public U8G2 { + public: U8G2_UC1608_ERC24064_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc24064_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_DEM240064_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_DEM240064_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_DEM240064_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_DEM240064_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_DEM240064_F_6800 : public U8G2 { + public: U8G2_UC1608_DEM240064_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_DEM240064_F_8080 : public U8G2 { + public: U8G2_UC1608_DEM240064_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_dem240064_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC24064_1_SW_I2C : public U8G2 { + public: U8G2_UC1608_ERC24064_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc24064_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_ERC24064_1_HW_I2C : public U8G2 { + public: U8G2_UC1608_ERC24064_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc24064_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_DEM240064_1_SW_I2C : public U8G2 { + public: U8G2_UC1608_DEM240064_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_dem240064_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_DEM240064_1_HW_I2C : public U8G2 { + public: U8G2_UC1608_DEM240064_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_dem240064_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_ERC24064_2_SW_I2C : public U8G2 { + public: U8G2_UC1608_ERC24064_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc24064_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_ERC24064_2_HW_I2C : public U8G2 { + public: U8G2_UC1608_ERC24064_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc24064_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_DEM240064_2_SW_I2C : public U8G2 { + public: U8G2_UC1608_DEM240064_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_dem240064_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_DEM240064_2_HW_I2C : public U8G2 { + public: U8G2_UC1608_DEM240064_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_dem240064_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_ERC24064_F_SW_I2C : public U8G2 { + public: U8G2_UC1608_ERC24064_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc24064_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_ERC24064_F_HW_I2C : public U8G2 { + public: U8G2_UC1608_ERC24064_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc24064_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_DEM240064_F_SW_I2C : public U8G2 { + public: U8G2_UC1608_DEM240064_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_dem240064_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_DEM240064_F_HW_I2C : public U8G2 { + public: U8G2_UC1608_DEM240064_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_dem240064_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_ERC240120_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_ERC240120_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_ERC240120_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_ERC240120_1_6800 : public U8G2 { + public: U8G2_UC1608_ERC240120_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC240120_1_8080 : public U8G2 { + public: U8G2_UC1608_ERC240120_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC240120_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_ERC240120_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_ERC240120_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_ERC240120_2_6800 : public U8G2 { + public: U8G2_UC1608_ERC240120_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC240120_2_8080 : public U8G2 { + public: U8G2_UC1608_ERC240120_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC240120_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_ERC240120_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_ERC240120_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_ERC240120_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_ERC240120_F_6800 : public U8G2 { + public: U8G2_UC1608_ERC240120_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC240120_F_8080 : public U8G2 { + public: U8G2_UC1608_ERC240120_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_erc240120_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_ERC240120_1_SW_I2C : public U8G2 { + public: U8G2_UC1608_ERC240120_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc240120_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_ERC240120_1_HW_I2C : public U8G2 { + public: U8G2_UC1608_ERC240120_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc240120_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_ERC240120_2_SW_I2C : public U8G2 { + public: U8G2_UC1608_ERC240120_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc240120_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_ERC240120_2_HW_I2C : public U8G2 { + public: U8G2_UC1608_ERC240120_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc240120_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_ERC240120_F_SW_I2C : public U8G2 { + public: U8G2_UC1608_ERC240120_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc240120_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_ERC240120_F_HW_I2C : public U8G2 { + public: U8G2_UC1608_ERC240120_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_erc240120_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_240X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_240X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_240X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_240X128_1_6800 : public U8G2 { + public: U8G2_UC1608_240X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_240X128_1_8080 : public U8G2 { + public: U8G2_UC1608_240X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_240X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_240X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_240X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_240X128_2_6800 : public U8G2 { + public: U8G2_UC1608_240X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_240X128_2_8080 : public U8G2 { + public: U8G2_UC1608_240X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_240X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1608_240X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1608_240X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1608_240X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1608_240X128_F_6800 : public U8G2 { + public: U8G2_UC1608_240X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_240X128_F_8080 : public U8G2 { + public: U8G2_UC1608_240X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_240x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1608_240X128_1_SW_I2C : public U8G2 { + public: U8G2_UC1608_240X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_240x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_240X128_1_HW_I2C : public U8G2 { + public: U8G2_UC1608_240X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_240x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_240X128_2_SW_I2C : public U8G2 { + public: U8G2_UC1608_240X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_240x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_240X128_2_HW_I2C : public U8G2 { + public: U8G2_UC1608_240X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_240x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1608_240X128_F_SW_I2C : public U8G2 { + public: U8G2_UC1608_240X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_240x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1608_240X128_F_HW_I2C : public U8G2 { + public: U8G2_UC1608_240X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1608_i2c_240x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1638_160X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1638_160X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1638_160X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1638_160X128_1_6800 : public U8G2 { + public: U8G2_UC1638_160X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_160X128_1_8080 : public U8G2 { + public: U8G2_UC1638_160X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_160X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1638_160X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1638_160X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1638_160X128_2_6800 : public U8G2 { + public: U8G2_UC1638_160X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_160X128_2_8080 : public U8G2 { + public: U8G2_UC1638_160X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_160X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1638_160X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1638_160X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1638_160X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1638_160X128_F_6800 : public U8G2 { + public: U8G2_UC1638_160X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_160X128_F_8080 : public U8G2 { + public: U8G2_UC1638_160X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_160x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1638_192X96_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1638_192X96_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1638_192X96_1_6800 : public U8G2 { + public: U8G2_UC1638_192X96_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_1_8080 : public U8G2 { + public: U8G2_UC1638_192X96_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1638_192X96_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1638_192X96_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1638_192X96_2_6800 : public U8G2 { + public: U8G2_UC1638_192X96_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_2_8080 : public U8G2 { + public: U8G2_UC1638_192X96_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1638_192X96_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1638_192X96_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1638_192X96_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1638_192X96_F_6800 : public U8G2 { + public: U8G2_UC1638_192X96_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_F_8080 : public U8G2 { + public: U8G2_UC1638_192X96_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_192x96_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1638_192X96_1_SW_I2C : public U8G2 { + public: U8G2_UC1638_192X96_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_i2c_192x96_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1638_192X96_1_HW_I2C : public U8G2 { + public: U8G2_UC1638_192X96_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_i2c_192x96_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1638_192X96_2_SW_I2C : public U8G2 { + public: U8G2_UC1638_192X96_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_i2c_192x96_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1638_192X96_2_HW_I2C : public U8G2 { + public: U8G2_UC1638_192X96_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_i2c_192x96_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1638_192X96_F_SW_I2C : public U8G2 { + public: U8G2_UC1638_192X96_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_i2c_192x96_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1638_192X96_F_HW_I2C : public U8G2 { + public: U8G2_UC1638_192X96_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1638_i2c_192x96_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1610_EA_DOGXL160_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1610_EA_DOGXL160_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1610_EA_DOGXL160_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_1_6800 : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_1_8080 : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1610_EA_DOGXL160_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1610_EA_DOGXL160_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_2_6800 : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_2_8080 : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1610_EA_DOGXL160_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1610_EA_DOGXL160_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_F_6800 : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_F_8080 : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1610_EA_DOGXL160_1_SW_I2C : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_i2c_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1610_EA_DOGXL160_1_HW_I2C : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_i2c_ea_dogxl160_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1610_EA_DOGXL160_2_SW_I2C : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_i2c_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1610_EA_DOGXL160_2_HW_I2C : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_i2c_ea_dogxl160_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1610_EA_DOGXL160_F_SW_I2C : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_i2c_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1610_EA_DOGXL160_F_HW_I2C : public U8G2 { + public: U8G2_UC1610_EA_DOGXL160_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1610_i2c_ea_dogxl160_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EA_DOGM240_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EA_DOGM240_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EA_DOGM240_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_1_6800 : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_1_8080 : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EA_DOGM240_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EA_DOGM240_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_2_6800 : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_2_8080 : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EA_DOGM240_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EA_DOGM240_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_F_6800 : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_F_8080 : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogm240_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGM240_1_SW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogm240_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EA_DOGM240_1_HW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogm240_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EA_DOGM240_2_SW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogm240_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EA_DOGM240_2_HW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogm240_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EA_DOGM240_F_SW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogm240_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EA_DOGM240_F_HW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGM240_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogm240_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EA_DOGXL240_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EA_DOGXL240_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EA_DOGXL240_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_1_6800 : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_1_8080 : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EA_DOGXL240_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EA_DOGXL240_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_2_6800 : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_2_8080 : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EA_DOGXL240_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EA_DOGXL240_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_F_6800 : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_F_8080 : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EA_DOGXL240_1_SW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EA_DOGXL240_1_HW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogxl240_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EA_DOGXL240_2_SW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EA_DOGXL240_2_HW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogxl240_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EA_DOGXL240_F_SW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EA_DOGXL240_F_HW_I2C : public U8G2 { + public: U8G2_UC1611_EA_DOGXL240_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ea_dogxl240_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EW50850_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EW50850_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EW50850_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EW50850_1_6800 : public U8G2 { + public: U8G2_UC1611_EW50850_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EW50850_1_8080 : public U8G2 { + public: U8G2_UC1611_EW50850_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EW50850_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EW50850_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EW50850_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EW50850_2_6800 : public U8G2 { + public: U8G2_UC1611_EW50850_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EW50850_2_8080 : public U8G2 { + public: U8G2_UC1611_EW50850_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EW50850_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_EW50850_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_EW50850_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_EW50850_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_EW50850_F_6800 : public U8G2 { + public: U8G2_UC1611_EW50850_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EW50850_F_8080 : public U8G2 { + public: U8G2_UC1611_EW50850_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ew50850_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_EW50850_1_SW_I2C : public U8G2 { + public: U8G2_UC1611_EW50850_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ew50850_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EW50850_1_HW_I2C : public U8G2 { + public: U8G2_UC1611_EW50850_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ew50850_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EW50850_2_SW_I2C : public U8G2 { + public: U8G2_UC1611_EW50850_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ew50850_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EW50850_2_HW_I2C : public U8G2 { + public: U8G2_UC1611_EW50850_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ew50850_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_EW50850_F_SW_I2C : public U8G2 { + public: U8G2_UC1611_EW50850_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ew50850_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_EW50850_F_HW_I2C : public U8G2 { + public: U8G2_UC1611_EW50850_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ew50850_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_CG160160_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_CG160160_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_CG160160_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_CG160160_1_6800 : public U8G2 { + public: U8G2_UC1611_CG160160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_CG160160_1_8080 : public U8G2 { + public: U8G2_UC1611_CG160160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_CG160160_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_CG160160_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_CG160160_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_CG160160_2_6800 : public U8G2 { + public: U8G2_UC1611_CG160160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_CG160160_2_8080 : public U8G2 { + public: U8G2_UC1611_CG160160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_CG160160_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_CG160160_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_CG160160_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_CG160160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_CG160160_F_6800 : public U8G2 { + public: U8G2_UC1611_CG160160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_CG160160_F_8080 : public U8G2 { + public: U8G2_UC1611_CG160160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_cg160160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_CG160160_1_SW_I2C : public U8G2 { + public: U8G2_UC1611_CG160160_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_cg160160_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_CG160160_1_HW_I2C : public U8G2 { + public: U8G2_UC1611_CG160160_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_cg160160_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_CG160160_2_SW_I2C : public U8G2 { + public: U8G2_UC1611_CG160160_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_cg160160_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_CG160160_2_HW_I2C : public U8G2 { + public: U8G2_UC1611_CG160160_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_cg160160_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_CG160160_F_SW_I2C : public U8G2 { + public: U8G2_UC1611_CG160160_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_cg160160_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_CG160160_F_HW_I2C : public U8G2 { + public: U8G2_UC1611_CG160160_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_cg160160_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_IDS4073_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_IDS4073_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_IDS4073_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_IDS4073_1_6800 : public U8G2 { + public: U8G2_UC1611_IDS4073_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_IDS4073_1_8080 : public U8G2 { + public: U8G2_UC1611_IDS4073_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_IDS4073_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_IDS4073_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_IDS4073_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_IDS4073_2_6800 : public U8G2 { + public: U8G2_UC1611_IDS4073_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_IDS4073_2_8080 : public U8G2 { + public: U8G2_UC1611_IDS4073_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_IDS4073_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1611_IDS4073_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1611_IDS4073_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1611_IDS4073_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1611_IDS4073_F_6800 : public U8G2 { + public: U8G2_UC1611_IDS4073_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_IDS4073_F_8080 : public U8G2 { + public: U8G2_UC1611_IDS4073_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_ids4073_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1611_IDS4073_1_SW_I2C : public U8G2 { + public: U8G2_UC1611_IDS4073_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ids4073_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_IDS4073_1_HW_I2C : public U8G2 { + public: U8G2_UC1611_IDS4073_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ids4073_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_IDS4073_2_SW_I2C : public U8G2 { + public: U8G2_UC1611_IDS4073_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ids4073_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_IDS4073_2_HW_I2C : public U8G2 { + public: U8G2_UC1611_IDS4073_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ids4073_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1611_IDS4073_F_SW_I2C : public U8G2 { + public: U8G2_UC1611_IDS4073_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ids4073_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1611_IDS4073_F_HW_I2C : public U8G2 { + public: U8G2_UC1611_IDS4073_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1611_i2c_ids4073_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7511_AVD_320X240_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7511_AVD_320X240_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7511_AVD_320X240_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7511_AVD_320X240_1_6800 : public U8G2 { + public: U8G2_ST7511_AVD_320X240_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7511_AVD_320X240_1_8080 : public U8G2 { + public: U8G2_ST7511_AVD_320X240_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7511_AVD_320X240_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7511_AVD_320X240_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7511_AVD_320X240_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7511_AVD_320X240_2_6800 : public U8G2 { + public: U8G2_ST7511_AVD_320X240_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7511_AVD_320X240_2_8080 : public U8G2 { + public: U8G2_ST7511_AVD_320X240_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7511_AVD_320X240_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7511_AVD_320X240_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7511_AVD_320X240_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7511_AVD_320X240_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7511_AVD_320X240_F_6800 : public U8G2 { + public: U8G2_ST7511_AVD_320X240_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7511_AVD_320X240_F_8080 : public U8G2 { + public: U8G2_ST7511_AVD_320X240_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7511_avd_320x240_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7528_NHD_C160100_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7528_NHD_C160100_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7528_NHD_C160100_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7528_NHD_C160100_1_6800 : public U8G2 { + public: U8G2_ST7528_NHD_C160100_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_1_8080 : public U8G2 { + public: U8G2_ST7528_NHD_C160100_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7528_NHD_C160100_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7528_NHD_C160100_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7528_NHD_C160100_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7528_NHD_C160100_2_6800 : public U8G2 { + public: U8G2_ST7528_NHD_C160100_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_2_8080 : public U8G2 { + public: U8G2_ST7528_NHD_C160100_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7528_NHD_C160100_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7528_NHD_C160100_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7528_NHD_C160100_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7528_NHD_C160100_F_6800 : public U8G2 { + public: U8G2_ST7528_NHD_C160100_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_F_8080 : public U8G2 { + public: U8G2_ST7528_NHD_C160100_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_nhd_c160100_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_NHD_C160100_1_SW_I2C : public U8G2 { + public: U8G2_ST7528_NHD_C160100_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_nhd_c160100_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7528_NHD_C160100_1_HW_I2C : public U8G2 { + public: U8G2_ST7528_NHD_C160100_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_nhd_c160100_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7528_NHD_C160100_2_SW_I2C : public U8G2 { + public: U8G2_ST7528_NHD_C160100_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_nhd_c160100_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7528_NHD_C160100_2_HW_I2C : public U8G2 { + public: U8G2_ST7528_NHD_C160100_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_nhd_c160100_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7528_NHD_C160100_F_SW_I2C : public U8G2 { + public: U8G2_ST7528_NHD_C160100_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_nhd_c160100_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7528_NHD_C160100_F_HW_I2C : public U8G2 { + public: U8G2_ST7528_NHD_C160100_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_nhd_c160100_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7528_ERC16064_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7528_ERC16064_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7528_ERC16064_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7528_ERC16064_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7528_ERC16064_1_6800 : public U8G2 { + public: U8G2_ST7528_ERC16064_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_ERC16064_1_8080 : public U8G2 { + public: U8G2_ST7528_ERC16064_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_ERC16064_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7528_ERC16064_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7528_ERC16064_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7528_ERC16064_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7528_ERC16064_2_6800 : public U8G2 { + public: U8G2_ST7528_ERC16064_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_ERC16064_2_8080 : public U8G2 { + public: U8G2_ST7528_ERC16064_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_ERC16064_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7528_ERC16064_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7528_ERC16064_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7528_ERC16064_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7528_ERC16064_F_6800 : public U8G2 { + public: U8G2_ST7528_ERC16064_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_ERC16064_F_8080 : public U8G2 { + public: U8G2_ST7528_ERC16064_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_erc16064_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7528_ERC16064_1_SW_I2C : public U8G2 { + public: U8G2_ST7528_ERC16064_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_erc16064_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7528_ERC16064_1_HW_I2C : public U8G2 { + public: U8G2_ST7528_ERC16064_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_erc16064_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7528_ERC16064_2_SW_I2C : public U8G2 { + public: U8G2_ST7528_ERC16064_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_erc16064_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7528_ERC16064_2_HW_I2C : public U8G2 { + public: U8G2_ST7528_ERC16064_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_erc16064_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7528_ERC16064_F_SW_I2C : public U8G2 { + public: U8G2_ST7528_ERC16064_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_erc16064_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7528_ERC16064_F_HW_I2C : public U8G2 { + public: U8G2_ST7528_ERC16064_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7528_i2c_erc16064_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1617_JLX128128_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1617_JLX128128_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1617_JLX128128_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1617_JLX128128_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1617_JLX128128_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1617_JLX128128_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1617_JLX128128_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1617_JLX128128_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1617_JLX128128_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1617_JLX128128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_jlx128128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1617_JLX128128_1_SW_I2C : public U8G2 { + public: U8G2_UC1617_JLX128128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_i2c_jlx128128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1617_JLX128128_1_HW_I2C : public U8G2 { + public: U8G2_UC1617_JLX128128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_i2c_jlx128128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1617_JLX128128_2_SW_I2C : public U8G2 { + public: U8G2_UC1617_JLX128128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_i2c_jlx128128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1617_JLX128128_2_HW_I2C : public U8G2 { + public: U8G2_UC1617_JLX128128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_i2c_jlx128128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1617_JLX128128_F_SW_I2C : public U8G2 { + public: U8G2_UC1617_JLX128128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_i2c_jlx128128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1617_JLX128128_F_HW_I2C : public U8G2 { + public: U8G2_UC1617_JLX128128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1617_i2c_jlx128128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7565_EA_DOGM128_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_EA_DOGM128_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_EA_DOGM128_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_1_6800 : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_1_8080 : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6063_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LM6063_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LM6063_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LM6063_1_6800 : public U8G2 { + public: U8G2_ST7565_LM6063_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6063_1_8080 : public U8G2 { + public: U8G2_ST7565_LM6063_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_64128N_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_64128N_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_64128N_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_64128N_1_6800 : public U8G2 { + public: U8G2_ST7565_64128N_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_64128N_1_8080 : public U8G2 { + public: U8G2_ST7565_64128N_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ZOLEN_128X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ZOLEN_128X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_1_6800 : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_1_8080 : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6059_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LM6059_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LM6059_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LM6059_1_6800 : public U8G2 { + public: U8G2_ST7565_LM6059_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6059_1_8080 : public U8G2 { + public: U8G2_ST7565_LM6059_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_KS0713_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_KS0713_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_KS0713_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_KS0713_1_6800 : public U8G2 { + public: U8G2_ST7565_KS0713_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_KS0713_1_8080 : public U8G2 { + public: U8G2_ST7565_KS0713_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LX12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LX12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LX12864_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LX12864_1_6800 : public U8G2 { + public: U8G2_ST7565_LX12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LX12864_1_8080 : public U8G2 { + public: U8G2_ST7565_LX12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ERC12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ERC12864_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ERC12864_1_6800 : public U8G2 { + public: U8G2_ST7565_ERC12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_1_8080 : public U8G2 { + public: U8G2_ST7565_ERC12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ERC12864_ALT_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ERC12864_ALT_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_1_6800 : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_1_8080 : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_NHD_C12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_NHD_C12864_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_NHD_C12864_1_6800 : public U8G2 { + public: U8G2_ST7565_NHD_C12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12864_1_8080 : public U8G2 { + public: U8G2_ST7565_NHD_C12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_JLX12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_JLX12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_JLX12864_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_JLX12864_1_6800 : public U8G2 { + public: U8G2_ST7565_JLX12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_JLX12864_1_8080 : public U8G2 { + public: U8G2_ST7565_JLX12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_EA_DOGM128_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_EA_DOGM128_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_2_6800 : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_2_8080 : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6063_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LM6063_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LM6063_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LM6063_2_6800 : public U8G2 { + public: U8G2_ST7565_LM6063_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6063_2_8080 : public U8G2 { + public: U8G2_ST7565_LM6063_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_64128N_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_64128N_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_64128N_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_64128N_2_6800 : public U8G2 { + public: U8G2_ST7565_64128N_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_64128N_2_8080 : public U8G2 { + public: U8G2_ST7565_64128N_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ZOLEN_128X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ZOLEN_128X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_2_6800 : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_2_8080 : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6059_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LM6059_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LM6059_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LM6059_2_6800 : public U8G2 { + public: U8G2_ST7565_LM6059_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6059_2_8080 : public U8G2 { + public: U8G2_ST7565_LM6059_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_KS0713_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_KS0713_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_KS0713_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_KS0713_2_6800 : public U8G2 { + public: U8G2_ST7565_KS0713_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_KS0713_2_8080 : public U8G2 { + public: U8G2_ST7565_KS0713_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LX12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LX12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LX12864_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LX12864_2_6800 : public U8G2 { + public: U8G2_ST7565_LX12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LX12864_2_8080 : public U8G2 { + public: U8G2_ST7565_LX12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ERC12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ERC12864_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ERC12864_2_6800 : public U8G2 { + public: U8G2_ST7565_ERC12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_2_8080 : public U8G2 { + public: U8G2_ST7565_ERC12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ERC12864_ALT_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ERC12864_ALT_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_2_6800 : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_2_8080 : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_NHD_C12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_NHD_C12864_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_NHD_C12864_2_6800 : public U8G2 { + public: U8G2_ST7565_NHD_C12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12864_2_8080 : public U8G2 { + public: U8G2_ST7565_NHD_C12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_JLX12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_JLX12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_JLX12864_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_JLX12864_2_6800 : public U8G2 { + public: U8G2_ST7565_JLX12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_JLX12864_2_8080 : public U8G2 { + public: U8G2_ST7565_JLX12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_EA_DOGM128_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_EA_DOGM128_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_F_6800 : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM128_F_8080 : public U8G2 { + public: U8G2_ST7565_EA_DOGM128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6063_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LM6063_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LM6063_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6063_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LM6063_F_6800 : public U8G2 { + public: U8G2_ST7565_LM6063_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6063_F_8080 : public U8G2 { + public: U8G2_ST7565_LM6063_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6063_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_64128N_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_64128N_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_64128N_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_64128N_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_64128N_F_6800 : public U8G2 { + public: U8G2_ST7565_64128N_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_64128N_F_8080 : public U8G2 { + public: U8G2_ST7565_64128N_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_64128n_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ZOLEN_128X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ZOLEN_128X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_F_6800 : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ZOLEN_128X64_F_8080 : public U8G2 { + public: U8G2_ST7565_ZOLEN_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_zolen_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6059_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LM6059_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LM6059_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LM6059_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LM6059_F_6800 : public U8G2 { + public: U8G2_ST7565_LM6059_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LM6059_F_8080 : public U8G2 { + public: U8G2_ST7565_LM6059_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lm6059_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_KS0713_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_KS0713_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_KS0713_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_KS0713_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_KS0713_F_6800 : public U8G2 { + public: U8G2_ST7565_KS0713_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_KS0713_F_8080 : public U8G2 { + public: U8G2_ST7565_KS0713_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ks0713_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LX12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_LX12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_LX12864_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_LX12864_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_LX12864_F_6800 : public U8G2 { + public: U8G2_ST7565_LX12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_LX12864_F_8080 : public U8G2 { + public: U8G2_ST7565_LX12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_lx12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ERC12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ERC12864_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ERC12864_F_6800 : public U8G2 { + public: U8G2_ST7565_ERC12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_F_8080 : public U8G2 { + public: U8G2_ST7565_ERC12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_ERC12864_ALT_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_ERC12864_ALT_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_F_6800 : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_ERC12864_ALT_F_8080 : public U8G2 { + public: U8G2_ST7565_ERC12864_ALT_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_erc12864_alt_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_NHD_C12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_NHD_C12864_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12864_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_NHD_C12864_F_6800 : public U8G2 { + public: U8G2_ST7565_NHD_C12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12864_F_8080 : public U8G2 { + public: U8G2_ST7565_NHD_C12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_JLX12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_JLX12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_JLX12864_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_JLX12864_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_JLX12864_F_6800 : public U8G2 { + public: U8G2_ST7565_JLX12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_JLX12864_F_8080 : public U8G2 { + public: U8G2_ST7565_JLX12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_jlx12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12832_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_NHD_C12832_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_NHD_C12832_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_NHD_C12832_1_6800 : public U8G2 { + public: U8G2_ST7565_NHD_C12832_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12832_1_8080 : public U8G2 { + public: U8G2_ST7565_NHD_C12832_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12832_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_NHD_C12832_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_NHD_C12832_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_NHD_C12832_2_6800 : public U8G2 { + public: U8G2_ST7565_NHD_C12832_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12832_2_8080 : public U8G2 { + public: U8G2_ST7565_NHD_C12832_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12832_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_NHD_C12832_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_NHD_C12832_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_NHD_C12832_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_NHD_C12832_F_6800 : public U8G2 { + public: U8G2_ST7565_NHD_C12832_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_NHD_C12832_F_8080 : public U8G2 { + public: U8G2_ST7565_NHD_C12832_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_nhd_c12832_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1601_128X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1601_128X32_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1601_128X32_1_6800 : public U8G2 { + public: U8G2_UC1601_128X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_1_8080 : public U8G2 { + public: U8G2_UC1601_128X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1601_128X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1601_128X32_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1601_128X32_2_6800 : public U8G2 { + public: U8G2_UC1601_128X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_2_8080 : public U8G2 { + public: U8G2_UC1601_128X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1601_128X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1601_128X32_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X32_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1601_128X32_F_6800 : public U8G2 { + public: U8G2_UC1601_128X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_F_8080 : public U8G2 { + public: U8G2_UC1601_128X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X32_1_SW_I2C : public U8G2 { + public: U8G2_UC1601_128X32_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x32_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1601_128X32_1_HW_I2C : public U8G2 { + public: U8G2_UC1601_128X32_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x32_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1601_128X32_2_SW_I2C : public U8G2 { + public: U8G2_UC1601_128X32_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x32_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1601_128X32_2_HW_I2C : public U8G2 { + public: U8G2_UC1601_128X32_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x32_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1601_128X32_F_SW_I2C : public U8G2 { + public: U8G2_UC1601_128X32_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x32_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1601_128X32_F_HW_I2C : public U8G2 { + public: U8G2_UC1601_128X32_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x32_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1601_128X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1601_128X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1601_128X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1601_128X64_1_6800 : public U8G2 { + public: U8G2_UC1601_128X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X64_1_8080 : public U8G2 { + public: U8G2_UC1601_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1601_128X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1601_128X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1601_128X64_2_6800 : public U8G2 { + public: U8G2_UC1601_128X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X64_2_8080 : public U8G2 { + public: U8G2_UC1601_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_UC1601_128X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_UC1601_128X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_UC1601_128X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_UC1601_128X64_F_6800 : public U8G2 { + public: U8G2_UC1601_128X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X64_F_8080 : public U8G2 { + public: U8G2_UC1601_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_UC1601_128X64_1_SW_I2C : public U8G2 { + public: U8G2_UC1601_128X64_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x64_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1601_128X64_1_HW_I2C : public U8G2 { + public: U8G2_UC1601_128X64_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1601_128X64_2_SW_I2C : public U8G2 { + public: U8G2_UC1601_128X64_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x64_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1601_128X64_2_HW_I2C : public U8G2 { + public: U8G2_UC1601_128X64_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_UC1601_128X64_F_SW_I2C : public U8G2 { + public: U8G2_UC1601_128X64_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x64_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_UC1601_128X64_F_HW_I2C : public U8G2 { + public: U8G2_UC1601_128X64_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_uc1601_i2c_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7565_EA_DOGM132_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_EA_DOGM132_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_EA_DOGM132_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_1_6800 : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_1_8080 : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_EA_DOGM132_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_EA_DOGM132_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_2_6800 : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_2_8080 : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7565_EA_DOGM132_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7565_EA_DOGM132_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_F_6800 : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7565_EA_DOGM132_F_8080 : public U8G2 { + public: U8G2_ST7565_EA_DOGM132_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7565_ea_dogm132_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_PI_132X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_PI_132X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_PI_132X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_PI_132X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_PI_132X64_1_6800 : public U8G2 { + public: U8G2_ST7567_PI_132X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_PI_132X64_1_8080 : public U8G2 { + public: U8G2_ST7567_PI_132X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_PI_132X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_PI_132X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_PI_132X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_PI_132X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_PI_132X64_2_6800 : public U8G2 { + public: U8G2_ST7567_PI_132X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_PI_132X64_2_8080 : public U8G2 { + public: U8G2_ST7567_PI_132X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_PI_132X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_PI_132X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_PI_132X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_PI_132X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_PI_132X64_F_6800 : public U8G2 { + public: U8G2_ST7567_PI_132X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_PI_132X64_F_8080 : public U8G2 { + public: U8G2_ST7567_PI_132X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_pi_132x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_JLX12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_JLX12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_JLX12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_JLX12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_JLX12864_1_6800 : public U8G2 { + public: U8G2_ST7567_JLX12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_JLX12864_1_8080 : public U8G2 { + public: U8G2_ST7567_JLX12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_ENH_DG128064_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_ENH_DG128064_1_6800 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064_1_8080 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064I_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_ENH_DG128064I_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_ENH_DG128064I_1_6800 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064I_1_8080 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_OS12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_OS12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_OS12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_OS12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_OS12864_1_6800 : public U8G2 { + public: U8G2_ST7567_OS12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_OS12864_1_8080 : public U8G2 { + public: U8G2_ST7567_OS12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_JLX12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_JLX12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_JLX12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_JLX12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_JLX12864_2_6800 : public U8G2 { + public: U8G2_ST7567_JLX12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_JLX12864_2_8080 : public U8G2 { + public: U8G2_ST7567_JLX12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_ENH_DG128064_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_ENH_DG128064_2_6800 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064_2_8080 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064I_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_ENH_DG128064I_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_ENH_DG128064I_2_6800 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064I_2_8080 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_OS12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_OS12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_OS12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_OS12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_OS12864_2_6800 : public U8G2 { + public: U8G2_ST7567_OS12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_OS12864_2_8080 : public U8G2 { + public: U8G2_ST7567_OS12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_JLX12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_JLX12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_JLX12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_JLX12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_JLX12864_F_6800 : public U8G2 { + public: U8G2_ST7567_JLX12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_JLX12864_F_8080 : public U8G2 { + public: U8G2_ST7567_JLX12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_jlx12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_ENH_DG128064_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_ENH_DG128064_F_6800 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064_F_8080 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064I_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_ENH_DG128064I_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_ENH_DG128064I_F_6800 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_ENH_DG128064I_F_8080 : public U8G2 { + public: U8G2_ST7567_ENH_DG128064I_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_enh_dg128064i_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_OS12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_OS12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_OS12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_OS12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_OS12864_F_6800 : public U8G2 { + public: U8G2_ST7567_OS12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_OS12864_F_8080 : public U8G2 { + public: U8G2_ST7567_OS12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_os12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_64X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_64X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_64X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_64X32_1_6800 : public U8G2 { + public: U8G2_ST7567_64X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_1_8080 : public U8G2 { + public: U8G2_ST7567_64X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_HEM6432_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_HEM6432_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_HEM6432_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_HEM6432_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_HEM6432_1_6800 : public U8G2 { + public: U8G2_ST7567_HEM6432_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_HEM6432_1_8080 : public U8G2 { + public: U8G2_ST7567_HEM6432_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_64X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_64X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_64X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_64X32_2_6800 : public U8G2 { + public: U8G2_ST7567_64X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_2_8080 : public U8G2 { + public: U8G2_ST7567_64X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_HEM6432_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_HEM6432_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_HEM6432_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_HEM6432_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_HEM6432_2_6800 : public U8G2 { + public: U8G2_ST7567_HEM6432_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_HEM6432_2_8080 : public U8G2 { + public: U8G2_ST7567_HEM6432_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_64X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_64X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_64X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_64X32_F_6800 : public U8G2 { + public: U8G2_ST7567_64X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_F_8080 : public U8G2 { + public: U8G2_ST7567_64X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_64x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_HEM6432_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7567_HEM6432_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7567_HEM6432_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7567_HEM6432_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7567_HEM6432_F_6800 : public U8G2 { + public: U8G2_ST7567_HEM6432_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_HEM6432_F_8080 : public U8G2 { + public: U8G2_ST7567_HEM6432_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_hem6432_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7567_64X32_1_SW_I2C : public U8G2 { + public: U8G2_ST7567_64X32_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_64x32_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7567_64X32_1_HW_I2C : public U8G2 { + public: U8G2_ST7567_64X32_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_64x32_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7567_HEM6432_1_SW_I2C : public U8G2 { + public: U8G2_ST7567_HEM6432_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_hem6432_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7567_HEM6432_1_HW_I2C : public U8G2 { + public: U8G2_ST7567_HEM6432_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_hem6432_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7567_64X32_2_SW_I2C : public U8G2 { + public: U8G2_ST7567_64X32_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_64x32_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7567_64X32_2_HW_I2C : public U8G2 { + public: U8G2_ST7567_64X32_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_64x32_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7567_HEM6432_2_SW_I2C : public U8G2 { + public: U8G2_ST7567_HEM6432_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_hem6432_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7567_HEM6432_2_HW_I2C : public U8G2 { + public: U8G2_ST7567_HEM6432_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_hem6432_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7567_64X32_F_SW_I2C : public U8G2 { + public: U8G2_ST7567_64X32_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_64x32_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7567_64X32_F_HW_I2C : public U8G2 { + public: U8G2_ST7567_64X32_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_64x32_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7567_HEM6432_F_SW_I2C : public U8G2 { + public: U8G2_ST7567_HEM6432_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_hem6432_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7567_HEM6432_F_HW_I2C : public U8G2 { + public: U8G2_ST7567_HEM6432_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7567_i2c_hem6432_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7571_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7571_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7571_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7571_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7571_128X128_1_6800 : public U8G2 { + public: U8G2_ST7571_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7571_128X128_1_8080 : public U8G2 { + public: U8G2_ST7571_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7571_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7571_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7571_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7571_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7571_128X128_2_6800 : public U8G2 { + public: U8G2_ST7571_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7571_128X128_2_8080 : public U8G2 { + public: U8G2_ST7571_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7571_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7571_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7571_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7571_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7571_128X128_F_6800 : public U8G2 { + public: U8G2_ST7571_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7571_128X128_F_8080 : public U8G2 { + public: U8G2_ST7571_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7571_128X128_1_SW_I2C : public U8G2 { + public: U8G2_ST7571_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_i2c_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7571_128X128_1_HW_I2C : public U8G2 { + public: U8G2_ST7571_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_i2c_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7571_128X128_2_SW_I2C : public U8G2 { + public: U8G2_ST7571_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_i2c_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7571_128X128_2_HW_I2C : public U8G2 { + public: U8G2_ST7571_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_i2c_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7571_128X128_F_SW_I2C : public U8G2 { + public: U8G2_ST7571_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_i2c_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7571_128X128_F_HW_I2C : public U8G2 { + public: U8G2_ST7571_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7571_i2c_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7586S_S028HN118A_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_S028HN118A_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_s028hn118a_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_S028HN118A_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_S028HN118A_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_s028hn118a_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_S028HN118A_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_S028HN118A_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_s028hn118a_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_S028HN118A_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_S028HN118A_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_s028hn118a_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_S028HN118A_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_S028HN118A_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_s028hn118a_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_S028HN118A_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_S028HN118A_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_s028hn118a_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_ERC240160_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_ERC240160_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_ERC240160_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7586S_ERC240160_1_6800 : public U8G2 { + public: U8G2_ST7586S_ERC240160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_ERC240160_1_8080 : public U8G2 { + public: U8G2_ST7586S_ERC240160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_YMC240160_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_YMC240160_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_YMC240160_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7586S_YMC240160_1_6800 : public U8G2 { + public: U8G2_ST7586S_YMC240160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_YMC240160_1_8080 : public U8G2 { + public: U8G2_ST7586S_YMC240160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_ERC240160_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_ERC240160_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_ERC240160_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7586S_ERC240160_2_6800 : public U8G2 { + public: U8G2_ST7586S_ERC240160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_ERC240160_2_8080 : public U8G2 { + public: U8G2_ST7586S_ERC240160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_YMC240160_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_YMC240160_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_YMC240160_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7586S_YMC240160_2_6800 : public U8G2 { + public: U8G2_ST7586S_YMC240160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_YMC240160_2_8080 : public U8G2 { + public: U8G2_ST7586S_YMC240160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_ERC240160_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_ERC240160_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_ERC240160_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_ERC240160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7586S_ERC240160_F_6800 : public U8G2 { + public: U8G2_ST7586S_ERC240160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_ERC240160_F_8080 : public U8G2 { + public: U8G2_ST7586S_ERC240160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_erc240160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_YMC240160_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7586S_YMC240160_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7586S_YMC240160_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7586S_YMC240160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7586S_YMC240160_F_6800 : public U8G2 { + public: U8G2_ST7586S_YMC240160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7586S_YMC240160_F_8080 : public U8G2 { + public: U8G2_ST7586S_YMC240160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7586s_ymc240160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7588_JLX12864_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7588_JLX12864_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7588_JLX12864_1_6800 : public U8G2 { + public: U8G2_ST7588_JLX12864_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_1_8080 : public U8G2 { + public: U8G2_ST7588_JLX12864_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7588_JLX12864_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7588_JLX12864_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7588_JLX12864_2_6800 : public U8G2 { + public: U8G2_ST7588_JLX12864_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_2_8080 : public U8G2 { + public: U8G2_ST7588_JLX12864_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST7588_JLX12864_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST7588_JLX12864_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST7588_JLX12864_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST7588_JLX12864_F_6800 : public U8G2 { + public: U8G2_ST7588_JLX12864_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_F_8080 : public U8G2 { + public: U8G2_ST7588_JLX12864_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_jlx12864_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST7588_JLX12864_1_SW_I2C : public U8G2 { + public: U8G2_ST7588_JLX12864_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_i2c_jlx12864_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7588_JLX12864_1_HW_I2C : public U8G2 { + public: U8G2_ST7588_JLX12864_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_i2c_jlx12864_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7588_JLX12864_2_SW_I2C : public U8G2 { + public: U8G2_ST7588_JLX12864_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_i2c_jlx12864_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7588_JLX12864_2_HW_I2C : public U8G2 { + public: U8G2_ST7588_JLX12864_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_i2c_jlx12864_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST7588_JLX12864_F_SW_I2C : public U8G2 { + public: U8G2_ST7588_JLX12864_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_i2c_jlx12864_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST7588_JLX12864_F_HW_I2C : public U8G2 { + public: U8G2_ST7588_JLX12864_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st7588_i2c_jlx12864_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256128_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256128_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256128_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256128_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX256128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256128_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX256128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_WO256X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_WO256X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_WO256X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_WO256X128_1_6800 : public U8G2 { + public: U8G2_ST75256_WO256X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_WO256X128_1_8080 : public U8G2 { + public: U8G2_ST75256_WO256X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256128_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256128_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256128_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256128_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX256128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256128_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX256128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_WO256X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_WO256X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_WO256X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_WO256X128_2_6800 : public U8G2 { + public: U8G2_ST75256_WO256X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_WO256X128_2_8080 : public U8G2 { + public: U8G2_ST75256_WO256X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256128_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256128_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256128_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256128_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX256128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256128_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX256128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_WO256X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_WO256X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_WO256X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_WO256X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_WO256X128_F_6800 : public U8G2 { + public: U8G2_ST75256_WO256X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_WO256X128_F_8080 : public U8G2 { + public: U8G2_ST75256_WO256X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_wo256x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256128_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256128_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_WO256X128_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_WO256X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_wo256x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_WO256X128_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_WO256X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_wo256x128_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256128_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256128_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_WO256X128_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_WO256X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_wo256x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_WO256X128_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_WO256X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_wo256x128_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256128_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256128_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_WO256X128_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_WO256X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_wo256x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_WO256X128_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_WO256X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_wo256x128_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160M_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160M_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160M_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160M_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160M_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160_ALT_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160_ALT_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160M_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160M_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160M_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160M_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160M_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160_ALT_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160_ALT_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160M_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160M_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160M_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160M_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160M_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160m_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX256160_ALT_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX256160_ALT_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_ALT_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX256160_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160M_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160m_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160M_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160M_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160m_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160_ALT_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160_ALT_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_alt_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160M_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160m_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160M_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160M_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160m_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160_ALT_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160_ALT_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_alt_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160M_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160m_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160M_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160M_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160m_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX256160_ALT_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX256160_ALT_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX256160_ALT_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx256160_alt_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX240160_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX240160_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX240160_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX240160_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX240160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX240160_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX240160_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX240160_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX240160_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX240160_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX240160_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX240160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX240160_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX240160_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX240160_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX240160_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX240160_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX240160_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX240160_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX240160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX240160_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX240160_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx240160_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX240160_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX240160_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx240160_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX240160_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX240160_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx240160_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX240160_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX240160_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx240160_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX240160_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX240160_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx240160_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX240160_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX240160_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx240160_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX240160_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX240160_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx240160_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX25664_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX25664_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX25664_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX25664_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX25664_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX25664_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX25664_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX25664_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX25664_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX25664_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX25664_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX25664_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX25664_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX25664_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX25664_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX25664_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX25664_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX25664_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX25664_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX25664_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX25664_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX25664_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx25664_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX25664_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX25664_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx25664_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX25664_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX25664_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx25664_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX25664_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX25664_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx25664_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX25664_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX25664_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx25664_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX25664_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX25664_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx25664_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX25664_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX25664_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx25664_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX172104_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX172104_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX172104_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX172104_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX172104_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX172104_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX172104_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX172104_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX172104_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX172104_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX172104_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX172104_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX172104_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX172104_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX172104_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX172104_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX172104_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX172104_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX172104_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX172104_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX172104_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX172104_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx172104_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX172104_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX172104_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx172104_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX172104_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX172104_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx172104_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX172104_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX172104_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx172104_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX172104_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX172104_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx172104_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX172104_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX172104_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx172104_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX172104_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX172104_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx172104_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX19296_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX19296_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX19296_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX19296_1_6800 : public U8G2 { + public: U8G2_ST75256_JLX19296_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX19296_1_8080 : public U8G2 { + public: U8G2_ST75256_JLX19296_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX19296_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX19296_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX19296_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX19296_2_6800 : public U8G2 { + public: U8G2_ST75256_JLX19296_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX19296_2_8080 : public U8G2 { + public: U8G2_ST75256_JLX19296_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX19296_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75256_JLX19296_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75256_JLX19296_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75256_JLX19296_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75256_JLX19296_F_6800 : public U8G2 { + public: U8G2_ST75256_JLX19296_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX19296_F_8080 : public U8G2 { + public: U8G2_ST75256_JLX19296_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_jlx19296_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75256_JLX19296_1_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX19296_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx19296_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX19296_1_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX19296_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx19296_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX19296_2_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX19296_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx19296_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX19296_2_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX19296_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx19296_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75256_JLX19296_F_SW_I2C : public U8G2 { + public: U8G2_ST75256_JLX19296_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx19296_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75256_JLX19296_F_HW_I2C : public U8G2 { + public: U8G2_ST75256_JLX19296_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75256_i2c_jlx19296_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75320_JLX320240_1_4W_SW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75320_JLX320240_1_4W_HW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75320_JLX320240_1_3W_SW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75320_JLX320240_1_6800 : public U8G2 { + public: U8G2_ST75320_JLX320240_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75320_JLX320240_1_8080 : public U8G2 { + public: U8G2_ST75320_JLX320240_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75320_JLX320240_2_4W_SW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75320_JLX320240_2_4W_HW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75320_JLX320240_2_3W_SW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75320_JLX320240_2_6800 : public U8G2 { + public: U8G2_ST75320_JLX320240_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75320_JLX320240_2_8080 : public U8G2 { + public: U8G2_ST75320_JLX320240_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75320_JLX320240_F_4W_SW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_ST75320_JLX320240_F_4W_HW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_ST75320_JLX320240_F_3W_SW_SPI : public U8G2 { + public: U8G2_ST75320_JLX320240_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_ST75320_JLX320240_F_6800 : public U8G2 { + public: U8G2_ST75320_JLX320240_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75320_JLX320240_F_8080 : public U8G2 { + public: U8G2_ST75320_JLX320240_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_jlx320240_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_ST75320_JLX320240_1_SW_I2C : public U8G2 { + public: U8G2_ST75320_JLX320240_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_i2c_jlx320240_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75320_JLX320240_1_HW_I2C : public U8G2 { + public: U8G2_ST75320_JLX320240_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_i2c_jlx320240_1(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75320_JLX320240_2_SW_I2C : public U8G2 { + public: U8G2_ST75320_JLX320240_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_i2c_jlx320240_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75320_JLX320240_2_HW_I2C : public U8G2 { + public: U8G2_ST75320_JLX320240_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_i2c_jlx320240_2(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_ST75320_JLX320240_F_SW_I2C : public U8G2 { + public: U8G2_ST75320_JLX320240_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_i2c_jlx320240_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8G2_ST75320_JLX320240_F_HW_I2C : public U8G2 { + public: U8G2_ST75320_JLX320240_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_st75320_i2c_jlx320240_f(&u8g2, rotation, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8G2_NT7534_TG12864R_1_4W_SW_SPI : public U8G2 { + public: U8G2_NT7534_TG12864R_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_NT7534_TG12864R_1_4W_HW_SPI : public U8G2 { + public: U8G2_NT7534_TG12864R_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_NT7534_TG12864R_1_6800 : public U8G2 { + public: U8G2_NT7534_TG12864R_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_NT7534_TG12864R_1_8080 : public U8G2 { + public: U8G2_NT7534_TG12864R_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_NT7534_TG12864R_2_4W_SW_SPI : public U8G2 { + public: U8G2_NT7534_TG12864R_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_NT7534_TG12864R_2_4W_HW_SPI : public U8G2 { + public: U8G2_NT7534_TG12864R_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_NT7534_TG12864R_2_6800 : public U8G2 { + public: U8G2_NT7534_TG12864R_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_NT7534_TG12864R_2_8080 : public U8G2 { + public: U8G2_NT7534_TG12864R_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_NT7534_TG12864R_F_4W_SW_SPI : public U8G2 { + public: U8G2_NT7534_TG12864R_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_NT7534_TG12864R_F_4W_HW_SPI : public U8G2 { + public: U8G2_NT7534_TG12864R_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_NT7534_TG12864R_F_6800 : public U8G2 { + public: U8G2_NT7534_TG12864R_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_NT7534_TG12864R_F_8080 : public U8G2 { + public: U8G2_NT7534_TG12864R_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_nt7534_tg12864r_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST3020_ERC19264_1_4W_SW_SPI : public U8G2 { + public: U8G2_IST3020_ERC19264_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IST3020_ERC19264_1_4W_HW_SPI : public U8G2 { + public: U8G2_IST3020_ERC19264_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IST3020_ERC19264_1_6800 : public U8G2 { + public: U8G2_IST3020_ERC19264_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST3020_ERC19264_1_8080 : public U8G2 { + public: U8G2_IST3020_ERC19264_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST3020_ERC19264_2_4W_SW_SPI : public U8G2 { + public: U8G2_IST3020_ERC19264_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IST3020_ERC19264_2_4W_HW_SPI : public U8G2 { + public: U8G2_IST3020_ERC19264_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IST3020_ERC19264_2_6800 : public U8G2 { + public: U8G2_IST3020_ERC19264_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST3020_ERC19264_2_8080 : public U8G2 { + public: U8G2_IST3020_ERC19264_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST3020_ERC19264_F_4W_SW_SPI : public U8G2 { + public: U8G2_IST3020_ERC19264_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IST3020_ERC19264_F_4W_HW_SPI : public U8G2 { + public: U8G2_IST3020_ERC19264_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IST3020_ERC19264_F_6800 : public U8G2 { + public: U8G2_IST3020_ERC19264_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST3020_ERC19264_F_8080 : public U8G2 { + public: U8G2_IST3020_ERC19264_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist3020_erc19264_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST7920_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_IST7920_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IST7920_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_IST7920_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IST7920_128X128_1_6800 : public U8G2 { + public: U8G2_IST7920_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST7920_128X128_1_8080 : public U8G2 { + public: U8G2_IST7920_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST7920_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_IST7920_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IST7920_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_IST7920_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IST7920_128X128_2_6800 : public U8G2 { + public: U8G2_IST7920_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST7920_128X128_2_8080 : public U8G2 { + public: U8G2_IST7920_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST7920_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_IST7920_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IST7920_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_IST7920_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IST7920_128X128_F_6800 : public U8G2 { + public: U8G2_IST7920_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_IST7920_128X128_F_8080 : public U8G2 { + public: U8G2_IST7920_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ist7920_128x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SBN1661_122X32_1 : public U8G2 { + public: U8G2_SBN1661_122X32_1(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8G2() { + u8g2_Setup_sbn1661_122x32_1(&u8g2, rotation, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8G2_SBN1661_122X32_2 : public U8G2 { + public: U8G2_SBN1661_122X32_2(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8G2() { + u8g2_Setup_sbn1661_122x32_2(&u8g2, rotation, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8G2_SBN1661_122X32_F : public U8G2 { + public: U8G2_SBN1661_122X32_F(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8G2() { + u8g2_Setup_sbn1661_122x32_f(&u8g2, rotation, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8G2_SED1520_122X32_1 : public U8G2 { + public: U8G2_SED1520_122X32_1(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8G2() { + u8g2_Setup_sed1520_122x32_1(&u8g2, rotation, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8G2_SED1520_122X32_2 : public U8G2 { + public: U8G2_SED1520_122X32_2(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8G2() { + u8g2_Setup_sed1520_122x32_2(&u8g2, rotation, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8G2_SED1520_122X32_F : public U8G2 { + public: U8G2_SED1520_122X32_F(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8G2() { + u8g2_Setup_sed1520_122x32_f(&u8g2, rotation, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8G2_KS0108_128X64_1 : public U8G2 { + public: U8G2_KS0108_128X64_1(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ks0108_128x64_1(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_KS0108_128X64_2 : public U8G2 { + public: U8G2_KS0108_128X64_2(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ks0108_128x64_2(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_KS0108_128X64_F : public U8G2 { + public: U8G2_KS0108_128X64_F(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ks0108_128x64_f(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_KS0108_ERM19264_1 : public U8G2 { + public: U8G2_KS0108_ERM19264_1(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ks0108_erm19264_1(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_KS0108_ERM19264_2 : public U8G2 { + public: U8G2_KS0108_ERM19264_2(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ks0108_erm19264_2(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_KS0108_ERM19264_F : public U8G2 { + public: U8G2_KS0108_ERM19264_F(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ks0108_erm19264_f(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_T7932_150X32_1 : public U8G2 { + public: U8G2_T7932_150X32_1(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t7932_150x32_1(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_T7932_150X32_2 : public U8G2 { + public: U8G2_T7932_150X32_2(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t7932_150x32_2(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_T7932_150X32_F : public U8G2 { + public: U8G2_T7932_150X32_F(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t7932_150x32_f(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_HD44102_100X64_1 : public U8G2 { + public: U8G2_HD44102_100X64_1(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hd44102_100x64_1(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_HD44102_100X64_2 : public U8G2 { + public: U8G2_HD44102_100X64_2(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hd44102_100x64_2(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_HD44102_100X64_F : public U8G2 { + public: U8G2_HD44102_100X64_F(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_hd44102_100x64_f(&u8g2, rotation, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8G2_LC7981_160X80_1_6800 : public U8G2 { + public: U8G2_LC7981_160X80_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_160x80_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_160X80_2_6800 : public U8G2 { + public: U8G2_LC7981_160X80_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_160x80_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_160X80_F_6800 : public U8G2 { + public: U8G2_LC7981_160X80_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_160x80_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_160X160_1_6800 : public U8G2 { + public: U8G2_LC7981_160X160_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_160x160_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_160X160_2_6800 : public U8G2 { + public: U8G2_LC7981_160X160_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_160x160_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_160X160_F_6800 : public U8G2 { + public: U8G2_LC7981_160X160_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_160x160_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_240X128_1_6800 : public U8G2 { + public: U8G2_LC7981_240X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_240x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_240X128_2_6800 : public U8G2 { + public: U8G2_LC7981_240X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_240x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_240X128_F_6800 : public U8G2 { + public: U8G2_LC7981_240X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_240x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_240X64_1_6800 : public U8G2 { + public: U8G2_LC7981_240X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_240x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_240X64_2_6800 : public U8G2 { + public: U8G2_LC7981_240X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_240x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_LC7981_240X64_F_6800 : public U8G2 { + public: U8G2_LC7981_240X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_lc7981_240x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_240X128_1_8080 : public U8G2 { + public: U8G2_T6963_240X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_240x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_240X128_2_8080 : public U8G2 { + public: U8G2_T6963_240X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_240x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_240X128_F_8080 : public U8G2 { + public: U8G2_T6963_240X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_240x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_240X64_1_8080 : public U8G2 { + public: U8G2_T6963_240X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_240x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_240X64_2_8080 : public U8G2 { + public: U8G2_T6963_240X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_240x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_240X64_F_8080 : public U8G2 { + public: U8G2_T6963_240X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_240x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_256X64_1_8080 : public U8G2 { + public: U8G2_T6963_256X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_256x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_256X64_2_8080 : public U8G2 { + public: U8G2_T6963_256X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_256x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_256X64_F_8080 : public U8G2 { + public: U8G2_T6963_256X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_256x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_128X64_1_8080 : public U8G2 { + public: U8G2_T6963_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_128X64_ALT_1_8080 : public U8G2 { + public: U8G2_T6963_128X64_ALT_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_128x64_alt_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_128X64_2_8080 : public U8G2 { + public: U8G2_T6963_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_128X64_ALT_2_8080 : public U8G2 { + public: U8G2_T6963_128X64_ALT_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_128x64_alt_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_128X64_F_8080 : public U8G2 { + public: U8G2_T6963_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_128X64_ALT_F_8080 : public U8G2 { + public: U8G2_T6963_128X64_ALT_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_128x64_alt_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_160X80_1_8080 : public U8G2 { + public: U8G2_T6963_160X80_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_160x80_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_160X80_2_8080 : public U8G2 { + public: U8G2_T6963_160X80_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_160x80_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_T6963_160X80_F_8080 : public U8G2 { + public: U8G2_T6963_160X80_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_t6963_160x80_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X32_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1320_160X32_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1320_160X32_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1320_160X32_1_6800 : public U8G2 { + public: U8G2_SSD1320_160X32_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X32_1_8080 : public U8G2 { + public: U8G2_SSD1320_160X32_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X32_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1320_160X32_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1320_160X32_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1320_160X32_2_6800 : public U8G2 { + public: U8G2_SSD1320_160X32_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X32_2_8080 : public U8G2 { + public: U8G2_SSD1320_160X32_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X32_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1320_160X32_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1320_160X32_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X32_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1320_160X32_F_6800 : public U8G2 { + public: U8G2_SSD1320_160X32_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X32_F_8080 : public U8G2 { + public: U8G2_SSD1320_160X32_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x32_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X132_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1320_160X132_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1320_160X132_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1320_160X132_1_6800 : public U8G2 { + public: U8G2_SSD1320_160X132_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X132_1_8080 : public U8G2 { + public: U8G2_SSD1320_160X132_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X132_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1320_160X132_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1320_160X132_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1320_160X132_2_6800 : public U8G2 { + public: U8G2_SSD1320_160X132_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X132_2_8080 : public U8G2 { + public: U8G2_SSD1320_160X132_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X132_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1320_160X132_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1320_160X132_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1320_160X132_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1320_160X132_F_6800 : public U8G2 { + public: U8G2_SSD1320_160X132_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1320_160X132_F_8080 : public U8G2 { + public: U8G2_SSD1320_160X132_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1320_160x132_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1322_NHD_256X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1322_NHD_256X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_1_6800 : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_1_8080 : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1322_NHD_256X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1322_NHD_256X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_2_6800 : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_2_8080 : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1322_NHD_256X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1322_NHD_256X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_F_6800 : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_256X64_F_8080 : public U8G2 { + public: U8G2_SSD1322_NHD_256X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_256x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1322_NHD_128X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1322_NHD_128X64_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_1_6800 : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_1_8080 : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1322_NHD_128X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1322_NHD_128X64_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_2_6800 : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_2_8080 : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1322_NHD_128X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1322_NHD_128X64_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_F_6800 : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1322_NHD_128X64_F_8080 : public U8G2 { + public: U8G2_SSD1322_NHD_128X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1322_nhd_128x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1606_172X72_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1606_172X72_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1606_172X72_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1606_172X72_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1606_172X72_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1606_172X72_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1606_172X72_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1606_172X72_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1606_172X72_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1606_172X72_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1606_172x72_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_200X200_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_200X200_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_200X200_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_GD_200X200_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_GD_200X200_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_GD_200X200_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_WS_200X200_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_WS_200X200_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_WS_200X200_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_200X200_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_200X200_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_200X200_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_GD_200X200_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_GD_200X200_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_GD_200X200_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_WS_200X200_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_WS_200X200_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_WS_200X200_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_200X200_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_200X200_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_200X200_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_200X200_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_200x200_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_GD_200X200_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_GD_200X200_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_GD_200X200_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_GD_200X200_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_gd_200x200_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1607_WS_200X200_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_SSD1607_WS_200X200_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_SSD1607_WS_200X200_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1607_WS_200X200_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1607_ws_200x200_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_IL3820_296X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IL3820_296X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IL3820_296X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_IL3820_V2_296X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IL3820_V2_296X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IL3820_V2_296X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_IL3820_296X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IL3820_296X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IL3820_296X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_IL3820_V2_296X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IL3820_V2_296X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IL3820_V2_296X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_IL3820_296X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IL3820_296X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IL3820_296X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_IL3820_296X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_296x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_IL3820_V2_296X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_IL3820_V2_296X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_IL3820_V2_296X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_IL3820_V2_296X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_il3820_v2_296x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SED1330_240X128_1_6800 : public U8G2 { + public: U8G2_SED1330_240X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sed1330_240x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SED1330_240X128_1_8080 : public U8G2 { + public: U8G2_SED1330_240X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sed1330_240x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SED1330_240X128_2_6800 : public U8G2 { + public: U8G2_SED1330_240X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sed1330_240x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SED1330_240X128_2_8080 : public U8G2 { + public: U8G2_SED1330_240X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sed1330_240x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SED1330_240X128_F_6800 : public U8G2 { + public: U8G2_SED1330_240X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sed1330_240x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SED1330_240X128_F_8080 : public U8G2 { + public: U8G2_SED1330_240X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_sed1330_240x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_NHD_240X128_1_6800 : public U8G2 { + public: U8G2_RA8835_NHD_240X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_nhd_240x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_NHD_240X128_1_8080 : public U8G2 { + public: U8G2_RA8835_NHD_240X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_nhd_240x128_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_NHD_240X128_2_6800 : public U8G2 { + public: U8G2_RA8835_NHD_240X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_nhd_240x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_NHD_240X128_2_8080 : public U8G2 { + public: U8G2_RA8835_NHD_240X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_nhd_240x128_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_NHD_240X128_F_6800 : public U8G2 { + public: U8G2_RA8835_NHD_240X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_nhd_240x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_NHD_240X128_F_8080 : public U8G2 { + public: U8G2_RA8835_NHD_240X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_nhd_240x128_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_320X240_1_6800 : public U8G2 { + public: U8G2_RA8835_320X240_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_320x240_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_320X240_1_8080 : public U8G2 { + public: U8G2_RA8835_320X240_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_320x240_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_320X240_2_6800 : public U8G2 { + public: U8G2_RA8835_320X240_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_320x240_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_320X240_2_8080 : public U8G2 { + public: U8G2_RA8835_320X240_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_320x240_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_320X240_F_6800 : public U8G2 { + public: U8G2_RA8835_320X240_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_320x240_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_RA8835_320X240_F_8080 : public U8G2 { + public: U8G2_RA8835_320X240_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ra8835_320x240_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_MAX7219_64X8_1_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_64X8_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_64x8_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_64X8_1_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_64X8_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_64x8_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_64X8_2_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_64X8_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_64x8_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_64X8_2_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_64X8_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_64x8_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_64X8_F_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_64X8_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_64x8_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_64X8_F_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_64X8_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_64x8_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_32X8_1_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_32X8_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_32x8_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_32X8_1_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_32X8_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_32x8_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_32X8_2_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_32X8_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_32x8_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_32X8_2_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_32X8_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_32x8_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_32X8_F_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_32X8_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_32x8_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_32X8_F_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_32X8_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_32x8_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_8X8_1_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_8X8_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_8x8_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_8X8_1_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_8X8_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_8x8_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_8X8_2_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_8X8_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_8x8_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_8X8_2_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_8X8_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_8x8_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_MAX7219_8X8_F_4W_SW_SPI : public U8G2 { + public: U8G2_MAX7219_8X8_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_8x8_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_MAX7219_8X8_F_4W_HW_SPI : public U8G2 { + public: U8G2_MAX7219_8X8_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_max7219_8x8_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15E06_160100_1_4W_SW_SPI : public U8G2 { + public: U8G2_S1D15E06_160100_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_S1D15E06_160100_1_4W_HW_SPI : public U8G2 { + public: U8G2_S1D15E06_160100_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15E06_160100_1_6800 : public U8G2 { + public: U8G2_S1D15E06_160100_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15E06_160100_1_8080 : public U8G2 { + public: U8G2_S1D15E06_160100_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15E06_160100_2_4W_SW_SPI : public U8G2 { + public: U8G2_S1D15E06_160100_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_S1D15E06_160100_2_4W_HW_SPI : public U8G2 { + public: U8G2_S1D15E06_160100_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15E06_160100_2_6800 : public U8G2 { + public: U8G2_S1D15E06_160100_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15E06_160100_2_8080 : public U8G2 { + public: U8G2_S1D15E06_160100_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15E06_160100_F_4W_SW_SPI : public U8G2 { + public: U8G2_S1D15E06_160100_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_S1D15E06_160100_F_4W_HW_SPI : public U8G2 { + public: U8G2_S1D15E06_160100_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15E06_160100_F_6800 : public U8G2 { + public: U8G2_S1D15E06_160100_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15E06_160100_F_8080 : public U8G2 { + public: U8G2_S1D15E06_160100_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15e06_160100_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15721_240X64_1_4W_SW_SPI : public U8G2 { + public: U8G2_S1D15721_240X64_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_S1D15721_240X64_1_4W_HW_SPI : public U8G2 { + public: U8G2_S1D15721_240X64_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_1(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15721_240X64_1_6800 : public U8G2 { + public: U8G2_S1D15721_240X64_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15721_240X64_1_8080 : public U8G2 { + public: U8G2_S1D15721_240X64_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_1(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15721_240X64_2_4W_SW_SPI : public U8G2 { + public: U8G2_S1D15721_240X64_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_2(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_S1D15721_240X64_2_4W_HW_SPI : public U8G2 { + public: U8G2_S1D15721_240X64_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_2(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15721_240X64_2_6800 : public U8G2 { + public: U8G2_S1D15721_240X64_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15721_240X64_2_8080 : public U8G2 { + public: U8G2_S1D15721_240X64_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_2(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15721_240X64_F_4W_SW_SPI : public U8G2 { + public: U8G2_S1D15721_240X64_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_f(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8G2_S1D15721_240X64_F_4W_HW_SPI : public U8G2 { + public: U8G2_S1D15721_240X64_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_f(&u8g2, rotation, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8G2_S1D15721_240X64_F_6800 : public U8G2 { + public: U8G2_S1D15721_240X64_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_S1D15721_240X64_F_8080 : public U8G2 { + public: U8G2_S1D15721_240X64_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_s1d15721_240x64_f(&u8g2, rotation, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; + +#endif /* U8X8_USE_PINS */ + +#endif /* _U8G2LIB_HH */ diff --git a/sys/rt-thread/port/U8x8lib.cpp b/sys/rt-thread/port/U8x8lib.cpp new file mode 100644 index 00000000..7fcfb5c6 --- /dev/null +++ b/sys/rt-thread/port/U8x8lib.cpp @@ -0,0 +1,1876 @@ +/* + + U8x8lib.cpp + + Arduino specific low level functions + + + Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) + + Copyright (c) 2016, olikraus@gmail.com + All rights reserved. + + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, this list + of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + + +#include "U8x8lib.h" + +#ifdef ARDUINO +#ifdef U8X8_HAVE_HW_SPI +#include +#endif +#ifdef U8X8_HAVE_HW_I2C +#include +#endif +#endif + + +/*=============================================*/ + +size_t U8X8::write(uint8_t v) +{ + if ( v == '\n' ) + { + uint8_t dy = u8x8_pgm_read(u8x8.font+3); /* new 2019 format */ + ty+=dy; + tx=0; + } + else + { + uint8_t dx = u8x8_pgm_read(u8x8.font+2); /* new 2019 format */ + u8x8_DrawGlyph(&u8x8, tx, ty, v); + + tx+=dx; + } + return 1; +} + + + +/*=============================================*/ +/*=== ARDUINO GPIO & DELAY ===*/ + +#ifdef ARDUINO +#ifdef U8X8_USE_PINS +extern "C" uint8_t u8x8_gpio_and_delay_arduino(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ + uint8_t i; + switch(msg) + { + case U8X8_MSG_GPIO_AND_DELAY_INIT: + + for( i = 0; i < U8X8_PIN_CNT; i++ ) + if ( u8x8->pins[i] != U8X8_PIN_NONE ) + { + if ( i < U8X8_PIN_OUTPUT_CNT ) + { + pinMode(u8x8->pins[i], OUTPUT); + } + else + { +#ifdef INPUT_PULLUP + pinMode(u8x8->pins[i], INPUT_PULLUP); +#else + pinMode(u8x8->pins[i], OUTPUT); + digitalWrite(u8x8->pins[i], 1); +#endif + } + } + + break; + +#ifndef __AVR__ + /* this case is not compiled for any AVR, because AVR uC are so slow */ + /* that this delay does not matter */ + case U8X8_MSG_DELAY_NANO: + delayMicroseconds(arg_int==0?0:1); + break; +#endif + + case U8X8_MSG_DELAY_10MICRO: + /* not used at the moment */ + break; + + case U8X8_MSG_DELAY_100NANO: + /* not used at the moment */ + break; + + case U8X8_MSG_DELAY_MILLI: + delay(arg_int); + break; + case U8X8_MSG_DELAY_I2C: + /* arg_int is 1 or 4: 100KHz (5us) or 400KHz (1.25us) */ + delayMicroseconds(arg_int<=2?5:2); + break; + case U8X8_MSG_GPIO_I2C_CLOCK: + case U8X8_MSG_GPIO_I2C_DATA: + if ( arg_int == 0 ) + { + pinMode(u8x8_GetPinValue(u8x8, msg), OUTPUT); + digitalWrite(u8x8_GetPinValue(u8x8, msg), 0); + } + else + { +#ifdef INPUT_PULLUP + pinMode(u8x8_GetPinValue(u8x8, msg), INPUT_PULLUP); +#else + pinMode(u8x8_GetPinValue(u8x8, msg), OUTPUT); + digitalWrite(u8x8_GetPinValue(u8x8, msg), 1); +#endif + } + break; + default: + if ( msg >= U8X8_MSG_GPIO(0) ) + { + i = u8x8_GetPinValue(u8x8, msg); + if ( i != U8X8_PIN_NONE ) + { + if ( u8x8_GetPinIndex(u8x8, msg) < U8X8_PIN_OUTPUT_CNT ) + { + digitalWrite(i, arg_int); + } + else + { + if ( u8x8_GetPinIndex(u8x8, msg) == U8X8_PIN_OUTPUT_CNT ) + { + // call yield() for the first pin only, u8x8 will always request all the pins, so this should be ok + yield(); + } + u8x8_SetGPIOResult(u8x8, digitalRead(i) == 0 ? 0 : 1); + } + } + break; + } + + return 0; + } + return 1; +} +#endif // U8X8_USE_PINS + + + + +/*=============================================*/ +/*=== 3 WIRE SOFTWARE SPI ===*/ + +/* + replacement for a more faster u8x8_byte_3wire_sw_spi + in general u8x8_byte_3wire_sw_spi could be a fallback: + + uint8_t u8x8_byte_arduino_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_3wire_sw_spi(u8x8, msg,arg_int, arg_ptr); + } + + + +*/ + +#ifndef __AVR_ARCH__ +#define __AVR_ARCH__ 0 +#endif + +#if !defined(U8X8_USE_PINS) + /* no pin information (very strange), so fallback */ + uint8_t u8x8_byte_arduino_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_3wire_sw_spi(u8x8, msg,arg_int, arg_ptr); + } + +#elif __AVR_ARCH__ == 4 || __AVR_ARCH__ == 5 || __AVR_ARCH__ == 51 || __AVR_ARCH__ == 6 || __AVR_ARCH__ == 103 + +/* this function completly replaces u8x8_byte_4wire_sw_spi*/ +extern "C" uint8_t u8x8_byte_arduino_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t i; + uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8); + uint16_t b; + uint8_t *data; + + /* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */ + /* so, it should be possible to use multiple displays with different pins */ + + static volatile uint8_t *arduino_clock_port; + + static uint8_t arduino_clock_mask; + static uint8_t arduino_clock_n_mask; + + static volatile uint8_t *arduino_data_port; + static uint8_t arduino_data_mask; + static uint8_t arduino_data_n_mask; + + static uint8_t last_dc; + + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + + data = (uint8_t *)arg_ptr; + if ( takeover_edge == 0 ) + { + while( arg_int > 0 ) + { + b = *data; + if ( last_dc != 0 ) + b |= 256; + data++; + arg_int--; + /* issue 156, check for speed */ +#if F_CPU <= 17000000 + if ( b == 0 ) + { + *arduino_data_port &= arduino_data_n_mask; + for( i = 0; i < 9; i++ ) + { + *arduino_clock_port |= arduino_clock_mask; + *arduino_clock_port &= arduino_clock_n_mask; + } + } + else +#endif + { + for( i = 0; i < 9; i++ ) + { + if ( b & 256 ) + *arduino_data_port |= arduino_data_mask; + else + *arduino_data_port &= arduino_data_n_mask; + + *arduino_clock_port |= arduino_clock_mask; + b <<= 1; + *arduino_clock_port &= arduino_clock_n_mask; + } + } + } + } + else + { + while( arg_int > 0 ) + { + b = *data; + if ( last_dc != 0 ) + b |= 256; + data++; + arg_int--; + /* issue 156, check for speed */ +#if F_CPU <= 17000000 + if ( b == 0 ) + { + *arduino_data_port &= arduino_data_n_mask; + for( i = 0; i < 9; i++ ) + { + *arduino_clock_port &= arduino_clock_n_mask; + *arduino_clock_port |= arduino_clock_mask; + } + } + else +#endif + { + for( i = 0; i < 9; i++ ) + { + if ( b & 256 ) + *arduino_data_port |= arduino_data_mask; + else + *arduino_data_port &= arduino_data_n_mask; + + *arduino_clock_port &= arduino_clock_n_mask; + b <<= 1; + *arduino_clock_port |= arduino_clock_mask; + } + } + } + } + break; + + case U8X8_MSG_BYTE_INIT: + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* no wait required here */ + + /* for SPI: setup correct level of the clock signal */ + u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8)); + break; + case U8X8_MSG_BYTE_SET_DC: + last_dc = arg_int; + break; + case U8X8_MSG_BYTE_START_TRANSFER: + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_SPI_CLOCK] */ + + arduino_clock_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_CLOCK])); + arduino_clock_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_CLOCK]); + arduino_clock_n_mask = ~arduino_clock_mask; + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_SPI_DATA] */ + + arduino_data_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_DATA])); + arduino_data_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_DATA]); + arduino_data_n_mask = ~arduino_data_mask; + + break; + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + break; + default: + return 0; + } + return 1; +} + +#else + /* fallback */ + uint8_t u8x8_byte_arduino_3wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_3wire_sw_spi(u8x8, msg,arg_int, arg_ptr); + } + +#endif + + + + + +/*=============================================*/ +/*=== 4 WIRE SOFTWARE SPI ===*/ + +/* + replacement for a more faster u8x8_byte_4wire_sw_spi + in general u8x8_byte_4wire_sw_spi could be a fallback: + + uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_4wire_sw_spi(u8x8, msg,arg_int, arg_ptr); + } + + + +*/ + +#ifndef __AVR_ARCH__ +#define __AVR_ARCH__ 0 +#endif + +#if !defined(U8X8_USE_PINS) + /* no pin information (very strange), so fallback */ + uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_4wire_sw_spi(u8x8, msg,arg_int, arg_ptr); + } + +#elif __AVR_ARCH__ == 4 || __AVR_ARCH__ == 5 || __AVR_ARCH__ == 51 || __AVR_ARCH__ == 6 || __AVR_ARCH__ == 103 + +/* this function completly replaces u8x8_byte_4wire_sw_spi*/ +extern "C" uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t SREG_backup; + uint8_t i, b; + uint8_t *data; + uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8); + //uint8_t not_takeover_edge = 1 - takeover_edge; + + /* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */ + /* so, it should be possible to use multiple displays with different pins */ + + static volatile uint8_t *arduino_clock_port; + + static uint8_t arduino_clock_mask; + static uint8_t arduino_clock_n_mask; + + static volatile uint8_t *arduino_data_port; + static uint8_t arduino_data_mask; + static uint8_t arduino_data_n_mask; + + + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + + data = (uint8_t *)arg_ptr; + if ( takeover_edge == 0 ) + { + while( arg_int > 0 ) + { + b = *data; + data++; + arg_int--; + SREG_backup = SREG; cli(); + /* issue 156, check for speed */ +#if F_CPU <= 17000000 + if ( b == 0 ) + { + *arduino_data_port &= arduino_data_n_mask; + for( i = 0; i < 8; i++ ) + { + *arduino_clock_port |= arduino_clock_mask; + *arduino_clock_port &= arduino_clock_n_mask; + } + } + else +#endif + { + for( i = 0; i < 8; i++ ) + { + if ( b & 128 ) + *arduino_data_port |= arduino_data_mask; + else + *arduino_data_port &= arduino_data_n_mask; + + *arduino_clock_port |= arduino_clock_mask; + b <<= 1; + *arduino_clock_port &= arduino_clock_n_mask; + } + } + SREG = SREG_backup; + } + } + else + { + while( arg_int > 0 ) + { + b = *data; + data++; + arg_int--; + SREG_backup = SREG; cli(); + /* issue 156, check for speed */ +#if F_CPU <= 17000000 + if ( b == 0 ) + { + *arduino_data_port &= arduino_data_n_mask; + for( i = 0; i < 8; i++ ) + { + *arduino_clock_port &= arduino_clock_n_mask; + *arduino_clock_port |= arduino_clock_mask; + } + } + else +#endif + { + for( i = 0; i < 8; i++ ) + { + if ( b & 128 ) + *arduino_data_port |= arduino_data_mask; + else + *arduino_data_port &= arduino_data_n_mask; + + *arduino_clock_port &= arduino_clock_n_mask; + b <<= 1; + *arduino_clock_port |= arduino_clock_mask; + } + } + SREG = SREG_backup; + } + } + break; + + case U8X8_MSG_BYTE_INIT: + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* no wait required here */ + + /* for SPI: setup correct level of the clock signal */ + u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8)); + break; + case U8X8_MSG_BYTE_SET_DC: + u8x8_gpio_SetDC(u8x8, arg_int); + break; + case U8X8_MSG_BYTE_START_TRANSFER: + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_SPI_CLOCK] */ + + arduino_clock_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_CLOCK])); + arduino_clock_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_CLOCK]); + arduino_clock_n_mask = ~arduino_clock_mask; + + + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_SPI_DATA] */ + + arduino_data_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_DATA])); + arduino_data_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_DATA]); + arduino_data_n_mask = ~arduino_data_mask; + + break; + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + break; + default: + return 0; + } + return 1; +} + +#elif defined(__SAM3X8E__) /* Arduino DUE */ + +/* this function completly replaces u8x8_byte_4wire_sw_spi*/ +extern "C" uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t i, b; + uint16_t us = ((u8x8->display_info->sck_pulse_width_ns + 999)/1000); + uint8_t *data; + uint8_t takeover_edge = u8x8_GetSPIClockPhase(u8x8); + //uint8_t not_takeover_edge = 1 - takeover_edge; + + /* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */ + /* so, it should be possible to use multiple displays with different pins */ + + /* + static volatile uint32_t *arduino_clock_port; + static uint32_t arduino_clock_mask; + static uint32_t arduino_clock_n_mask; + + static volatile uint32_t *arduino_data_port; + static uint32_t arduino_data_mask; + static uint32_t arduino_data_n_mask; + */ + + static WoReg *arduinoSetClockPort, *arduinoUnsetClockPort; + static uint32_t arduino_clock_mask; + + static WoReg *arduinoSetDataPort, *arduinoUnsetDataPort; + static uint32_t arduino_data_mask; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + + data = (uint8_t *)arg_ptr; + if ( takeover_edge == 0 ) + { + while( arg_int > 0 ) + { + b = *data; + data++; + arg_int--; + { + for( i = 0; i < 8; i++ ) + { + /* + if ( b & 128 ) + *arduino_data_port |= arduino_data_mask; + else + *arduino_data_port &= arduino_data_n_mask; + */ + if (b & 128) + *arduinoSetDataPort = arduino_data_mask; + else + *arduinoUnsetDataPort = arduino_data_mask; + + //delayMicroseconds(us); + //*arduino_clock_port |= arduino_clock_mask; + *arduinoSetClockPort = arduino_clock_mask; + b <<= 1; + delayMicroseconds(us); + //*arduino_clock_port &= arduino_clock_n_mask; + *arduinoUnsetClockPort = arduino_clock_mask; + } + } + } + } + else + { + while( arg_int > 0 ) + { + b = *data; + data++; + arg_int--; + { + for( i = 0; i < 8; i++ ) + { + /* + if ( b & 128 ) + *arduino_data_port |= arduino_data_mask; + else + *arduino_data_port &= arduino_data_n_mask; + */ + if (b & 128) + *arduinoSetDataPort = arduino_data_mask; + else + *arduinoUnsetDataPort = arduino_data_mask; + + //delayMicroseconds(us); + //*arduino_clock_port &= arduino_clock_n_mask; + *arduinoUnsetClockPort = arduino_clock_mask; + b <<= 1; + delayMicroseconds(us); + //*arduino_clock_port |= arduino_clock_mask; + *arduinoSetClockPort = arduino_clock_mask; + } + } + } + } + break; + + case U8X8_MSG_BYTE_INIT: + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* no wait required here */ + + /* for SPI: setup correct level of the clock signal */ + u8x8_gpio_SetSPIClock(u8x8, u8x8_GetSPIClockPhase(u8x8)); + break; + case U8X8_MSG_BYTE_SET_DC: + u8x8_gpio_SetDC(u8x8, arg_int); + break; + case U8X8_MSG_BYTE_START_TRANSFER: + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_SPI_CLOCK] */ + + /* + arduino_clock_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_CLOCK])); + arduino_clock_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_CLOCK]); + arduino_clock_n_mask = ~arduino_clock_mask; + + arduino_data_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_DATA])); + arduino_data_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_DATA]); + arduino_data_n_mask = ~arduino_data_mask; + */ + + arduinoSetClockPort = &digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_CLOCK])->PIO_SODR; + arduinoUnsetClockPort = &digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_CLOCK])->PIO_CODR; + arduino_clock_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_CLOCK]); + + arduinoSetDataPort = &digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_DATA])->PIO_SODR; + arduinoUnsetDataPort = &digitalPinToPort(u8x8->pins[U8X8_PIN_SPI_DATA])->PIO_CODR; + arduino_data_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_SPI_DATA]); + + + break; + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + break; + default: + return 0; + } + return 1; +} + + +#else + /* fallback */ + uint8_t u8x8_byte_arduino_4wire_sw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_4wire_sw_spi(u8x8, msg,arg_int, arg_ptr); + } + +#endif + + +/*=============================================*/ +/*=== 3 WIRE HARDWARE SPI with 8 bit HW SPI Subsystem ===*/ +/* +references: + https://github.com/olikraus/ucglib/blob/master/cppsrc/Ucglib.cpp#L581 + https://github.com/olikraus/u8g2/issues/1041 +*/ + +static uint8_t arduino_hw_spi_3w_buffer[9]; +static uint8_t arduino_hw_spi_3w_bytepos; +static uint16_t arduino_hw_spi_3w_dc; // 0 = dc==0, 256 = dc==1 + +static void arduino_hw_spi_3w_init() +{ + memset(arduino_hw_spi_3w_buffer, 0, 9); + arduino_hw_spi_3w_bytepos = 0; +} + +static void arduino_hw_spi_3w_flush(void) +{ +#ifdef U8X8_HAVE_HW_SPI + uint8_t i; + for(i = 0; i <= arduino_hw_spi_3w_bytepos; i++) + { + SPI.transfer(arduino_hw_spi_3w_buffer[i]); + } +#endif +} + +static void arduino_hw_spi_3w_sendbyte(uint8_t data) +{ + static union { uint16_t val; struct { uint8_t lsb; uint8_t msb; }; } data16; // well well, not legal ISO 9899 code + + data16.val = (arduino_hw_spi_3w_dc + data) << (7 - arduino_hw_spi_3w_bytepos); +#ifdef __BYTE_ORDER__ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + arduino_hw_spi_3w_buffer[arduino_hw_spi_3w_bytepos] |= data16.msb; + ++arduino_hw_spi_3w_bytepos; + arduino_hw_spi_3w_buffer[arduino_hw_spi_3w_bytepos] |= data16.lsb; +#else + arduino_hw_spi_3w_buffer[arduino_hw_spi_3w_bytepos] |= data16.lsb; + ++arduino_hw_spi_3w_bytepos; + arduino_hw_spi_3w_buffer[arduino_hw_spi_3w_bytepos] |= data16.msb; +#endif +#else // __BYTE_ORDER__ not defined (no gcc) + // assume little endian + arduino_hw_spi_3w_buffer[arduino_hw_spi_3w_bytepos] |= data16.msb; + ++arduino_hw_spi_3w_bytepos; + arduino_hw_spi_3w_buffer[arduino_hw_spi_3w_bytepos] |= data16.lsb; +#endif + + if (arduino_hw_spi_3w_bytepos == 8) + { + arduino_hw_spi_3w_flush(); + arduino_hw_spi_3w_init(); + } +} + +extern "C" uint8_t u8x8_byte_arduino_3wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ +#ifdef U8X8_HAVE_HW_SPI + + uint8_t *data; + uint8_t internal_spi_mode; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + data = (uint8_t *)arg_ptr; + while(arg_int > 0) { + arduino_hw_spi_3w_sendbyte((uint8_t)*data); + data++; + arg_int--; + } + break; + + case U8X8_MSG_BYTE_INIT: + if ( u8x8->bus_clock == 0 ) /* issue 769 */ + u8x8->bus_clock = u8x8->display_info->sck_clock_hz; + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + +#if defined(ESP_PLATFORM) || defined(ARDUINO_ARCH_ESP32) + /* ESP32 has the following begin: SPI.begin(int8_t sck=SCK, int8_t miso=MISO, int8_t mosi=MOSI, int8_t ss=-1); */ + /* not sure about ESP8266 */ + if ( u8x8->pins[U8X8_PIN_I2C_CLOCK] != U8X8_PIN_NONE && u8x8->pins[U8X8_PIN_I2C_DATA] != U8X8_PIN_NONE ) + { + /* SPI.begin(int8_t sck=SCK, int8_t miso=MISO, int8_t mosi=MOSI, int8_t ss=-1); */ + /* actually MISO is not used, but what else could be used here??? */ + SPI.begin(u8x8->pins[U8X8_PIN_I2C_CLOCK], MISO, u8x8->pins[U8X8_PIN_I2C_DATA]); + } + else + { + SPI.begin(); + } +#else + SPI.begin(); +#endif + break; + + case U8X8_MSG_BYTE_SET_DC: + arduino_hw_spi_3w_dc = arg_int ? 256 : 0; + break; + + case U8X8_MSG_BYTE_START_TRANSFER: + /* SPI mode has to be mapped to the mode of the current controller; + at least Uno, Due, 101 have different SPI_MODEx values */ + internal_spi_mode = 0; + switch(u8x8->display_info->spi_mode) { + case 0: internal_spi_mode = SPI_MODE0; break; + case 1: internal_spi_mode = SPI_MODE1; break; + case 2: internal_spi_mode = SPI_MODE2; break; + case 3: internal_spi_mode = SPI_MODE3; break; + } + +#if ARDUINO >= 10600 + SPI.beginTransaction( + SPISettings(u8x8->bus_clock, MSBFIRST, internal_spi_mode)); +#else + SPI.begin(); + if (u8x8->display_info->sck_pulse_width_ns < 70) + SPI.setClockDivider(SPI_CLOCK_DIV2); + else if (u8x8->display_info->sck_pulse_width_ns < 140) + SPI.setClockDivider(SPI_CLOCK_DIV4); + else + SPI.setClockDivider(SPI_CLOCK_DIV8); + SPI.setDataMode(internal_spi_mode); + SPI.setBitOrder(MSBFIRST); +#endif + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb( + u8x8, + U8X8_MSG_DELAY_NANO, + u8x8->display_info->post_chip_enable_wait_ns, + NULL); + arduino_hw_spi_3w_init(); + break; + + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb( + u8x8, + U8X8_MSG_DELAY_NANO, + u8x8->display_info->pre_chip_disable_wait_ns, + NULL); + if (arduino_hw_spi_3w_bytepos) + arduino_hw_spi_3w_flush(); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + +#if ARDUINO >= 10600 + SPI.endTransaction(); +#else + SPI.end(); +#endif + break; + + default: + return 0; + } + +#endif // U8X8_HAVE_HW_SPI + + + return 1; +} + + +/*=============================================*/ +/*=== 4 WIRE HARDWARE SPI ===*/ + +#ifdef U8X8_USE_PINS + +extern "C" uint8_t u8x8_byte_arduino_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ +#ifdef U8X8_HAVE_HW_SPI + uint8_t *data; + uint8_t internal_spi_mode; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + + // 1.6.5 offers a block transfer, but the problem is, that the + // buffer is overwritten with the incoming data + // so it can not be used... + // SPI.transfer((uint8_t *)arg_ptr, arg_int); + + data = (uint8_t *)arg_ptr; + while( arg_int > 0 ) + { + SPI.transfer((uint8_t)*data); + data++; + arg_int--; + } + + break; + case U8X8_MSG_BYTE_INIT: + if ( u8x8->bus_clock == 0 ) /* issue 769 */ + u8x8->bus_clock = u8x8->display_info->sck_clock_hz; + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + + /* no wait required here */ + + /* for SPI: setup correct level of the clock signal */ + // removed, use SPI.begin() instead: pinMode(11, OUTPUT); + // removed, use SPI.begin() instead: pinMode(13, OUTPUT); + // removed, use SPI.begin() instead: digitalWrite(13, u8x8_GetSPIClockPhase(u8x8)); + + /* setup hardware with SPI.begin() instead of previous digitalWrite() and pinMode() calls */ + + + /* issue #377 */ + /* issue #378: removed ESP8266 support, which is implemented differently */ +#if defined(ESP_PLATFORM) || defined(ARDUINO_ARCH_ESP32) + /* ESP32 has the following begin: SPI.begin(int8_t sck=SCK, int8_t miso=MISO, int8_t mosi=MOSI, int8_t ss=-1); */ + /* not sure about ESP8266 */ + if ( u8x8->pins[U8X8_PIN_I2C_CLOCK] != U8X8_PIN_NONE && u8x8->pins[U8X8_PIN_I2C_DATA] != U8X8_PIN_NONE ) + { + /* SPI.begin(int8_t sck=SCK, int8_t miso=MISO, int8_t mosi=MOSI, int8_t ss=-1); */ + /* actually MISO is not used, but what else could be used here??? */ + SPI.begin(u8x8->pins[U8X8_PIN_I2C_CLOCK], MISO, u8x8->pins[U8X8_PIN_I2C_DATA]); + } + else + { + SPI.begin(); + } +#else + SPI.begin(); +#endif + + + + break; + + case U8X8_MSG_BYTE_SET_DC: + u8x8_gpio_SetDC(u8x8, arg_int); + break; + + case U8X8_MSG_BYTE_START_TRANSFER: + /* SPI mode has to be mapped to the mode of the current controller, at least Uno, Due, 101 have different SPI_MODEx values */ + internal_spi_mode = 0; + switch(u8x8->display_info->spi_mode) + { + case 0: internal_spi_mode = SPI_MODE0; break; + case 1: internal_spi_mode = SPI_MODE1; break; + case 2: internal_spi_mode = SPI_MODE2; break; + case 3: internal_spi_mode = SPI_MODE3; break; + } + +#if ARDUINO >= 10600 + SPI.beginTransaction(SPISettings(u8x8->bus_clock, MSBFIRST, internal_spi_mode)); +#else + SPI.begin(); + + if ( u8x8->display_info->sck_pulse_width_ns < 70 ) + SPI.setClockDivider( SPI_CLOCK_DIV2 ); + else if ( u8x8->display_info->sck_pulse_width_ns < 140 ) + SPI.setClockDivider( SPI_CLOCK_DIV4 ); + else + SPI.setClockDivider( SPI_CLOCK_DIV8 ); + SPI.setDataMode(internal_spi_mode); + SPI.setBitOrder(MSBFIRST); +#endif + + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + break; + + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + +#if ARDUINO >= 10600 + SPI.endTransaction(); +#else + SPI.end(); +#endif + + break; + default: + return 0; + } + +#else /* U8X8_HAVE_HW_SPI */ + +#endif /* U8X8_HAVE_HW_SPI */ + return 1; +} + + +/* issue #244 */ +extern "C" uint8_t u8x8_byte_arduino_2nd_hw_spi(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ +#ifdef U8X8_HAVE_2ND_HW_SPI + uint8_t *data; + uint8_t internal_spi_mode; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + + // 1.6.5 offers a block transfer, but the problem is, that the + // buffer is overwritten with the incoming data + // so it can not be used... + // SPI.transfer((uint8_t *)arg_ptr, arg_int); + + data = (uint8_t *)arg_ptr; + while( arg_int > 0 ) + { + SPI1.transfer((uint8_t)*data); + data++; + arg_int--; + } + + break; + case U8X8_MSG_BYTE_INIT: + if ( u8x8->bus_clock == 0 ) /* issue 769 */ + u8x8->bus_clock = u8x8->display_info->sck_clock_hz; + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* no wait required here */ + + /* for SPI1: setup correct level of the clock signal */ + // removed, use SPI.begin() instead: pinMode(11, OUTPUT); + // removed, use SPI.begin() instead: pinMode(13, OUTPUT); + // removed, use SPI.begin() instead: digitalWrite(13, u8x8_GetSPIClockPhase(u8x8)); + + /* setup hardware with SPI.begin() instead of previous digitalWrite() and pinMode() calls */ + SPI1.begin(); + + break; + + case U8X8_MSG_BYTE_SET_DC: + u8x8_gpio_SetDC(u8x8, arg_int); + break; + + case U8X8_MSG_BYTE_START_TRANSFER: + /* SPI1 mode has to be mapped to the mode of the current controller, at least Uno, Due, 101 have different SPI_MODEx values */ + internal_spi_mode = 0; + switch(u8x8->display_info->spi_mode) + { + case 0: internal_spi_mode = SPI_MODE0; break; + case 1: internal_spi_mode = SPI_MODE1; break; + case 2: internal_spi_mode = SPI_MODE2; break; + case 3: internal_spi_mode = SPI_MODE3; break; + } + +#if ARDUINO >= 10600 + SPI1.beginTransaction(SPISettings(u8x8->bus_clock, MSBFIRST, internal_spi_mode)); +#else + SPI1.begin(); + + if ( u8x8->display_info->sck_pulse_width_ns < 70 ) + SPI1.setClockDivider( SPI_CLOCK_DIV2 ); + else if ( u8x8->display_info->sck_pulse_width_ns < 140 ) + SPI1.setClockDivider( SPI_CLOCK_DIV4 ); + else + SPI1.setClockDivider( SPI_CLOCK_DIV8 ); + SPI1.setDataMode(internal_spi_mode); + SPI1.setBitOrder(MSBFIRST); +#endif + + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + break; + + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + +#if ARDUINO >= 10600 + SPI1.endTransaction(); +#else + SPI1.end(); +#endif + + break; + default: + return 0; + } + +#else +#endif + return 1; +} + +/*=============================================*/ +/* fast SW I2C for AVR uC */ + + +#if !defined(U8X8_USE_PINS) + /* no pin information (very strange), so fallback */ +extern "C" uint8_t u8x8_byte_arduino_sw_i2c(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ + return u8x8_byte_sw_i2c(u8x8, msg,arg_int, arg_ptr); +} + +#elif !defined(U8X8_USE_ARDUINO_AVR_SW_I2C_OPTIMIZATION) + +extern "C" uint8_t u8x8_byte_arduino_sw_i2c(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ + return u8x8_byte_sw_i2c(u8x8, msg,arg_int, arg_ptr); +} + +#elif __AVR_ARCH__ == 4 || __AVR_ARCH__ == 5 || __AVR_ARCH__ == 51 || __AVR_ARCH__ == 6 || __AVR_ARCH__ == 103 + + +/* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */ +/* so, it should be possible to use multiple displays with different pins */ + +static volatile uint8_t *arduino_i2c_clock_port; + +static uint8_t arduino_i2c_clock_mask; +static uint8_t arduino_i2c_clock_n_mask; + +static volatile uint8_t *arduino_i2c_data_port; +static uint8_t arduino_i2c_data_mask; +static uint8_t arduino_i2c_data_n_mask; + +/* + software i2c, + ignores ACK response (which is anyway not provided by some displays) + also does not allow reading from the device +*/ +static void i2c_delay(u8x8_t *u8x8) U8X8_NOINLINE; +static void i2c_delay(u8x8_t *u8x8) +{ + //u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_10MICRO, u8x8->display_info->i2c_bus_clock_100kHz); + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_I2C, u8x8->display_info->i2c_bus_clock_100kHz); +} + +static void i2c_init(u8x8_t *u8x8) +{ + *arduino_i2c_clock_port |= arduino_i2c_clock_mask; + *arduino_i2c_data_port |= arduino_i2c_data_mask; + i2c_delay(u8x8); +} + +/* actually, the scl line is not observed, so this procedure does not return a value */ + +static void i2c_read_scl_and_delay(u8x8_t *u8x8) +{ + /* set as input (line will be high) */ + *arduino_i2c_clock_port |= arduino_i2c_clock_mask; + + i2c_delay(u8x8); +} + +static void i2c_clear_scl(u8x8_t *u8x8) +{ + *arduino_i2c_clock_port &= arduino_i2c_clock_n_mask; +} + +static void i2c_read_sda(u8x8_t *u8x8) +{ + /* set as input (line will be high) */ + *arduino_i2c_data_port |= arduino_i2c_data_mask; +} + +static void i2c_clear_sda(u8x8_t *u8x8) +{ + /* set open collector and drive low */ + *arduino_i2c_data_port &= arduino_i2c_data_n_mask; +} + +static void i2c_start(u8x8_t *u8x8) +{ + if ( u8x8->i2c_started != 0 ) + { + /* if already started: do restart */ + i2c_read_sda(u8x8); /* SDA = 1 */ + i2c_delay(u8x8); + i2c_read_scl_and_delay(u8x8); + } + i2c_read_sda(u8x8); + /* send the start condition, both lines go from 1 to 0 */ + i2c_clear_sda(u8x8); + i2c_delay(u8x8); + i2c_clear_scl(u8x8); + u8x8->i2c_started = 1; +} + + +static void i2c_stop(u8x8_t *u8x8) +{ + /* set SDA to 0 */ + i2c_clear_sda(u8x8); + i2c_delay(u8x8); + + /* now release all lines */ + i2c_read_scl_and_delay(u8x8); + + /* set SDA to 1 */ + i2c_read_sda(u8x8); + i2c_delay(u8x8); + u8x8->i2c_started = 0; +} + +static void i2c_write_bit(u8x8_t *u8x8, uint8_t val) +{ + if (val) + i2c_read_sda(u8x8); + else + i2c_clear_sda(u8x8); + + i2c_delay(u8x8); + i2c_read_scl_and_delay(u8x8); + i2c_clear_scl(u8x8); +} + +static void i2c_read_bit(u8x8_t *u8x8) +{ + //uint8_t val; + /* do not drive SDA */ + i2c_read_sda(u8x8); + i2c_delay(u8x8); + i2c_read_scl_and_delay(u8x8); + i2c_read_sda(u8x8); + i2c_delay(u8x8); + i2c_clear_scl(u8x8); + //return val; +} + +static void i2c_write_byte(u8x8_t *u8x8, uint8_t b) +{ + i2c_write_bit(u8x8, b & 128); + i2c_write_bit(u8x8, b & 64); + i2c_write_bit(u8x8, b & 32); + i2c_write_bit(u8x8, b & 16); + i2c_write_bit(u8x8, b & 8); + i2c_write_bit(u8x8, b & 4); + i2c_write_bit(u8x8, b & 2); + i2c_write_bit(u8x8, b & 1); + + /* read ack from client */ + /* 0: ack was given by client */ + /* 1: nothing happend during ack cycle */ + i2c_read_bit(u8x8); +} + + +extern "C" uint8_t u8x8_byte_arduino_sw_i2c(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ + uint8_t *data; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + data = (uint8_t *)arg_ptr; + + while( arg_int > 0 ) + { + i2c_write_byte(u8x8, *data); + data++; + arg_int--; + } + + break; + + case U8X8_MSG_BYTE_INIT: + pinMode(u8x8->pins[U8X8_PIN_I2C_CLOCK], OUTPUT); + digitalWrite(u8x8->pins[U8X8_PIN_I2C_CLOCK], 1); + + pinMode(u8x8->pins[U8X8_PIN_I2C_DATA], OUTPUT); + digitalWrite(u8x8->pins[U8X8_PIN_I2C_DATA], 1); + + i2c_init(u8x8); + break; + case U8X8_MSG_BYTE_SET_DC: + break; + case U8X8_MSG_BYTE_START_TRANSFER: + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_I2C_CLOCK] */ + + arduino_i2c_clock_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_I2C_CLOCK])); + arduino_i2c_clock_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_I2C_CLOCK]); + arduino_i2c_clock_n_mask = ~arduino_i2c_clock_mask; + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_I2C_DATA] */ + + arduino_i2c_data_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_I2C_DATA])); + arduino_i2c_data_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_I2C_DATA]); + arduino_i2c_data_n_mask = ~arduino_i2c_data_mask; + + i2c_start(u8x8); + i2c_write_byte(u8x8, u8x8_GetI2CAddress(u8x8)); + + break; + case U8X8_MSG_BYTE_END_TRANSFER: + i2c_stop(u8x8); + break; + default: + return 0; + } + return 1; + +} + +#else + +/* not AVR architecture, fallback */ +extern "C" uint8_t u8x8_byte_arduino_sw_i2c(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ + return u8x8_byte_sw_i2c(u8x8, msg,arg_int, arg_ptr); +} + +#endif + +/*=============================================*/ +/*=== HARDWARE I2C ===*/ + +extern "C" uint8_t u8x8_byte_arduino_hw_i2c(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ +#ifdef U8X8_HAVE_HW_I2C + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + Wire.write((uint8_t *)arg_ptr, (int)arg_int); + break; + case U8X8_MSG_BYTE_INIT: + if ( u8x8->bus_clock == 0 ) /* issue 769 */ + u8x8->bus_clock = u8x8->display_info->i2c_bus_clock_100kHz * 100000UL; +#if defined(ESP8266) || defined(ARDUINO_ARCH_ESP8266) || defined(ESP_PLATFORM) || defined(ARDUINO_ARCH_ESP32) + /* for ESP8266/ESP32, Wire.begin has two more arguments: clock and data */ + if ( u8x8->pins[U8X8_PIN_I2C_CLOCK] != U8X8_PIN_NONE && u8x8->pins[U8X8_PIN_I2C_DATA] != U8X8_PIN_NONE ) + { + // second argument for the wire lib is the clock pin. In u8g2, the first argument of the clock pin in the clock/data pair + Wire.begin(u8x8->pins[U8X8_PIN_I2C_DATA] , u8x8->pins[U8X8_PIN_I2C_CLOCK]); + } + else + { + Wire.begin(); + } +#else + Wire.begin(); +#endif + break; + case U8X8_MSG_BYTE_SET_DC: + break; + case U8X8_MSG_BYTE_START_TRANSFER: +#if ARDUINO >= 10600 + /* not sure when the setClock function was introduced, but it is there since 1.6.0 */ + /* if there is any error with Wire.setClock() just remove this function call */ + Wire.setClock(u8x8->bus_clock); +#endif + Wire.beginTransmission(u8x8_GetI2CAddress(u8x8)>>1); + break; + case U8X8_MSG_BYTE_END_TRANSFER: + Wire.endTransmission(); + break; + default: + return 0; + } +#endif + return 1; +} + +extern "C" uint8_t u8x8_byte_arduino_2nd_hw_i2c(U8X8_UNUSED u8x8_t *u8x8, U8X8_UNUSED uint8_t msg, U8X8_UNUSED uint8_t arg_int, U8X8_UNUSED void *arg_ptr) +{ +#ifdef U8X8_HAVE_2ND_HW_I2C + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + Wire1.write((uint8_t *)arg_ptr, (int)arg_int); + break; + case U8X8_MSG_BYTE_INIT: + if ( u8x8->bus_clock == 0 ) /* issue 769 */ + u8x8->bus_clock = u8x8->display_info->i2c_bus_clock_100kHz * 100000UL; + Wire1.begin(); + break; + case U8X8_MSG_BYTE_SET_DC: + break; + case U8X8_MSG_BYTE_START_TRANSFER: +#if ARDUINO >= 10600 + /* not sure when the setClock function was introduced, but it is there since 1.6.0 */ + /* if there is any error with Wire.setClock() just remove this function call */ + Wire1.setClock(u8x8->bus_clock); +#endif + Wire1.beginTransmission(u8x8_GetI2CAddress(u8x8)>>1); + break; + case U8X8_MSG_BYTE_END_TRANSFER: + Wire1.endTransmission(); + break; + default: + return 0; + } +#endif + return 1; +} + +#endif // U8X8_USE_PINS + +/*=============================================*/ + +/* + replacement for a more faster u8x8_byte_8bit_8080mode + in general u8x8_byte_8bit_8080mode could be a fallback: + + uint8_t u8x8_byte_arduino_8bit_8080mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_8bit_8080mode(u8x8, msg,arg_int, arg_ptr); + } + + + +*/ + +#ifndef __AVR_ARCH__ +#define __AVR_ARCH__ 0 +#endif + +#if !defined(U8X8_USE_PINS) + /* no pin information (very strange), so fallback */ +extern "C" uint8_t u8x8_byte_arduino_8bit_8080mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + return u8x8_byte_8bit_8080mode(u8x8, msg,arg_int, arg_ptr); +} + +#elif __AVR_ARCH__ == 4 || __AVR_ARCH__ == 5 || __AVR_ARCH__ == 51 || __AVR_ARCH__ == 6 || __AVR_ARCH__ == 103 + +/* this function completly replaces u8x8_byte_8bit_8080mode*/ +extern "C" uint8_t u8x8_byte_arduino_8bit_8080mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t i, b; + uint8_t *data; + + /* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */ + /* so, it should be possible to use multiple displays with different pins */ + + static volatile uint8_t *arduino_e_port; + static volatile uint8_t arduino_e_mask; + static volatile uint8_t arduino_e_n_mask; + + static volatile uint8_t *arduino_data_port[8]; + static volatile uint8_t arduino_data_mask[8]; + static volatile uint8_t arduino_data_n_mask[8]; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + data = (uint8_t *)arg_ptr; + while( arg_int > 0 ) + { + b = *data; + data++; + arg_int--; + for( i = 0; i < 8; i++ ) + { + if ( b & 1 ) + *arduino_data_port[i] |= arduino_data_mask[i]; + else + *arduino_data_port[i] &= arduino_data_n_mask[i]; + b >>= 1; + + } + + *arduino_e_port &= arduino_e_n_mask; + + + /* AVR Architecture is very slow, extra call is not required */ + //u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sda_setup_time_ns); + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); + + *arduino_e_port |= arduino_e_mask; + + /* AVR Architecture is very slow, extra call is not required */ + //u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->sck_pulse_width_ns); + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); + + } + break; + + case U8X8_MSG_BYTE_INIT: + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* no wait required here */ + + /* ensure that the enable signal is high */ + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 1); + break; + case U8X8_MSG_BYTE_SET_DC: + u8x8_gpio_SetDC(u8x8, arg_int); + break; + case U8X8_MSG_BYTE_START_TRANSFER: + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_E] */ + + arduino_e_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_E])); + arduino_e_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_E]); + arduino_e_n_mask = ~arduino_e_mask; + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_D0] */ + + for( i = 0; i < 8; i++ ) + { + arduino_data_port[i] = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_D0+i])); + arduino_data_mask[i] = digitalPinToBitMask(u8x8->pins[U8X8_PIN_D0+i]); + arduino_data_n_mask[i] = ~arduino_data_mask[i]; + } + + break; + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + break; + default: + return 0; + } + return 1; +} + +#else + /* fallback */ +extern "C" uint8_t u8x8_byte_arduino_8bit_8080mode(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + return u8x8_byte_8bit_8080mode(u8x8, msg,arg_int, arg_ptr); +} + +#endif + + +/*=============================================*/ + +/* + replacement for a more faster u8x8_byte_ks0108 + in general u8x8_byte_ks0108 could be a fallback: + + uint8_t u8x8_byte_arduino_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) + { + return u8x8_byte_ks0108(u8x8, msg,arg_int, arg_ptr); + } + + + +*/ + +#ifndef __AVR_ARCH__ +#define __AVR_ARCH__ 0 +#endif + +#if !defined(U8X8_USE_PINS) + /* no pin information (very strange), so fallback */ +extern "C" uint8_t u8x8_byte_arduino_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + return u8x8_byte_ks0108(u8x8, msg,arg_int, arg_ptr); +} + +#elif __AVR_ARCH__ == 4 || __AVR_ARCH__ == 5 || __AVR_ARCH__ == 51 || __AVR_ARCH__ == 6 || __AVR_ARCH__ == 103 + +/* this function completly replaces u8x8_byte_ks0108*/ +extern "C" uint8_t u8x8_byte_arduino_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t i, b; + uint8_t *data; + + /* the following static vars are recalculated in U8X8_MSG_BYTE_START_TRANSFER */ + /* so, it should be possible to use multiple displays with different pins */ + + static volatile uint8_t *arduino_e_port; + static volatile uint8_t arduino_e_mask; + static volatile uint8_t arduino_e_n_mask; + + static volatile uint8_t *arduino_data_port[8]; + static volatile uint8_t arduino_data_mask[8]; + static volatile uint8_t arduino_data_n_mask[8]; + + switch(msg) + { + case U8X8_MSG_BYTE_SEND: + data = (uint8_t *)arg_ptr; + while( arg_int > 0 ) + { + b = *data; + data++; + arg_int--; + for( i = 0; i < 8; i++ ) + { + if ( b & 1 ) + *arduino_data_port[i] |= arduino_data_mask[i]; + else + *arduino_data_port[i] &= arduino_data_n_mask[i]; + b >>= 1; + + } + + *arduino_e_port |= arduino_e_mask; + + + /* AVR Architecture is very slow, extra call is not required */ + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->data_setup_time_ns); + + *arduino_e_port &= arduino_e_n_mask; + + /* AVR Architecture is very slow, extra call is not required */ + u8x8_gpio_Delay(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->write_pulse_width_ns); + + } + break; + + case U8X8_MSG_BYTE_INIT: + /* disable chipselect */ + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level); + /* no wait required here */ + + /* ensure that the enable signal is low */ + u8x8_gpio_call(u8x8, U8X8_MSG_GPIO_E, 0); + break; + case U8X8_MSG_BYTE_SET_DC: + u8x8_gpio_SetDC(u8x8, arg_int); + break; + case U8X8_MSG_BYTE_START_TRANSFER: + u8x8_byte_set_ks0108_cs(u8x8, arg_int); + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_E] */ + + arduino_e_port = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_E])); + arduino_e_mask = digitalPinToBitMask(u8x8->pins[U8X8_PIN_E]); + arduino_e_n_mask = ~arduino_e_mask; + + /* there is no consistency checking for u8x8->pins[U8X8_PIN_D0] */ + + for( i = 0; i < 8; i++ ) + { + arduino_data_port[i] = portOutputRegister(digitalPinToPort(u8x8->pins[U8X8_PIN_D0+i])); + arduino_data_mask[i] = digitalPinToBitMask(u8x8->pins[U8X8_PIN_D0+i]); + arduino_data_n_mask[i] = ~arduino_data_mask[i]; + } + + break; + case U8X8_MSG_BYTE_END_TRANSFER: + u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL); + u8x8_byte_set_ks0108_cs(u8x8, arg_int); + break; + default: + return 0; + } + return 1; +} + +#else + /* fallback */ +extern "C" uint8_t u8x8_byte_arduino_ks0108(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + return u8x8_byte_ks0108(u8x8, msg,arg_int, arg_ptr); +} + +#endif + +#endif + + + + + + +#ifdef U8X8_USE_PINS + +/* + use U8X8_PIN_NONE as value for "reset", if there is no reset line +*/ + +void u8x8_SetPin_4Wire_SW_SPI(u8x8_t *u8x8, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_SPI_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_SPI_DATA, data); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +#ifdef _obsolete_com_specific_setup +void u8x8_Setup_4Wire_SW_SPI(u8x8_t *u8x8, u8x8_msg_cb display_cb, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_Setup(u8x8, display_cb, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + + /* assign individual pin values (only for ARDUINO, if pin_list is available) */ + u8x8_SetPin(u8x8, U8X8_PIN_SPI_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_SPI_DATA, data); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif /* obsolete com specific setup */ + +void u8x8_SetPin_3Wire_SW_SPI(u8x8_t *u8x8, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_SPI_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_SPI_DATA, data); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +#ifdef _obsolete_com_specific_setup +void u8x8_Setup_3Wire_SW_SPI(u8x8_t *u8x8, u8x8_msg_cb display_cb, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset) +{ + u8x8_Setup(u8x8, display_cb, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_arduino); + + /* assign individual pin values (only for ARDUINO, if pin_list is available) */ + u8x8_SetPin(u8x8, U8X8_PIN_SPI_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_SPI_DATA, data); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif /* obsolete com specific setup */ + +/* + use U8X8_PIN_NONE as value for "reset", if there is no reset line +*/ +void u8x8_SetPin_3Wire_HW_SPI(u8x8_t *u8x8, uint8_t cs, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +/* + use U8X8_PIN_NONE as value for "reset", if there is no reset line +*/ +void u8x8_SetPin_4Wire_HW_SPI(u8x8_t *u8x8, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +void u8x8_SetPin_ST7920_HW_SPI(u8x8_t *u8x8, uint8_t cs, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + + +#ifdef _obsolete_com_specific_setup +void u8x8_Setup_4Wire_HW_SPI(u8x8_t *u8x8, u8x8_msg_cb display_cb, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_Setup(u8x8, display_cb, u8x8_cad_001, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + + /* assign individual pin values (only for ARDUINO, if pin_list is available) */ + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif /* obsolete com specific setup */ + + +void u8x8_SetPin_SW_I2C(u8x8_t *u8x8, uint8_t clock, uint8_t data, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_I2C_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_I2C_DATA, data); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +#ifdef _obsolete_com_specific_setup +void u8x8_Setup_SSD13xx_SW_I2C(u8x8_t *u8x8, u8x8_msg_cb display_cb, uint8_t clock, uint8_t data, uint8_t reset) +{ + u8x8_Setup(u8x8, display_cb, u8x8_cad_001, u8x8_byte_ssd13xx_sw_i2c, u8x8_gpio_and_delay_arduino); + + /* assign individual pin values (only for ARDUINO, if pin_list is available) */ + u8x8_SetPin(u8x8, U8X8_PIN_I2C_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_I2C_DATA, data); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif /* obsolete com specific setup */ + +void u8x8_SetPin_HW_I2C(u8x8_t *u8x8, uint8_t reset, uint8_t clock, uint8_t data) +{ + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); + u8x8_SetPin(u8x8, U8X8_PIN_I2C_CLOCK, clock); + u8x8_SetPin(u8x8, U8X8_PIN_I2C_DATA, data); +} + +void u8x8_SetPin_8Bit_6800(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, enable); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +#ifdef _obsolete_com_specific_setup +void u8x8_Setup_8Bit_6800(u8x8_t *u8x8, u8x8_msg_cb display_cb, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_Setup(u8x8, display_cb, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + + /* assign individual pin values (only for ARDUINO, if pin_list is available) */ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, enable); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif /* obsolete com specific setup */ + + +void u8x8_SetPin_8Bit_8080(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t wr, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, wr); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + + +#ifdef _obsolete_com_specific_setup +void u8x8_Setup_8Bit_8080(u8x8_t *u8x8, u8x8_msg_cb display_cb, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t wr, uint8_t cs, uint8_t dc, uint8_t reset) +{ + u8x8_Setup(u8x8, display_cb, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_arduino); + + /* assign individual pin values (only for ARDUINO, if pin_list is available) */ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, wr); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif /* obsolete com specific setup */ + +void u8x8_SetPin_KS0108(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, enable); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_CS, cs0); + u8x8_SetPin(u8x8, U8X8_PIN_CS1, cs1); + u8x8_SetPin(u8x8, U8X8_PIN_CS2, cs2); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} + +void u8x8_SetPin_SED1520(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) +{ + u8x8_SetPin(u8x8, U8X8_PIN_D0, d0); + u8x8_SetPin(u8x8, U8X8_PIN_D1, d1); + u8x8_SetPin(u8x8, U8X8_PIN_D2, d2); + u8x8_SetPin(u8x8, U8X8_PIN_D3, d3); + u8x8_SetPin(u8x8, U8X8_PIN_D4, d4); + u8x8_SetPin(u8x8, U8X8_PIN_D5, d5); + u8x8_SetPin(u8x8, U8X8_PIN_D6, d6); + u8x8_SetPin(u8x8, U8X8_PIN_D7, d7); + u8x8_SetPin(u8x8, U8X8_PIN_E, e1); + u8x8_SetPin(u8x8, U8X8_PIN_CS, e2); + u8x8_SetPin(u8x8, U8X8_PIN_DC, dc); + u8x8_SetPin(u8x8, U8X8_PIN_RESET, reset); +} +#endif // U8X8_USE_PINS diff --git a/sys/rt-thread/port/U8x8lib.h b/sys/rt-thread/port/U8x8lib.h new file mode 100644 index 00000000..a4d3ee10 --- /dev/null +++ b/sys/rt-thread/port/U8x8lib.h @@ -0,0 +1,5185 @@ +#ifndef U8X8LIB_HH +#define U8X8LIB_HH + +#include +#include +#include +#include + +#include "u8g2_port.h" + +extern "C" uint8_t u8x8_byte_rtthread_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +extern "C" uint8_t u8x8_byte_rtthread_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +extern "C" uint8_t u8x8_gpio_and_delay_rtthread(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); + +#ifdef U8X8_USE_PINS +void u8x8_SetPin_4Wire_SW_SPI(u8x8_t *u8x8, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset); +void u8x8_SetPin_3Wire_SW_SPI(u8x8_t *u8x8, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset); +void u8x8_SetPin_4Wire_HW_SPI(u8x8_t *u8x8, uint8_t cs, uint8_t dc, uint8_t reset); +void u8x8_SetPin_ST7920_HW_SPI(u8x8_t *u8x8, uint8_t cs, uint8_t reset); +void u8x8_SetPin_SW_I2C(u8x8_t *u8x8, uint8_t clock, uint8_t data, uint8_t reset); +void u8x8_SetPin_HW_I2C(u8x8_t *u8x8, uint8_t reset, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE); +void u8x8_SetPin_8Bit_6800(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset); +void u8x8_SetPin_8Bit_8080(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t wr, uint8_t cs, uint8_t dc, uint8_t reset); +void u8x8_SetPin_KS0108(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset); +void u8x8_SetPin_SED1520(u8x8_t *u8x8, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset); +#endif + +class U8X8 +{ + protected: + u8x8_t u8x8; + public: + uint8_t tx, ty; + + U8X8(void) { home(); } + u8x8_t *getU8x8(void) { return &u8x8; } + + uint32_t getBusClock(void) { return u8x8.bus_clock; } + void setBusClock(uint32_t clock_speed) { u8x8.bus_clock = clock_speed; } + + void setI2CAddress(uint8_t adr) { u8x8_SetI2CAddress(&u8x8, adr); } + + uint8_t getCols(void) { return u8x8_GetCols(&u8x8); } + uint8_t getRows(void) { return u8x8_GetRows(&u8x8); } + + void drawTile(uint8_t x, uint8_t y, uint8_t cnt, uint8_t *tile_ptr) { + u8x8_DrawTile(&u8x8, x, y, cnt, tile_ptr); } + +#ifdef U8X8_WITH_USER_PTR + void *getUserPtr() { return u8x8_GetUserPtr(&u8x8); } + void setUserPtr(void *p) { u8x8_SetUserPtr(&u8x8, p); } +#endif + + +#ifdef U8X8_USE_PINS + /* set the menu pins before calling begin() or initDisplay() */ + void setMenuSelectPin(uint8_t val) { + u8x8_SetMenuSelectPin(&u8x8, val); } + void setMenuPrevPin(uint8_t val) { + u8x8_SetMenuPrevPin(&u8x8, val); } + void setMenuNextPin(uint8_t val) { + u8x8_SetMenuNextPin(&u8x8, val); } + void setMenuUpPin(uint8_t val) { + u8x8_SetMenuUpPin(&u8x8, val); } + void setMenuDownPin(uint8_t val) { + u8x8_SetMenuDownPin(&u8x8, val); } + void setMenuHomePin(uint8_t val) { + u8x8_SetMenuHomePin(&u8x8, val); } +#endif + + void initDisplay(void) { + u8x8_InitDisplay(&u8x8); } + + void clearDisplay(void) { + u8x8_ClearDisplay(&u8x8); } + + void fillDisplay(void) { + u8x8_FillDisplay(&u8x8); } + + void setPowerSave(uint8_t is_enable) { + u8x8_SetPowerSave(&u8x8, is_enable); } + + bool begin(void) { + initDisplay(); clearDisplay(); setPowerSave(0); return 1; } + +#ifdef U8X8_USE_PINS + /* use U8X8_PIN_NONE if a pin is not required */ + bool begin(uint8_t menu_select_pin, uint8_t menu_next_pin, uint8_t menu_prev_pin, uint8_t menu_up_pin = U8X8_PIN_NONE, uint8_t menu_down_pin = U8X8_PIN_NONE, uint8_t menu_home_pin = U8X8_PIN_NONE) { + setMenuSelectPin(menu_select_pin); + setMenuNextPin(menu_next_pin); + setMenuPrevPin(menu_prev_pin); + setMenuUpPin(menu_up_pin); + setMenuDownPin(menu_down_pin); + setMenuHomePin(menu_home_pin); + return begin(); } +#endif + + void setFlipMode(uint8_t mode) { + u8x8_SetFlipMode(&u8x8, mode); } + + void refreshDisplay(void) { // Dec 16: Only required for SSD1606 + u8x8_RefreshDisplay(&u8x8); } + + void clearLine(uint8_t line) { + u8x8_ClearLine(&u8x8, line); } + + void setContrast(uint8_t value) { + u8x8_SetContrast(&u8x8, value); } + + void setInverseFont(uint8_t value) { + u8x8_SetInverseFont(&u8x8, value); } + + void setFont(const uint8_t *font_8x8) { + u8x8_SetFont(&u8x8, font_8x8); } + + void drawGlyph(uint8_t x, uint8_t y, uint8_t encoding) { + u8x8_DrawGlyph(&u8x8, x, y, encoding); } + + void draw2x2Glyph(uint8_t x, uint8_t y, uint8_t encoding) { + u8x8_Draw2x2Glyph(&u8x8, x, y, encoding); } + + void draw1x2Glyph(uint8_t x, uint8_t y, uint8_t encoding) { + u8x8_Draw1x2Glyph(&u8x8, x, y, encoding); } + + void drawString(uint8_t x, uint8_t y, const char *s) { + u8x8_DrawString(&u8x8, x, y, s); } + + void drawUTF8(uint8_t x, uint8_t y, const char *s) { + u8x8_DrawUTF8(&u8x8, x, y, s); } + + void draw2x2String(uint8_t x, uint8_t y, const char *s) { + u8x8_Draw2x2String(&u8x8, x, y, s); } + + void draw1x2String(uint8_t x, uint8_t y, const char *s) { + u8x8_Draw1x2String(&u8x8, x, y, s); } + + void draw2x2UTF8(uint8_t x, uint8_t y, const char *s) { + u8x8_Draw2x2UTF8(&u8x8, x, y, s); } + + void draw1x2UTF8(uint8_t x, uint8_t y, const char *s) { + u8x8_Draw1x2UTF8(&u8x8, x, y, s); } + + uint8_t getUTF8Len(const char *s) { + return u8x8_GetUTF8Len(&u8x8, s); } + + virtual size_t write(uint8_t v); + /* code extended and moved to .cpp file, issue 74 + size_t write(uint8_t v) { + u8x8_DrawGlyph(&u8x8, tx, ty, v); + tx++; + return 1; + } + */ + + virtual size_t write(const uint8_t *buffer, size_t size) { + size_t cnt = 0; + while( size > 0 ) { + cnt += write(*buffer++); + size--; + } + return cnt; + } + + void inverse(void) { setInverseFont(1); } + void noInverse(void) { setInverseFont(0); } + + /* return 0 for no event or U8X8_MSG_GPIO_MENU_SELECT, */ + /* U8X8_MSG_GPIO_MENU_NEXT, U8X8_MSG_GPIO_MENU_PREV, */ + /* U8X8_MSG_GPIO_MENU_HOME */ + uint8_t getMenuEvent(void) { return u8x8_GetMenuEvent(&u8x8); } + + uint8_t userInterfaceSelectionList(const char *title, uint8_t start_pos, const char *sl) { + return u8x8_UserInterfaceSelectionList(&u8x8, title, start_pos, sl); } + uint8_t userInterfaceMessage(const char *title1, const char *title2, const char *title3, const char *buttons) { + return u8x8_UserInterfaceMessage(&u8x8, title1, title2, title3, buttons); } + uint8_t userInterfaceInputValue(const char *title, const char *pre, uint8_t *value, uint8_t lo, uint8_t hi, uint8_t digits, const char *post) { + return u8x8_UserInterfaceInputValue(&u8x8, title, pre, value, lo, hi, digits, post); } + + /* LiquidCrystal compatible functions */ + void home(void) { tx = 0; ty = 0; } + void clear(void) { clearDisplay(); home(); } + void noDisplay(void) { u8x8_SetPowerSave(&u8x8, 1); } + void display(void) { u8x8_SetPowerSave(&u8x8, 0); } + void setCursor(uint8_t x, uint8_t y) { tx = x; ty = y; } + + void drawLog(uint8_t x, uint8_t y, class U8X8LOG &u8x8log); + +}; + +class U8X8LOG +{ + + public: + u8log_t u8log; + + /* the constructor does nothing, use begin() instead */ + U8X8LOG(void) { } + + /* connect to u8g2, draw to u8g2 whenever required */ + bool begin(class U8X8 &u8x8, uint8_t width, uint8_t height, uint8_t *buf) { + u8log_Init(&u8log, width, height, buf); + u8log_SetCallback(&u8log, u8log_u8x8_cb, u8x8.getU8x8()); + return true; + } + + /* disconnected version, manual redraw required */ + bool begin(uint8_t width, uint8_t height, uint8_t *buf) { + u8log_Init(&u8log, width, height, buf); + return true; + } + + void setLineHeightOffset(int8_t line_height_offset) { + u8log_SetLineHeightOffset(&u8log, line_height_offset); } + + void setRedrawMode(uint8_t is_redraw_line_for_each_char) { + u8log_SetRedrawMode(&u8log, is_redraw_line_for_each_char); } + + /* virtual function for print base class */ + virtual size_t write(uint8_t v) { + u8log_WriteChar(&u8log, v); + return 1; + } + + virtual size_t write(const uint8_t *buffer, size_t size) { + size_t cnt = 0; + while( size > 0 ) { + cnt += write(*buffer++); + size--; + } + return cnt; + } + + void writeString(const char *s) { u8log_WriteString(&u8log, s); } + void writeChar(uint8_t c) { u8log_WriteChar(&u8log, c); } + void writeHex8(uint8_t b) { u8log_WriteHex8(&u8log, b); } + void writeHex16(uint16_t v) { u8log_WriteHex16(&u8log, v); } + void writeHex32(uint32_t v) { u8log_WriteHex32(&u8log, v); } + void writeDec8(uint8_t v, uint8_t d) { u8log_WriteDec8(&u8log, v, d); } + void writeDec16(uint8_t v, uint8_t d) { u8log_WriteDec16(&u8log, v, d); } +}; + + +/* u8log_u8x8.c */ +inline void U8X8::drawLog(uint8_t x, uint8_t y, class U8X8LOG &u8x8log) +{ + u8x8_DrawLog(&u8x8, x, y, &(u8x8log.u8log)); +} + + + +#ifdef U8X8_USE_PINS + +class U8X8_NULL : public U8X8 { + public: U8X8_NULL(void) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_null_cb, u8x8_cad_empty, u8x8_byte_empty, u8x8_dummy_cb); + } +}; + +/* generated code (codebuild), u8g2 project */ +class U8X8_SSD1305_128X32_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1305_128X32_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1305_128X32_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1305_128X32_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_noname, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1305_128X32_NONAME_6800 : public U8X8 { + public: U8X8_SSD1305_128X32_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X32_NONAME_8080 : public U8X8 { + public: U8X8_SSD1305_128X32_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_noname, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X32_ADAFRUIT_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1305_128X32_ADAFRUIT_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_adafruit, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1305_128X32_ADAFRUIT_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1305_128X32_ADAFRUIT_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_adafruit, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1305_128X32_ADAFRUIT_6800 : public U8X8 { + public: U8X8_SSD1305_128X32_ADAFRUIT_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_adafruit, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X32_ADAFRUIT_8080 : public U8X8 { + public: U8X8_SSD1305_128X32_ADAFRUIT_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_adafruit, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X32_NONAME_SW_I2C : public U8X8 { + public: U8X8_SSD1305_128X32_NONAME_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1305_128X32_NONAME_HW_I2C : public U8X8 { + public: U8X8_SSD1305_128X32_NONAME_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1305_128X32_ADAFRUIT_SW_I2C : public U8X8 { + public: U8X8_SSD1305_128X32_ADAFRUIT_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_adafruit, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1305_128X32_ADAFRUIT_HW_I2C : public U8X8 { + public: U8X8_SSD1305_128X32_ADAFRUIT_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x32_adafruit, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1305_128X64_ADAFRUIT_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1305_128X64_ADAFRUIT_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_adafruit, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1305_128X64_ADAFRUIT_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1305_128X64_ADAFRUIT_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_adafruit, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1305_128X64_ADAFRUIT_6800 : public U8X8 { + public: U8X8_SSD1305_128X64_ADAFRUIT_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_adafruit, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X64_ADAFRUIT_8080 : public U8X8 { + public: U8X8_SSD1305_128X64_ADAFRUIT_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_adafruit, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X64_RAYSTAR_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1305_128X64_RAYSTAR_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_raystar, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1305_128X64_RAYSTAR_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1305_128X64_RAYSTAR_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_raystar, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1305_128X64_RAYSTAR_6800 : public U8X8 { + public: U8X8_SSD1305_128X64_RAYSTAR_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_raystar, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X64_RAYSTAR_8080 : public U8X8 { + public: U8X8_SSD1305_128X64_RAYSTAR_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_raystar, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1305_128X64_ADAFRUIT_SW_I2C : public U8X8 { + public: U8X8_SSD1305_128X64_ADAFRUIT_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_adafruit, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1305_128X64_ADAFRUIT_HW_I2C : public U8X8 { + public: U8X8_SSD1305_128X64_ADAFRUIT_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_adafruit, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1305_128X64_RAYSTAR_SW_I2C : public U8X8 { + public: U8X8_SSD1305_128X64_RAYSTAR_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_raystar, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1305_128X64_RAYSTAR_HW_I2C : public U8X8 { + public: U8X8_SSD1305_128X64_RAYSTAR_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1305_128x64_raystar, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_2040X16_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_2040X16_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_2040x16, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_2040X16_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_2040X16_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_2040x16, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_2040X16_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_2040X16_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_2040x16, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_2040X16_6800 : public U8X8 { + public: U8X8_SSD1306_2040X16_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_2040x16, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_2040X16_8080 : public U8X8 { + public: U8X8_SSD1306_2040X16_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_2040x16, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_128X64_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_128X64_NONAME_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_128X64_NONAME_6800 : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_NONAME_8080 : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_VCOMH0_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_128X64_VCOMH0_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_128X64_VCOMH0_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_128X64_VCOMH0_6800 : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_VCOMH0_8080 : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_ALT0_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_128X64_ALT0_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_128X64_ALT0_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_128X64_ALT0_6800 : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_ALT0_8080 : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X64_NONAME_SW_I2C : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_128X64_NONAME_HW_I2C : public U8X8 { + public: U8X8_SSD1306_128X64_NONAME_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_128X64_VCOMH0_SW_I2C : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_128X64_VCOMH0_HW_I2C : public U8X8 { + public: U8X8_SSD1306_128X64_VCOMH0_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_vcomh0, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_128X64_ALT0_SW_I2C : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_128X64_ALT0_HW_I2C : public U8X8 { + public: U8X8_SSD1306_128X64_ALT0_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_alt0, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_72X40_ER_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_72X40_ER_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_72X40_ER_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_72X40_ER_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_72X40_ER_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_72X40_ER_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_72X40_ER_6800 : public U8X8 { + public: U8X8_SSD1306_72X40_ER_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_72X40_ER_8080 : public U8X8 { + public: U8X8_SSD1306_72X40_ER_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_72X40_ER_SW_I2C : public U8X8 { + public: U8X8_SSD1306_72X40_ER_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_72X40_ER_HW_I2C : public U8X8 { + public: U8X8_SSD1306_72X40_ER_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_72x40_er, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1106_128X64_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1106_128X64_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1106_128X64_NONAME_3W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1106_128X64_NONAME_6800 : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X64_NONAME_8080 : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X64_VCOMH0_4W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1106_128X64_VCOMH0_4W_HW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1106_128X64_VCOMH0_3W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1106_128X64_VCOMH0_6800 : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X64_VCOMH0_8080 : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X64_WINSTAR_4W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1106_128X64_WINSTAR_4W_HW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1106_128X64_WINSTAR_3W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1106_128X64_WINSTAR_6800 : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X64_WINSTAR_8080 : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X64_NONAME_SW_I2C : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1106_128X64_NONAME_HW_I2C : public U8X8 { + public: U8X8_SH1106_128X64_NONAME_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1106_128X64_VCOMH0_SW_I2C : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1106_128X64_VCOMH0_HW_I2C : public U8X8 { + public: U8X8_SH1106_128X64_VCOMH0_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_vcomh0, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1106_128X64_WINSTAR_SW_I2C : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1106_128X64_WINSTAR_HW_I2C : public U8X8 { + public: U8X8_SH1106_128X64_WINSTAR_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x64_winstar, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1106_72X40_WISE_4W_SW_SPI : public U8X8 { + public: U8X8_SH1106_72X40_WISE_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1106_72X40_WISE_4W_HW_SPI : public U8X8 { + public: U8X8_SH1106_72X40_WISE_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1106_72X40_WISE_3W_SW_SPI : public U8X8 { + public: U8X8_SH1106_72X40_WISE_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1106_72X40_WISE_6800 : public U8X8 { + public: U8X8_SH1106_72X40_WISE_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_72X40_WISE_8080 : public U8X8 { + public: U8X8_SH1106_72X40_WISE_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_72X40_WISE_SW_I2C : public U8X8 { + public: U8X8_SH1106_72X40_WISE_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1106_72X40_WISE_HW_I2C : public U8X8 { + public: U8X8_SH1106_72X40_WISE_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_72x40_wise, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1106_64X32_4W_SW_SPI : public U8X8 { + public: U8X8_SH1106_64X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1106_64X32_4W_HW_SPI : public U8X8 { + public: U8X8_SH1106_64X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1106_64X32_3W_SW_SPI : public U8X8 { + public: U8X8_SH1106_64X32_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1106_64X32_6800 : public U8X8 { + public: U8X8_SH1106_64X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_64X32_8080 : public U8X8 { + public: U8X8_SH1106_64X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_64X32_SW_I2C : public U8X8 { + public: U8X8_SH1106_64X32_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1106_64X32_HW_I2C : public U8X8 { + public: U8X8_SH1106_64X32_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_64x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1107_64X128_4W_SW_SPI : public U8X8 { + public: U8X8_SH1107_64X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1107_64X128_4W_HW_SPI : public U8X8 { + public: U8X8_SH1107_64X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1107_64X128_3W_SW_SPI : public U8X8 { + public: U8X8_SH1107_64X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1107_64X128_6800 : public U8X8 { + public: U8X8_SH1107_64X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_64X128_8080 : public U8X8 { + public: U8X8_SH1107_64X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_64X128_SW_I2C : public U8X8 { + public: U8X8_SH1107_64X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1107_64X128_HW_I2C : public U8X8 { + public: U8X8_SH1107_64X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_64x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1107_SEEED_96X96_4W_SW_SPI : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1107_SEEED_96X96_4W_HW_SPI : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1107_SEEED_96X96_3W_SW_SPI : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1107_SEEED_96X96_6800 : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_SEEED_96X96_8080 : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_SEEED_96X96_SW_I2C : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1107_SEEED_96X96_HW_I2C : public U8X8 { + public: U8X8_SH1107_SEEED_96X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_96x96, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1107_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_SH1107_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1107_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_SH1107_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1107_128X128_3W_SW_SPI : public U8X8 { + public: U8X8_SH1107_128X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1107_128X128_6800 : public U8X8 { + public: U8X8_SH1107_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_128X128_8080 : public U8X8 { + public: U8X8_SH1107_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_PIMORONI_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1107_PIMORONI_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1107_PIMORONI_128X128_3W_SW_SPI : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1107_PIMORONI_128X128_6800 : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_PIMORONI_128X128_8080 : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_SEEED_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1107_SEEED_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1107_SEEED_128X128_3W_SW_SPI : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1107_SEEED_128X128_6800 : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_SEEED_128X128_8080 : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1107_128X128_SW_I2C : public U8X8 { + public: U8X8_SH1107_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1107_128X128_HW_I2C : public U8X8 { + public: U8X8_SH1107_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_128x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1107_PIMORONI_128X128_SW_I2C : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1107_PIMORONI_128X128_HW_I2C : public U8X8 { + public: U8X8_SH1107_PIMORONI_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_pimoroni_128x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1107_SEEED_128X128_SW_I2C : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1107_SEEED_128X128_HW_I2C : public U8X8 { + public: U8X8_SH1107_SEEED_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1107_seeed_128x128, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1108_160X160_4W_SW_SPI : public U8X8 { + public: U8X8_SH1108_160X160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1108_160X160_4W_HW_SPI : public U8X8 { + public: U8X8_SH1108_160X160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1108_160X160_3W_SW_SPI : public U8X8 { + public: U8X8_SH1108_160X160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1108_160X160_6800 : public U8X8 { + public: U8X8_SH1108_160X160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1108_160X160_8080 : public U8X8 { + public: U8X8_SH1108_160X160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1108_160X160_SW_I2C : public U8X8 { + public: U8X8_SH1108_160X160_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1108_160X160_HW_I2C : public U8X8 { + public: U8X8_SH1108_160X160_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1108_160x160, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1122_256X64_4W_SW_SPI : public U8X8 { + public: U8X8_SH1122_256X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1122_256X64_4W_HW_SPI : public U8X8 { + public: U8X8_SH1122_256X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1122_256X64_3W_SW_SPI : public U8X8 { + public: U8X8_SH1122_256X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1122_256X64_6800 : public U8X8 { + public: U8X8_SH1122_256X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1122_256X64_8080 : public U8X8 { + public: U8X8_SH1122_256X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1122_256X64_SW_I2C : public U8X8 { + public: U8X8_SH1122_256X64_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1122_256X64_HW_I2C : public U8X8 { + public: U8X8_SH1122_256X64_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1122_256x64, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_128X32_UNIVISION_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_128X32_UNIVISION_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_128X32_UNIVISION_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_128X32_UNIVISION_6800 : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X32_UNIVISION_8080 : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X32_WINSTAR_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_128X32_WINSTAR_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_128X32_WINSTAR_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_128X32_WINSTAR_6800 : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X32_WINSTAR_8080 : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_128X32_UNIVISION_SW_I2C : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_128X32_UNIVISION_HW_I2C : public U8X8 { + public: U8X8_SSD1306_128X32_UNIVISION_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_univision, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_128X32_WINSTAR_SW_I2C : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_128X32_WINSTAR_HW_I2C : public U8X8 { + public: U8X8_SSD1306_128X32_WINSTAR_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x32_winstar, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SH1106_128X32_VISIONOX_4W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SH1106_128X32_VISIONOX_4W_HW_SPI : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SH1106_128X32_VISIONOX_3W_SW_SPI : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SH1106_128X32_VISIONOX_6800 : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X32_VISIONOX_8080 : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SH1106_128X32_VISIONOX_SW_I2C : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SH1106_128X32_VISIONOX_HW_I2C : public U8X8 { + public: U8X8_SH1106_128X32_VISIONOX_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sh1106_128x32_visionox, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_64X48_ER_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_64X48_ER_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_64X48_ER_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_64X48_ER_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_64X48_ER_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_64X48_ER_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_64X48_ER_6800 : public U8X8 { + public: U8X8_SSD1306_64X48_ER_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_64X48_ER_8080 : public U8X8 { + public: U8X8_SSD1306_64X48_ER_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_64X48_ER_SW_I2C : public U8X8 { + public: U8X8_SSD1306_64X48_ER_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_64X48_ER_HW_I2C : public U8X8 { + public: U8X8_SSD1306_64X48_ER_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x48_er, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_48X64_WINSTAR_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_48X64_WINSTAR_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_48X64_WINSTAR_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_48X64_WINSTAR_6800 : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_48X64_WINSTAR_8080 : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_48X64_WINSTAR_SW_I2C : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_48X64_WINSTAR_HW_I2C : public U8X8 { + public: U8X8_SSD1306_48X64_WINSTAR_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_48x64_winstar, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_64X32_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_64X32_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_64X32_NONAME_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_64X32_NONAME_6800 : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_64X32_NONAME_8080 : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_64X32_1F_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_64X32_1F_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_64X32_1F_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_64X32_1F_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_64X32_1F_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_64X32_1F_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_64X32_1F_6800 : public U8X8 { + public: U8X8_SSD1306_64X32_1F_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_64X32_1F_8080 : public U8X8 { + public: U8X8_SSD1306_64X32_1F_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_64X32_NONAME_SW_I2C : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_64X32_NONAME_HW_I2C : public U8X8 { + public: U8X8_SSD1306_64X32_NONAME_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_noname, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_64X32_1F_SW_I2C : public U8X8 { + public: U8X8_SSD1306_64X32_1F_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_64X32_1F_HW_I2C : public U8X8 { + public: U8X8_SSD1306_64X32_1F_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_64x32_1f, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1306_96X16_ER_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_96X16_ER_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1306_96X16_ER_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1306_96X16_ER_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1306_96X16_ER_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_96X16_ER_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1306_96X16_ER_6800 : public U8X8 { + public: U8X8_SSD1306_96X16_ER_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_96X16_ER_8080 : public U8X8 { + public: U8X8_SSD1306_96X16_ER_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1306_96X16_ER_SW_I2C : public U8X8 { + public: U8X8_SSD1306_96X16_ER_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1306_96X16_ER_HW_I2C : public U8X8 { + public: U8X8_SSD1306_96X16_ER_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_96x16_er, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1309_128X64_NONAME2_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME2_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname2, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1309_128X64_NONAME2_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME2_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname2, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1309_128X64_NONAME2_6800 : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME2_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname2, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1309_128X64_NONAME2_8080 : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME2_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname2, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1309_128X64_NONAME2_SW_I2C : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME2_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname2, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1309_128X64_NONAME2_HW_I2C : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME2_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname2, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1309_128X64_NONAME0_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME0_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname0, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1309_128X64_NONAME0_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME0_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname0, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1309_128X64_NONAME0_6800 : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME0_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname0, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1309_128X64_NONAME0_8080 : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME0_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname0, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1309_128X64_NONAME0_SW_I2C : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME0_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname0, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1309_128X64_NONAME0_HW_I2C : public U8X8 { + public: U8X8_SSD1309_128X64_NONAME0_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1309_128x64_noname0, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1316_128X32_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1316_128X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1316_128x32, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1316_128X32_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1316_128X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1316_128x32, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1316_128X32_6800 : public U8X8 { + public: U8X8_SSD1316_128X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1316_128x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1316_128X32_8080 : public U8X8 { + public: U8X8_SSD1316_128X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1316_128x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1316_128X32_SW_I2C : public U8X8 { + public: U8X8_SSD1316_128X32_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1316_128x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1316_128X32_HW_I2C : public U8X8 { + public: U8X8_SSD1316_128X32_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1316_128x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1317_96X96_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1317_96X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1317_96x96, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1317_96X96_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1317_96X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1317_96x96, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1317_96X96_6800 : public U8X8 { + public: U8X8_SSD1317_96X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1317_96x96, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1317_96X96_8080 : public U8X8 { + public: U8X8_SSD1317_96X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1317_96x96, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1317_96X96_SW_I2C : public U8X8 { + public: U8X8_SSD1317_96X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1317_96x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1317_96X96_HW_I2C : public U8X8 { + public: U8X8_SSD1317_96X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1317_96x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1318_128X96_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1318_128X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1318_128X96_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1318_128X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1318_128X96_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1318_128X96_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1318_128X96_6800 : public U8X8 { + public: U8X8_SSD1318_128X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1318_128X96_8080 : public U8X8 { + public: U8X8_SSD1318_128X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1318_128X96_XCP_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1318_128X96_XCP_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1318_128X96_XCP_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1318_128X96_XCP_6800 : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1318_128X96_XCP_8080 : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1318_128X96_SW_I2C : public U8X8 { + public: U8X8_SSD1318_128X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1318_128X96_HW_I2C : public U8X8 { + public: U8X8_SSD1318_128X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1318_128X96_XCP_SW_I2C : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1318_128X96_XCP_HW_I2C : public U8X8 { + public: U8X8_SSD1318_128X96_XCP_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1318_128x96_xcp, u8x8_cad_ssd13xx_fast_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1325_NHD_128X64_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1325_NHD_128X64_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1325_NHD_128X64_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1325_NHD_128X64_6800 : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1325_NHD_128X64_8080 : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1325_NHD_128X64_SW_I2C : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1325_NHD_128X64_HW_I2C : public U8X8 { + public: U8X8_SSD1325_NHD_128X64_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1325_nhd_128x64, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD0323_OS128064_4W_SW_SPI : public U8X8 { + public: U8X8_SSD0323_OS128064_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD0323_OS128064_4W_HW_SPI : public U8X8 { + public: U8X8_SSD0323_OS128064_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD0323_OS128064_3W_SW_SPI : public U8X8 { + public: U8X8_SSD0323_OS128064_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD0323_OS128064_6800 : public U8X8 { + public: U8X8_SSD0323_OS128064_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD0323_OS128064_8080 : public U8X8 { + public: U8X8_SSD0323_OS128064_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD0323_OS128064_SW_I2C : public U8X8 { + public: U8X8_SSD0323_OS128064_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD0323_OS128064_HW_I2C : public U8X8 { + public: U8X8_SSD0323_OS128064_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd0323_os128064, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1326_ER_256X32_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1326_ER_256X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1326_ER_256X32_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1326_ER_256X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1326_ER_256X32_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1326_ER_256X32_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1326_ER_256X32_6800 : public U8X8 { + public: U8X8_SSD1326_ER_256X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1326_ER_256X32_8080 : public U8X8 { + public: U8X8_SSD1326_ER_256X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1326_ER_256X32_SW_I2C : public U8X8 { + public: U8X8_SSD1326_ER_256X32_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1326_ER_256X32_HW_I2C : public U8X8 { + public: U8X8_SSD1326_ER_256X32_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1326_er_256x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1327_WS_96X64_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_WS_96X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1327_WS_96X64_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_WS_96X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1327_WS_96X64_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_WS_96X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_WS_96X64_6800 : public U8X8 { + public: U8X8_SSD1327_WS_96X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_WS_96X64_8080 : public U8X8 { + public: U8X8_SSD1327_WS_96X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_WS_96X64_SW_I2C : public U8X8 { + public: U8X8_SSD1327_WS_96X64_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1327_WS_96X64_HW_I2C : public U8X8 { + public: U8X8_SSD1327_WS_96X64_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_96x64, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1327_SEEED_96X96_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1327_SEEED_96X96_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1327_SEEED_96X96_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_SEEED_96X96_6800 : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_SEEED_96X96_8080 : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_SEEED_96X96_SW_I2C : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1327_SEEED_96X96_HW_I2C : public U8X8 { + public: U8X8_SSD1327_SEEED_96X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_seeed_96x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1327_EA_W128128_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_EA_W128128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1327_EA_W128128_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_EA_W128128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1327_EA_W128128_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_EA_W128128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_EA_W128128_6800 : public U8X8 { + public: U8X8_SSD1327_EA_W128128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_EA_W128128_8080 : public U8X8 { + public: U8X8_SSD1327_EA_W128128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_MIDAS_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1327_MIDAS_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1327_MIDAS_128X128_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_MIDAS_128X128_6800 : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_MIDAS_128X128_8080 : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_WS_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_WS_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1327_WS_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_WS_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1327_WS_128X128_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_WS_128X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_WS_128X128_6800 : public U8X8 { + public: U8X8_SSD1327_WS_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_WS_128X128_8080 : public U8X8 { + public: U8X8_SSD1327_WS_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_EA_W128128_SW_I2C : public U8X8 { + public: U8X8_SSD1327_EA_W128128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1327_EA_W128128_HW_I2C : public U8X8 { + public: U8X8_SSD1327_EA_W128128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ea_w128128, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1327_MIDAS_128X128_SW_I2C : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1327_MIDAS_128X128_HW_I2C : public U8X8 { + public: U8X8_SSD1327_MIDAS_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_midas_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1327_WS_128X128_SW_I2C : public U8X8 { + public: U8X8_SSD1327_WS_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1327_WS_128X128_HW_I2C : public U8X8 { + public: U8X8_SSD1327_WS_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_ws_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1327_VISIONOX_128X96_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1327_VISIONOX_128X96_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1327_VISIONOX_128X96_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_VISIONOX_128X96_6800 : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_VISIONOX_128X96_8080 : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_VISIONOX_128X96_SW_I2C : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_SSD1327_VISIONOX_128X96_HW_I2C : public U8X8 { + public: U8X8_SSD1327_VISIONOX_128X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_visionox_128x96, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_SSD1329_128X96_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1329_128X96_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1329_128X96_NONAME_6800 : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1329_128X96_NONAME_8080 : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1329_96X96_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1329_96X96_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_96x96_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1329_96X96_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1329_96X96_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_96x96_noname, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1329_96X96_NONAME_6800 : public U8X8 { + public: U8X8_SSD1329_96X96_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_96x96_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1329_96X96_NONAME_8080 : public U8X8 { + public: U8X8_SSD1329_96X96_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_96x96_noname, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_LD7032_60X32_4W_SW_SPI : public U8X8 { + public: U8X8_LD7032_60X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_LD7032_60X32_4W_HW_SPI : public U8X8 { + public: U8X8_LD7032_60X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_LD7032_60X32_ALT_4W_SW_SPI : public U8X8 { + public: U8X8_LD7032_60X32_ALT_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32_alt, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_LD7032_60X32_ALT_4W_HW_SPI : public U8X8 { + public: U8X8_LD7032_60X32_ALT_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32_alt, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_LD7032_60X32_SW_I2C : public U8X8 { + public: U8X8_LD7032_60X32_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32, u8x8_cad_ld7032_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_LD7032_60X32_HW_I2C : public U8X8 { + public: U8X8_LD7032_60X32_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32, u8x8_cad_ld7032_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_LD7032_60X32_ALT_SW_I2C : public U8X8 { + public: U8X8_LD7032_60X32_ALT_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32_alt, u8x8_cad_ld7032_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_LD7032_60X32_ALT_HW_I2C : public U8X8 { + public: U8X8_LD7032_60X32_ALT_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32_alt, u8x8_cad_ld7032_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7920_192X32_8080 : public U8X8 { + public: U8X8_ST7920_192X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_192x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7920_192X32_6800 : public U8X8 { + public: U8X8_ST7920_192X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_192x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7920_192X32_SW_SPI : public U8X8 { + public: U8X8_ST7920_192X32_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_192x32, u8x8_cad_st7920_spi, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7920_192X32_HW_SPI : public U8X8 { + public: U8X8_ST7920_192X32_HW_SPI(uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_192x32, u8x8_cad_st7920_spi, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8X8_ST7920_128X64_8080 : public U8X8 { + public: U8X8_ST7920_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_128x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7920_128X64_6800 : public U8X8 { + public: U8X8_ST7920_128X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_128x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7920_128X64_SW_SPI : public U8X8 { + public: U8X8_ST7920_128X64_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_128x64, u8x8_cad_st7920_spi, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7920_128X64_HW_SPI : public U8X8 { + public: U8X8_ST7920_128X64_HW_SPI(uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7920_128x64, u8x8_cad_st7920_spi, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_ST7920_HW_SPI(getU8x8(), cs, reset); + } +}; +class U8X8_LS013B7DH03_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_LS013B7DH03_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls013b7dh03_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_LS013B7DH03_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_LS013B7DH03_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls013b7dh03_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_LS027B7DH01_400X240_4W_SW_SPI : public U8X8 { + public: U8X8_LS027B7DH01_400X240_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls027b7dh01_400x240, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_LS027B7DH01_400X240_4W_HW_SPI : public U8X8 { + public: U8X8_LS027B7DH01_400X240_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls027b7dh01_400x240, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_LS027B7DH01_M0_400X240_4W_SW_SPI : public U8X8 { + public: U8X8_LS027B7DH01_M0_400X240_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls027b7dh01_m0_400x240, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_LS027B7DH01_M0_400X240_4W_HW_SPI : public U8X8 { + public: U8X8_LS027B7DH01_M0_400X240_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls027b7dh01_m0_400x240, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_LS013B7DH05_144X168_4W_SW_SPI : public U8X8 { + public: U8X8_LS013B7DH05_144X168_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls013b7dh05_144x168, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_LS013B7DH05_144X168_4W_HW_SPI : public U8X8 { + public: U8X8_LS013B7DH05_144X168_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ls013b7dh05_144x168, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1701_EA_DOGS102_4W_SW_SPI : public U8X8 { + public: U8X8_UC1701_EA_DOGS102_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_ea_dogs102, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1701_EA_DOGS102_4W_HW_SPI : public U8X8 { + public: U8X8_UC1701_EA_DOGS102_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_ea_dogs102, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1701_EA_DOGS102_3W_SW_SPI : public U8X8 { + public: U8X8_UC1701_EA_DOGS102_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_ea_dogs102, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1701_EA_DOGS102_6800 : public U8X8 { + public: U8X8_UC1701_EA_DOGS102_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_ea_dogs102, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1701_EA_DOGS102_8080 : public U8X8 { + public: U8X8_UC1701_EA_DOGS102_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_ea_dogs102, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1701_MINI12864_4W_SW_SPI : public U8X8 { + public: U8X8_UC1701_MINI12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_mini12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1701_MINI12864_4W_HW_SPI : public U8X8 { + public: U8X8_UC1701_MINI12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_mini12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1701_MINI12864_3W_SW_SPI : public U8X8 { + public: U8X8_UC1701_MINI12864_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_mini12864, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1701_MINI12864_6800 : public U8X8 { + public: U8X8_UC1701_MINI12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_mini12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1701_MINI12864_8080 : public U8X8 { + public: U8X8_UC1701_MINI12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1701_mini12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_PCD8544_84X48_4W_SW_SPI : public U8X8 { + public: U8X8_PCD8544_84X48_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_pcd8544_84x48, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_PCD8544_84X48_4W_HW_SPI : public U8X8 { + public: U8X8_PCD8544_84X48_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_pcd8544_84x48, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_PCD8544_84X48_3W_SW_SPI : public U8X8 { + public: U8X8_PCD8544_84X48_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_pcd8544_84x48, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_PCF8812_96X65_4W_SW_SPI : public U8X8 { + public: U8X8_PCF8812_96X65_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_pcf8812_96x65, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_PCF8812_96X65_4W_HW_SPI : public U8X8 { + public: U8X8_PCF8812_96X65_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_pcf8812_96x65, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_PCF8812_96X65_3W_SW_SPI : public U8X8 { + public: U8X8_PCF8812_96X65_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_pcf8812_96x65, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_HX1230_96X68_4W_SW_SPI : public U8X8 { + public: U8X8_HX1230_96X68_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_hx1230_96x68, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_HX1230_96X68_4W_HW_SPI : public U8X8 { + public: U8X8_HX1230_96X68_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_hx1230_96x68, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_HX1230_96X68_3W_SW_SPI : public U8X8 { + public: U8X8_HX1230_96X68_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_hx1230_96x68, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1604_JLX19264_4W_SW_SPI : public U8X8 { + public: U8X8_UC1604_JLX19264_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1604_JLX19264_4W_HW_SPI : public U8X8 { + public: U8X8_UC1604_JLX19264_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1604_JLX19264_3W_SW_SPI : public U8X8 { + public: U8X8_UC1604_JLX19264_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1604_JLX19264_6800 : public U8X8 { + public: U8X8_UC1604_JLX19264_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1604_JLX19264_8080 : public U8X8 { + public: U8X8_UC1604_JLX19264_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1604_JLX19264_SW_I2C : public U8X8 { + public: U8X8_UC1604_JLX19264_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1604_JLX19264_HW_I2C : public U8X8 { + public: U8X8_UC1604_JLX19264_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1604_jlx19264, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1608_ERC24064_4W_SW_SPI : public U8X8 { + public: U8X8_UC1608_ERC24064_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1608_ERC24064_4W_HW_SPI : public U8X8 { + public: U8X8_UC1608_ERC24064_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1608_ERC24064_3W_SW_SPI : public U8X8 { + public: U8X8_UC1608_ERC24064_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1608_ERC24064_6800 : public U8X8 { + public: U8X8_UC1608_ERC24064_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_ERC24064_8080 : public U8X8 { + public: U8X8_UC1608_ERC24064_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_DEM240064_4W_SW_SPI : public U8X8 { + public: U8X8_UC1608_DEM240064_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1608_DEM240064_4W_HW_SPI : public U8X8 { + public: U8X8_UC1608_DEM240064_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1608_DEM240064_3W_SW_SPI : public U8X8 { + public: U8X8_UC1608_DEM240064_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1608_DEM240064_6800 : public U8X8 { + public: U8X8_UC1608_DEM240064_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_DEM240064_8080 : public U8X8 { + public: U8X8_UC1608_DEM240064_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_ERC24064_SW_I2C : public U8X8 { + public: U8X8_UC1608_ERC24064_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1608_ERC24064_HW_I2C : public U8X8 { + public: U8X8_UC1608_ERC24064_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc24064, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1608_DEM240064_SW_I2C : public U8X8 { + public: U8X8_UC1608_DEM240064_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1608_DEM240064_HW_I2C : public U8X8 { + public: U8X8_UC1608_DEM240064_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_dem240064, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1608_ERC240120_4W_SW_SPI : public U8X8 { + public: U8X8_UC1608_ERC240120_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1608_ERC240120_4W_HW_SPI : public U8X8 { + public: U8X8_UC1608_ERC240120_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1608_ERC240120_3W_SW_SPI : public U8X8 { + public: U8X8_UC1608_ERC240120_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1608_ERC240120_6800 : public U8X8 { + public: U8X8_UC1608_ERC240120_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_ERC240120_8080 : public U8X8 { + public: U8X8_UC1608_ERC240120_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_ERC240120_SW_I2C : public U8X8 { + public: U8X8_UC1608_ERC240120_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1608_ERC240120_HW_I2C : public U8X8 { + public: U8X8_UC1608_ERC240120_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_erc240120, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1608_240X128_4W_SW_SPI : public U8X8 { + public: U8X8_UC1608_240X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1608_240X128_4W_HW_SPI : public U8X8 { + public: U8X8_UC1608_240X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1608_240X128_3W_SW_SPI : public U8X8 { + public: U8X8_UC1608_240X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1608_240X128_6800 : public U8X8 { + public: U8X8_UC1608_240X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_240X128_8080 : public U8X8 { + public: U8X8_UC1608_240X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1608_240X128_SW_I2C : public U8X8 { + public: U8X8_UC1608_240X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1608_240X128_HW_I2C : public U8X8 { + public: U8X8_UC1608_240X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1608_240x128, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1638_160X128_4W_SW_SPI : public U8X8 { + public: U8X8_UC1638_160X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_160x128, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1638_160X128_4W_HW_SPI : public U8X8 { + public: U8X8_UC1638_160X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_160x128, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1638_160X128_3W_SW_SPI : public U8X8 { + public: U8X8_UC1638_160X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_160x128, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1638_160X128_6800 : public U8X8 { + public: U8X8_UC1638_160X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_160x128, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1638_160X128_8080 : public U8X8 { + public: U8X8_UC1638_160X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_160x128, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1638_192X96_4W_SW_SPI : public U8X8 { + public: U8X8_UC1638_192X96_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1638_192X96_4W_HW_SPI : public U8X8 { + public: U8X8_UC1638_192X96_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1638_192X96_3W_SW_SPI : public U8X8 { + public: U8X8_UC1638_192X96_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1638_192X96_6800 : public U8X8 { + public: U8X8_UC1638_192X96_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1638_192X96_8080 : public U8X8 { + public: U8X8_UC1638_192X96_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1638_192X96_SW_I2C : public U8X8 { + public: U8X8_UC1638_192X96_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_uc1638_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1638_192X96_HW_I2C : public U8X8 { + public: U8X8_UC1638_192X96_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1638_192x96, u8x8_cad_uc1638_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1610_EA_DOGXL160_4W_SW_SPI : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1610_EA_DOGXL160_4W_HW_SPI : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1610_EA_DOGXL160_3W_SW_SPI : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1610_EA_DOGXL160_6800 : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1610_EA_DOGXL160_8080 : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1610_EA_DOGXL160_SW_I2C : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1610_EA_DOGXL160_HW_I2C : public U8X8 { + public: U8X8_UC1610_EA_DOGXL160_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1610_ea_dogxl160, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1611_EA_DOGM240_4W_SW_SPI : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1611_EA_DOGM240_4W_HW_SPI : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1611_EA_DOGM240_3W_SW_SPI : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1611_EA_DOGM240_6800 : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_EA_DOGM240_8080 : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_EA_DOGM240_SW_I2C : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1611_EA_DOGM240_HW_I2C : public U8X8 { + public: U8X8_UC1611_EA_DOGM240_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogm240, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1611_EA_DOGXL240_4W_SW_SPI : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1611_EA_DOGXL240_4W_HW_SPI : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1611_EA_DOGXL240_3W_SW_SPI : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1611_EA_DOGXL240_6800 : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_EA_DOGXL240_8080 : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_EA_DOGXL240_SW_I2C : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1611_EA_DOGXL240_HW_I2C : public U8X8 { + public: U8X8_UC1611_EA_DOGXL240_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ea_dogxl240, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1611_EW50850_4W_SW_SPI : public U8X8 { + public: U8X8_UC1611_EW50850_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1611_EW50850_4W_HW_SPI : public U8X8 { + public: U8X8_UC1611_EW50850_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1611_EW50850_3W_SW_SPI : public U8X8 { + public: U8X8_UC1611_EW50850_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1611_EW50850_6800 : public U8X8 { + public: U8X8_UC1611_EW50850_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_EW50850_8080 : public U8X8 { + public: U8X8_UC1611_EW50850_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_EW50850_SW_I2C : public U8X8 { + public: U8X8_UC1611_EW50850_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1611_EW50850_HW_I2C : public U8X8 { + public: U8X8_UC1611_EW50850_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ew50850, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1611_CG160160_4W_SW_SPI : public U8X8 { + public: U8X8_UC1611_CG160160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1611_CG160160_4W_HW_SPI : public U8X8 { + public: U8X8_UC1611_CG160160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1611_CG160160_3W_SW_SPI : public U8X8 { + public: U8X8_UC1611_CG160160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1611_CG160160_6800 : public U8X8 { + public: U8X8_UC1611_CG160160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_CG160160_8080 : public U8X8 { + public: U8X8_UC1611_CG160160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_CG160160_SW_I2C : public U8X8 { + public: U8X8_UC1611_CG160160_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1611_CG160160_HW_I2C : public U8X8 { + public: U8X8_UC1611_CG160160_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_cg160160, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1611_IDS4073_4W_SW_SPI : public U8X8 { + public: U8X8_UC1611_IDS4073_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1611_IDS4073_4W_HW_SPI : public U8X8 { + public: U8X8_UC1611_IDS4073_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1611_IDS4073_3W_SW_SPI : public U8X8 { + public: U8X8_UC1611_IDS4073_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1611_IDS4073_6800 : public U8X8 { + public: U8X8_UC1611_IDS4073_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_IDS4073_8080 : public U8X8 { + public: U8X8_UC1611_IDS4073_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1611_IDS4073_SW_I2C : public U8X8 { + public: U8X8_UC1611_IDS4073_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1611_IDS4073_HW_I2C : public U8X8 { + public: U8X8_UC1611_IDS4073_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1611_ids4073, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7511_AVD_320X240_4W_SW_SPI : public U8X8 { + public: U8X8_ST7511_AVD_320X240_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7511_avd_320x240, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7511_AVD_320X240_4W_HW_SPI : public U8X8 { + public: U8X8_ST7511_AVD_320X240_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7511_avd_320x240, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7511_AVD_320X240_3W_SW_SPI : public U8X8 { + public: U8X8_ST7511_AVD_320X240_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7511_avd_320x240, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7511_AVD_320X240_6800 : public U8X8 { + public: U8X8_ST7511_AVD_320X240_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7511_avd_320x240, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7511_AVD_320X240_8080 : public U8X8 { + public: U8X8_ST7511_AVD_320X240_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7511_avd_320x240, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7528_NHD_C160100_4W_SW_SPI : public U8X8 { + public: U8X8_ST7528_NHD_C160100_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_nhd_c160100, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7528_NHD_C160100_4W_HW_SPI : public U8X8 { + public: U8X8_ST7528_NHD_C160100_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_nhd_c160100, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7528_NHD_C160100_6800 : public U8X8 { + public: U8X8_ST7528_NHD_C160100_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_nhd_c160100, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7528_NHD_C160100_8080 : public U8X8 { + public: U8X8_ST7528_NHD_C160100_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_nhd_c160100, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7528_NHD_C160100_SW_I2C : public U8X8 { + public: U8X8_ST7528_NHD_C160100_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_nhd_c160100, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST7528_NHD_C160100_HW_I2C : public U8X8 { + public: U8X8_ST7528_NHD_C160100_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_nhd_c160100, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7528_ERC16064_4W_SW_SPI : public U8X8 { + public: U8X8_ST7528_ERC16064_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_erc16064, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7528_ERC16064_4W_HW_SPI : public U8X8 { + public: U8X8_ST7528_ERC16064_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_erc16064, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7528_ERC16064_6800 : public U8X8 { + public: U8X8_ST7528_ERC16064_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_erc16064, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7528_ERC16064_8080 : public U8X8 { + public: U8X8_ST7528_ERC16064_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_erc16064, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7528_ERC16064_SW_I2C : public U8X8 { + public: U8X8_ST7528_ERC16064_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_erc16064, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST7528_ERC16064_HW_I2C : public U8X8 { + public: U8X8_ST7528_ERC16064_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7528_erc16064, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1617_JLX128128_4W_SW_SPI : public U8X8 { + public: U8X8_UC1617_JLX128128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1617_jlx128128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1617_JLX128128_4W_HW_SPI : public U8X8 { + public: U8X8_UC1617_JLX128128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1617_jlx128128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1617_JLX128128_3W_SW_SPI : public U8X8 { + public: U8X8_UC1617_JLX128128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1617_jlx128128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1617_JLX128128_SW_I2C : public U8X8 { + public: U8X8_UC1617_JLX128128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1617_jlx128128, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1617_JLX128128_HW_I2C : public U8X8 { + public: U8X8_UC1617_JLX128128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1617_jlx128128, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7565_EA_DOGM128_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_EA_DOGM128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_EA_DOGM128_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_EA_DOGM128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_EA_DOGM128_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_EA_DOGM128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_EA_DOGM128_6800 : public U8X8 { + public: U8X8_ST7565_EA_DOGM128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_EA_DOGM128_8080 : public U8X8 { + public: U8X8_ST7565_EA_DOGM128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_LM6063_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_LM6063_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6063, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_LM6063_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_LM6063_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6063, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_LM6063_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_LM6063_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6063, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_LM6063_6800 : public U8X8 { + public: U8X8_ST7565_LM6063_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6063, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_LM6063_8080 : public U8X8 { + public: U8X8_ST7565_LM6063_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6063, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_64128N_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_64128N_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_64128n, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_64128N_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_64128N_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_64128n, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_64128N_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_64128N_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_64128n, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_64128N_6800 : public U8X8 { + public: U8X8_ST7565_64128N_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_64128n, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_64128N_8080 : public U8X8 { + public: U8X8_ST7565_64128N_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_64128n, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_ZOLEN_128X64_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_ZOLEN_128X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_zolen_128x64, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_ZOLEN_128X64_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_ZOLEN_128X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_zolen_128x64, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_ZOLEN_128X64_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_ZOLEN_128X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_zolen_128x64, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_ZOLEN_128X64_6800 : public U8X8 { + public: U8X8_ST7565_ZOLEN_128X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_zolen_128x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_ZOLEN_128X64_8080 : public U8X8 { + public: U8X8_ST7565_ZOLEN_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_zolen_128x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_LM6059_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_LM6059_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6059, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_LM6059_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_LM6059_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6059, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_LM6059_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_LM6059_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6059, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_LM6059_6800 : public U8X8 { + public: U8X8_ST7565_LM6059_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6059, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_LM6059_8080 : public U8X8 { + public: U8X8_ST7565_LM6059_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lm6059, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_KS0713_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_KS0713_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ks0713, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_KS0713_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_KS0713_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ks0713, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_KS0713_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_KS0713_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ks0713, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_KS0713_6800 : public U8X8 { + public: U8X8_ST7565_KS0713_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ks0713, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_KS0713_8080 : public U8X8 { + public: U8X8_ST7565_KS0713_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ks0713, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_LX12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_LX12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lx12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_LX12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_LX12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lx12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_LX12864_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_LX12864_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lx12864, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_LX12864_6800 : public U8X8 { + public: U8X8_ST7565_LX12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lx12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_LX12864_8080 : public U8X8 { + public: U8X8_ST7565_LX12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_lx12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_ERC12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_ERC12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_ERC12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_ERC12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_ERC12864_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_ERC12864_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_ERC12864_6800 : public U8X8 { + public: U8X8_ST7565_ERC12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_ERC12864_8080 : public U8X8 { + public: U8X8_ST7565_ERC12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_ERC12864_ALT_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_ERC12864_ALT_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864_alt, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_ERC12864_ALT_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_ERC12864_ALT_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864_alt, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_ERC12864_ALT_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_ERC12864_ALT_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864_alt, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_ERC12864_ALT_6800 : public U8X8 { + public: U8X8_ST7565_ERC12864_ALT_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864_alt, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_ERC12864_ALT_8080 : public U8X8 { + public: U8X8_ST7565_ERC12864_ALT_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_erc12864_alt, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_NHD_C12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_NHD_C12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_NHD_C12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_NHD_C12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_NHD_C12864_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_NHD_C12864_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12864, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_NHD_C12864_6800 : public U8X8 { + public: U8X8_ST7565_NHD_C12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_NHD_C12864_8080 : public U8X8 { + public: U8X8_ST7565_NHD_C12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_JLX12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_JLX12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_jlx12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_JLX12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_JLX12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_jlx12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_JLX12864_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_JLX12864_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_jlx12864, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_JLX12864_6800 : public U8X8 { + public: U8X8_ST7565_JLX12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_jlx12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_JLX12864_8080 : public U8X8 { + public: U8X8_ST7565_JLX12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_jlx12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_NHD_C12832_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_NHD_C12832_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12832, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_NHD_C12832_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_NHD_C12832_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12832, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_NHD_C12832_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_NHD_C12832_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12832, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_NHD_C12832_6800 : public U8X8 { + public: U8X8_ST7565_NHD_C12832_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12832, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_NHD_C12832_8080 : public U8X8 { + public: U8X8_ST7565_NHD_C12832_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_nhd_c12832, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1601_128X32_4W_SW_SPI : public U8X8 { + public: U8X8_UC1601_128X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1601_128X32_4W_HW_SPI : public U8X8 { + public: U8X8_UC1601_128X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1601_128X32_3W_SW_SPI : public U8X8 { + public: U8X8_UC1601_128X32_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1601_128X32_6800 : public U8X8 { + public: U8X8_UC1601_128X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1601_128X32_8080 : public U8X8 { + public: U8X8_UC1601_128X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1601_128X32_SW_I2C : public U8X8 { + public: U8X8_UC1601_128X32_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1601_128X32_HW_I2C : public U8X8 { + public: U8X8_UC1601_128X32_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x32, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_UC1601_128X64_4W_SW_SPI : public U8X8 { + public: U8X8_UC1601_128X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_UC1601_128X64_4W_HW_SPI : public U8X8 { + public: U8X8_UC1601_128X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_UC1601_128X64_3W_SW_SPI : public U8X8 { + public: U8X8_UC1601_128X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_UC1601_128X64_6800 : public U8X8 { + public: U8X8_UC1601_128X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1601_128X64_8080 : public U8X8 { + public: U8X8_UC1601_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_UC1601_128X64_SW_I2C : public U8X8 { + public: U8X8_UC1601_128X64_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_uc16xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_UC1601_128X64_HW_I2C : public U8X8 { + public: U8X8_UC1601_128X64_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_uc1601_128x64, u8x8_cad_uc16xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7565_EA_DOGM132_4W_SW_SPI : public U8X8 { + public: U8X8_ST7565_EA_DOGM132_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm132, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7565_EA_DOGM132_4W_HW_SPI : public U8X8 { + public: U8X8_ST7565_EA_DOGM132_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm132, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7565_EA_DOGM132_3W_SW_SPI : public U8X8 { + public: U8X8_ST7565_EA_DOGM132_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm132, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7565_EA_DOGM132_6800 : public U8X8 { + public: U8X8_ST7565_EA_DOGM132_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm132, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7565_EA_DOGM132_8080 : public U8X8 { + public: U8X8_ST7565_EA_DOGM132_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7565_ea_dogm132, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_PI_132X64_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_PI_132X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_pi_132x64, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_PI_132X64_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_PI_132X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_pi_132x64, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_PI_132X64_6800 : public U8X8 { + public: U8X8_ST7567_PI_132X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_pi_132x64, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_PI_132X64_8080 : public U8X8 { + public: U8X8_ST7567_PI_132X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_pi_132x64, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_JLX12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_JLX12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_jlx12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_JLX12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_JLX12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_jlx12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_JLX12864_6800 : public U8X8 { + public: U8X8_ST7567_JLX12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_jlx12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_JLX12864_8080 : public U8X8 { + public: U8X8_ST7567_JLX12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_jlx12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_ENH_DG128064_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_ENH_DG128064_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_ENH_DG128064_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_ENH_DG128064_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_ENH_DG128064_6800 : public U8X8 { + public: U8X8_ST7567_ENH_DG128064_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_ENH_DG128064_8080 : public U8X8 { + public: U8X8_ST7567_ENH_DG128064_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_ENH_DG128064I_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_ENH_DG128064I_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064i, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_ENH_DG128064I_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_ENH_DG128064I_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064i, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_ENH_DG128064I_6800 : public U8X8 { + public: U8X8_ST7567_ENH_DG128064I_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064i, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_ENH_DG128064I_8080 : public U8X8 { + public: U8X8_ST7567_ENH_DG128064I_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_enh_dg128064i, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_OS12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_OS12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_os12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_OS12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_OS12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_os12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_OS12864_6800 : public U8X8 { + public: U8X8_ST7567_OS12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_os12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_OS12864_8080 : public U8X8 { + public: U8X8_ST7567_OS12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_os12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_64X32_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_64X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_64x32, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_64X32_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_64X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_64x32, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_64X32_6800 : public U8X8 { + public: U8X8_ST7567_64X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_64x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_64X32_8080 : public U8X8 { + public: U8X8_ST7567_64X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_64x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_HEM6432_4W_SW_SPI : public U8X8 { + public: U8X8_ST7567_HEM6432_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_hem6432, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7567_HEM6432_4W_HW_SPI : public U8X8 { + public: U8X8_ST7567_HEM6432_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_hem6432, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7567_HEM6432_6800 : public U8X8 { + public: U8X8_ST7567_HEM6432_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_hem6432, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_HEM6432_8080 : public U8X8 { + public: U8X8_ST7567_HEM6432_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_hem6432, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7567_64X32_SW_I2C : public U8X8 { + public: U8X8_ST7567_64X32_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_64x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST7567_64X32_HW_I2C : public U8X8 { + public: U8X8_ST7567_64X32_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_64x32, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7567_HEM6432_SW_I2C : public U8X8 { + public: U8X8_ST7567_HEM6432_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_hem6432, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST7567_HEM6432_HW_I2C : public U8X8 { + public: U8X8_ST7567_HEM6432_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7567_hem6432, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7571_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_ST7571_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7571_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7571_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_ST7571_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7571_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7571_128X128_6800 : public U8X8 { + public: U8X8_ST7571_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7571_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7571_128X128_8080 : public U8X8 { + public: U8X8_ST7571_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7571_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7571_128X128_SW_I2C : public U8X8 { + public: U8X8_ST7571_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7571_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST7571_128X128_HW_I2C : public U8X8 { + public: U8X8_ST7571_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7571_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST7586S_S028HN118A_4W_SW_SPI : public U8X8 { + public: U8X8_ST7586S_S028HN118A_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_s028hn118a, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7586S_S028HN118A_4W_HW_SPI : public U8X8 { + public: U8X8_ST7586S_S028HN118A_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_s028hn118a, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7586S_ERC240160_4W_SW_SPI : public U8X8 { + public: U8X8_ST7586S_ERC240160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_erc240160, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7586S_ERC240160_4W_HW_SPI : public U8X8 { + public: U8X8_ST7586S_ERC240160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_erc240160, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7586S_ERC240160_3W_SW_SPI : public U8X8 { + public: U8X8_ST7586S_ERC240160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_erc240160, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7586S_ERC240160_6800 : public U8X8 { + public: U8X8_ST7586S_ERC240160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_erc240160, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7586S_ERC240160_8080 : public U8X8 { + public: U8X8_ST7586S_ERC240160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_erc240160, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7586S_YMC240160_4W_SW_SPI : public U8X8 { + public: U8X8_ST7586S_YMC240160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_ymc240160, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7586S_YMC240160_4W_HW_SPI : public U8X8 { + public: U8X8_ST7586S_YMC240160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_ymc240160, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7586S_YMC240160_3W_SW_SPI : public U8X8 { + public: U8X8_ST7586S_YMC240160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_ymc240160, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7586S_YMC240160_6800 : public U8X8 { + public: U8X8_ST7586S_YMC240160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_ymc240160, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7586S_YMC240160_8080 : public U8X8 { + public: U8X8_ST7586S_YMC240160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7586s_ymc240160, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7588_JLX12864_4W_SW_SPI : public U8X8 { + public: U8X8_ST7588_JLX12864_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST7588_JLX12864_4W_HW_SPI : public U8X8 { + public: U8X8_ST7588_JLX12864_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST7588_JLX12864_3W_SW_SPI : public U8X8 { + public: U8X8_ST7588_JLX12864_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST7588_JLX12864_6800 : public U8X8 { + public: U8X8_ST7588_JLX12864_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7588_JLX12864_8080 : public U8X8 { + public: U8X8_ST7588_JLX12864_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST7588_JLX12864_SW_I2C : public U8X8 { + public: U8X8_ST7588_JLX12864_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST7588_JLX12864_HW_I2C : public U8X8 { + public: U8X8_ST7588_JLX12864_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st7588_jlx12864, u8x8_cad_ssd13xx_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX256128_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX256128_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX256128_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX256128_6800 : public U8X8 { + public: U8X8_ST75256_JLX256128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256128_8080 : public U8X8 { + public: U8X8_ST75256_JLX256128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_WO256X128_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_WO256X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_WO256X128_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_WO256X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_WO256X128_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_WO256X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_WO256X128_6800 : public U8X8 { + public: U8X8_ST75256_WO256X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_WO256X128_8080 : public U8X8 { + public: U8X8_ST75256_WO256X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256128_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX256128_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256128, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_WO256X128_SW_I2C : public U8X8 { + public: U8X8_ST75256_WO256X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_WO256X128_HW_I2C : public U8X8 { + public: U8X8_ST75256_WO256X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_wo256x128, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX256160_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX256160_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX256160_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX256160_6800 : public U8X8 { + public: U8X8_ST75256_JLX256160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256160_8080 : public U8X8 { + public: U8X8_ST75256_JLX256160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256160M_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160M_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX256160M_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160M_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX256160M_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160M_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX256160M_6800 : public U8X8 { + public: U8X8_ST75256_JLX256160M_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256160M_8080 : public U8X8 { + public: U8X8_ST75256_JLX256160M_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256160_ALT_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX256160_ALT_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX256160_ALT_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX256160_ALT_6800 : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256160_ALT_8080 : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX256160_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256160_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX256160_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256160_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX256160M_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256160M_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX256160M_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256160M_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160m, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX256160_ALT_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX256160_ALT_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX256160_ALT_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx256160_alt, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX240160_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX240160_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX240160_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX240160_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX240160_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX240160_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX240160_6800 : public U8X8 { + public: U8X8_ST75256_JLX240160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX240160_8080 : public U8X8 { + public: U8X8_ST75256_JLX240160_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX240160_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX240160_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX240160_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX240160_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx240160, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX25664_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX25664_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX25664_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX25664_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX25664_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX25664_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX25664_6800 : public U8X8 { + public: U8X8_ST75256_JLX25664_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX25664_8080 : public U8X8 { + public: U8X8_ST75256_JLX25664_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX25664_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX25664_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX25664_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX25664_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx25664, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX172104_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX172104_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX172104_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX172104_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX172104_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX172104_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX172104_6800 : public U8X8 { + public: U8X8_ST75256_JLX172104_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX172104_8080 : public U8X8 { + public: U8X8_ST75256_JLX172104_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX172104_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX172104_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX172104_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX172104_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx172104, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75256_JLX19296_4W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX19296_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75256_JLX19296_4W_HW_SPI : public U8X8 { + public: U8X8_ST75256_JLX19296_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75256_JLX19296_3W_SW_SPI : public U8X8 { + public: U8X8_ST75256_JLX19296_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75256_JLX19296_6800 : public U8X8 { + public: U8X8_ST75256_JLX19296_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX19296_8080 : public U8X8 { + public: U8X8_ST75256_JLX19296_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75256_JLX19296_SW_I2C : public U8X8 { + public: U8X8_ST75256_JLX19296_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75256_JLX19296_HW_I2C : public U8X8 { + public: U8X8_ST75256_JLX19296_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75256_jlx19296, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_ST75320_JLX320240_4W_SW_SPI : public U8X8 { + public: U8X8_ST75320_JLX320240_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_ST75320_JLX320240_4W_HW_SPI : public U8X8 { + public: U8X8_ST75320_JLX320240_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_ST75320_JLX320240_3W_SW_SPI : public U8X8 { + public: U8X8_ST75320_JLX320240_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_ST75320_JLX320240_6800 : public U8X8 { + public: U8X8_ST75320_JLX320240_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75320_JLX320240_8080 : public U8X8 { + public: U8X8_ST75320_JLX320240_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_ST75320_JLX320240_SW_I2C : public U8X8 { + public: U8X8_ST75320_JLX320240_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_st75256_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +#if defined U8G2_USE_HW_I2C +class U8X8_ST75320_JLX320240_HW_I2C : public U8X8 { + public: U8X8_ST75320_JLX320240_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_st75320_jlx320240, u8x8_cad_st75256_i2c, u8x8_byte_rtthread_hw_i2c, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +#endif +class U8X8_NT7534_TG12864R_4W_SW_SPI : public U8X8 { + public: U8X8_NT7534_TG12864R_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_nt7534_tg12864r, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_NT7534_TG12864R_4W_HW_SPI : public U8X8 { + public: U8X8_NT7534_TG12864R_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_nt7534_tg12864r, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_NT7534_TG12864R_6800 : public U8X8 { + public: U8X8_NT7534_TG12864R_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_nt7534_tg12864r, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_NT7534_TG12864R_8080 : public U8X8 { + public: U8X8_NT7534_TG12864R_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_nt7534_tg12864r, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_IST3020_ERC19264_4W_SW_SPI : public U8X8 { + public: U8X8_IST3020_ERC19264_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist3020_erc19264, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_IST3020_ERC19264_4W_HW_SPI : public U8X8 { + public: U8X8_IST3020_ERC19264_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist3020_erc19264, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_IST3020_ERC19264_6800 : public U8X8 { + public: U8X8_IST3020_ERC19264_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist3020_erc19264, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_IST3020_ERC19264_8080 : public U8X8 { + public: U8X8_IST3020_ERC19264_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist3020_erc19264, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_IST7920_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_IST7920_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist7920_128x128, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_IST7920_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_IST7920_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist7920_128x128, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_IST7920_128X128_6800 : public U8X8 { + public: U8X8_IST7920_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist7920_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_IST7920_128X128_8080 : public U8X8 { + public: U8X8_IST7920_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ist7920_128x128, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SBN1661_122X32 : public U8X8 { + public: U8X8_SBN1661_122X32(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sbn1661_122x32, u8x8_cad_001, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8X8_SED1520_122X32 : public U8X8 { + public: U8X8_SED1520_122X32(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sed1520_122x32, u8x8_cad_001, u8x8_byte_sed1520, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_SED1520(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset); + } +}; +class U8X8_KS0108_128X64 : public U8X8 { + public: U8X8_KS0108_128X64(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ks0108_128x64, u8x8_cad_001, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8X8_KS0108_ERM19264 : public U8X8 { + public: U8X8_KS0108_ERM19264(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ks0108_erm19264, u8x8_cad_001, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8X8_T7932_150X32 : public U8X8 { + public: U8X8_T7932_150X32(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t7932_150x32, u8x8_cad_001, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8X8_HD44102_100X64 : public U8X8 { + public: U8X8_HD44102_100X64(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_hd44102_100x64, u8x8_cad_001, u8x8_byte_ks0108, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_KS0108(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset); + } +}; +class U8X8_LC7981_160X80_6800 : public U8X8 { + public: U8X8_LC7981_160X80_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_lc7981_160x80, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_LC7981_160X160_6800 : public U8X8 { + public: U8X8_LC7981_160X160_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_lc7981_160x160, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_LC7981_240X128_6800 : public U8X8 { + public: U8X8_LC7981_240X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_lc7981_240x128, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_LC7981_240X64_6800 : public U8X8 { + public: U8X8_LC7981_240X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_lc7981_240x64, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_T6963_240X128_8080 : public U8X8 { + public: U8X8_T6963_240X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t6963_240x128, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_T6963_240X64_8080 : public U8X8 { + public: U8X8_T6963_240X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t6963_240x64, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_T6963_256X64_8080 : public U8X8 { + public: U8X8_T6963_256X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t6963_256x64, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_T6963_128X64_8080 : public U8X8 { + public: U8X8_T6963_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t6963_128x64, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_T6963_128X64_ALT_8080 : public U8X8 { + public: U8X8_T6963_128X64_ALT_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t6963_128x64_alt, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_T6963_160X80_8080 : public U8X8 { + public: U8X8_T6963_160X80_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_t6963_160x80, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1320_160X32_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1320_160X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x32, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1320_160X32_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1320_160X32_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x32, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1320_160X32_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1320_160X32_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x32, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1320_160X32_6800 : public U8X8 { + public: U8X8_SSD1320_160X32_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x32, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1320_160X32_8080 : public U8X8 { + public: U8X8_SSD1320_160X32_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x32, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1320_160X132_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1320_160X132_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x132, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1320_160X132_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1320_160X132_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x132, u8x8_cad_001, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1320_160X132_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1320_160X132_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x132, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1320_160X132_6800 : public U8X8 { + public: U8X8_SSD1320_160X132_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x132, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1320_160X132_8080 : public U8X8 { + public: U8X8_SSD1320_160X132_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1320_160x132, u8x8_cad_001, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1322_NHD_256X64_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1322_NHD_256X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_256x64, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1322_NHD_256X64_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1322_NHD_256X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_256x64, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1322_NHD_256X64_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1322_NHD_256X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_256x64, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1322_NHD_256X64_6800 : public U8X8 { + public: U8X8_SSD1322_NHD_256X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_256x64, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1322_NHD_256X64_8080 : public U8X8 { + public: U8X8_SSD1322_NHD_256X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_256x64, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1322_NHD_128X64_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1322_NHD_128X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_128x64, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1322_NHD_128X64_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1322_NHD_128X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_128x64, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1322_NHD_128X64_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1322_NHD_128X64_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_128x64, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1322_NHD_128X64_6800 : public U8X8 { + public: U8X8_SSD1322_NHD_128X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_128x64, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1322_NHD_128X64_8080 : public U8X8 { + public: U8X8_SSD1322_NHD_128X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1322_nhd_128x64, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1606_172X72_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1606_172X72_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1606_172x72, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1606_172X72_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1606_172X72_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1606_172x72, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1606_172X72_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1606_172X72_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1606_172x72, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1607_200X200_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1607_200X200_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_200x200, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1607_200X200_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1607_200X200_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_200x200, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1607_200X200_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1607_200X200_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_200x200, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1607_GD_200X200_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1607_GD_200X200_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_gd_200x200, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1607_GD_200X200_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1607_GD_200X200_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_gd_200x200, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1607_GD_200X200_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1607_GD_200X200_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_gd_200x200, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1607_WS_200X200_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1607_WS_200X200_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_ws_200x200, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_SSD1607_WS_200X200_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1607_WS_200X200_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_ws_200x200, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_SSD1607_WS_200X200_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1607_WS_200X200_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1607_ws_200x200, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_IL3820_296X128_4W_SW_SPI : public U8X8 { + public: U8X8_IL3820_296X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_il3820_296x128, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_IL3820_296X128_4W_HW_SPI : public U8X8 { + public: U8X8_IL3820_296X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_il3820_296x128, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_IL3820_296X128_3W_SW_SPI : public U8X8 { + public: U8X8_IL3820_296X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_il3820_296x128, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_IL3820_V2_296X128_4W_SW_SPI : public U8X8 { + public: U8X8_IL3820_V2_296X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_il3820_v2_296x128, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_IL3820_V2_296X128_4W_HW_SPI : public U8X8 { + public: U8X8_IL3820_V2_296X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_il3820_v2_296x128, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_IL3820_V2_296X128_3W_SW_SPI : public U8X8 { + public: U8X8_IL3820_V2_296X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_il3820_v2_296x128, u8x8_cad_011, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SED1330_240X128_6800 : public U8X8 { + public: U8X8_SED1330_240X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sed1330_240x128, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SED1330_240X128_8080 : public U8X8 { + public: U8X8_SED1330_240X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_sed1330_240x128, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_RA8835_NHD_240X128_6800 : public U8X8 { + public: U8X8_RA8835_NHD_240X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ra8835_nhd_240x128, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_RA8835_NHD_240X128_8080 : public U8X8 { + public: U8X8_RA8835_NHD_240X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ra8835_nhd_240x128, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_RA8835_320X240_6800 : public U8X8 { + public: U8X8_RA8835_320X240_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ra8835_320x240, u8x8_cad_100, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_RA8835_320X240_8080 : public U8X8 { + public: U8X8_RA8835_320X240_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ra8835_320x240, u8x8_cad_100, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_MAX7219_64X8_4W_SW_SPI : public U8X8 { + public: U8X8_MAX7219_64X8_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_max7219_64x8, u8x8_cad_empty, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_MAX7219_64X8_4W_HW_SPI : public U8X8 { + public: U8X8_MAX7219_64X8_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_max7219_64x8, u8x8_cad_empty, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_MAX7219_32X8_4W_SW_SPI : public U8X8 { + public: U8X8_MAX7219_32X8_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_max7219_32x8, u8x8_cad_empty, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_MAX7219_32X8_4W_HW_SPI : public U8X8 { + public: U8X8_MAX7219_32X8_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_max7219_32x8, u8x8_cad_empty, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_MAX7219_8X8_4W_SW_SPI : public U8X8 { + public: U8X8_MAX7219_8X8_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_max7219_8x8, u8x8_cad_empty, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_MAX7219_8X8_4W_HW_SPI : public U8X8 { + public: U8X8_MAX7219_8X8_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_max7219_8x8, u8x8_cad_empty, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_S1D15E06_160100_4W_SW_SPI : public U8X8 { + public: U8X8_S1D15E06_160100_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15e06_160100, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_S1D15E06_160100_4W_HW_SPI : public U8X8 { + public: U8X8_S1D15E06_160100_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15e06_160100, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_S1D15E06_160100_6800 : public U8X8 { + public: U8X8_S1D15E06_160100_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15e06_160100, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_S1D15E06_160100_8080 : public U8X8 { + public: U8X8_S1D15E06_160100_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15e06_160100, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_S1D15721_240X64_4W_SW_SPI : public U8X8 { + public: U8X8_S1D15721_240X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15721_240x64, u8x8_cad_011, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +#if defined U8G2_USE_HW_SPI +class U8X8_S1D15721_240X64_4W_HW_SPI : public U8X8 { + public: U8X8_S1D15721_240X64_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15721_240x64, u8x8_cad_011, u8x8_byte_rtthread_4wire_hw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +#endif +class U8X8_S1D15721_240X64_6800 : public U8X8 { + public: U8X8_S1D15721_240X64_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15721_240x64, u8x8_cad_011, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_S1D15721_240X64_8080 : public U8X8 { + public: U8X8_S1D15721_240X64_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_s1d15721_240x64, u8x8_cad_011, u8x8_byte_8bit_8080mode, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; + +#endif // U8X8_USE_PINS + +#endif // U8X8LIB_HH diff --git a/sys/rt-thread/port/u8g2_port.c b/sys/rt-thread/port/u8g2_port.c index dfaf3dda..92aa197f 100644 --- a/sys/rt-thread/port/u8g2_port.c +++ b/sys/rt-thread/port/u8g2_port.c @@ -1,5 +1,4 @@ #include "u8g2_port.h" -#include #include #define MAX_RETRY 3 @@ -53,43 +52,44 @@ int rt_hw_spi_config(uint8_t spi_mode, uint32_t max_hz, uint8_t cs_pin ) } #endif /* U8G2_USE_HW_SPI */ -uint8_t u8x8_rt_gpio_and_delay(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +uint8_t u8x8_gpio_and_delay_rtthread(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) { + uint8_t i; switch(msg) { - case U8X8_MSG_DELAY_NANO: // delay arg_int * 1 nano second + case U8X8_MSG_DELAY_NANO: // delay arg_int * 1 nano second __asm__ volatile("nop"); break; - - case U8X8_MSG_DELAY_100NANO: // delay arg_int * 100 nano seconds + + case U8X8_MSG_DELAY_100NANO: // delay arg_int * 100 nano seconds __asm__ volatile("nop"); break; - - case U8X8_MSG_DELAY_10MICRO: // delay arg_int * 10 micro seconds + + case U8X8_MSG_DELAY_10MICRO: // delay arg_int * 10 micro seconds for (uint16_t n = 0; n < 320; n++) { __asm__ volatile("nop"); } break; - - case U8X8_MSG_DELAY_MILLI: // delay arg_int * 1 milli second - rt_thread_delay(arg_int); + + case U8X8_MSG_DELAY_MILLI: // delay arg_int * 1 milli second + rt_thread_mdelay(arg_int); break; - + case U8X8_MSG_GPIO_AND_DELAY_INIT: // Function which implements a delay, arg_int contains the amount of ms - + // set spi pin mode - rt_pin_mode(u8x8->pins[U8X8_PIN_SPI_CLOCK],PIN_MODE_OUTPUT);//d0 a5 15 d1 a7 17 res b0 18 dc b1 19 cs a4 14 + rt_pin_mode(u8x8->pins[U8X8_PIN_SPI_CLOCK],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_SPI_DATA],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_RESET],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_DC],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_CS],PIN_MODE_OUTPUT); - + // set i2c pin mode rt_pin_mode(u8x8->pins[U8X8_PIN_I2C_DATA],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_I2C_CLOCK],PIN_MODE_OUTPUT); - + // set 8080 pin mode rt_pin_mode(u8x8->pins[U8X8_PIN_D0],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_D1],PIN_MODE_OUTPUT); @@ -102,7 +102,15 @@ uint8_t u8x8_rt_gpio_and_delay(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void rt_pin_mode(u8x8->pins[U8X8_PIN_E],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_DC],PIN_MODE_OUTPUT); rt_pin_mode(u8x8->pins[U8X8_PIN_RESET],PIN_MODE_OUTPUT); - + + // set menu pin mode + rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_HOME],PIN_MODE_INPUT_PULLUP); + rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_SELECT],PIN_MODE_INPUT_PULLUP); + rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_PREV],PIN_MODE_INPUT_PULLUP); + rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_NEXT],PIN_MODE_INPUT_PULLUP); + rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_UP],PIN_MODE_INPUT_PULLUP); + rt_pin_mode(u8x8->pins[U8X8_PIN_MENU_DOWN],PIN_MODE_INPUT_PULLUP); + // set value rt_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK],1); rt_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA],1); @@ -110,7 +118,7 @@ uint8_t u8x8_rt_gpio_and_delay(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void rt_pin_write(u8x8->pins[U8X8_PIN_DC],1); rt_pin_write(u8x8->pins[U8X8_PIN_CS],1); break; - + case U8X8_MSG_DELAY_I2C: // arg_int is the I2C speed in 100KHz, e.g. 4 = 400 KHz // arg_int=1: delay by 5us, arg_int = 4: delay by 1.25us @@ -126,101 +134,107 @@ uint8_t u8x8_rt_gpio_and_delay(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void //case U8X8_MSG_GPIO_D1: // D1 or SPI data pin: Output level in arg_int //case U8X8_MSG_GPIO_SPI_DATA: - case U8X8_MSG_GPIO_D2: // D2 pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_D2],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_D2],0); + case U8X8_MSG_GPIO_D2: // D2 pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_D2],arg_int); break; - case U8X8_MSG_GPIO_D3: // D3 pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_D3],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_D3],0); + case U8X8_MSG_GPIO_D3: // D3 pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_D3], arg_int); break; - case U8X8_MSG_GPIO_D4: // D4 pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_D4],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_D4],0); + case U8X8_MSG_GPIO_D4: // D4 pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_D4], arg_int); break; - case U8X8_MSG_GPIO_D5: // D5 pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_D5],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_D5],0); + case U8X8_MSG_GPIO_D5: // D5 pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_D5], arg_int); break; - case U8X8_MSG_GPIO_D6: // D6 pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_D6],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_D6],0); + case U8X8_MSG_GPIO_D6: // D6 pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_D6], arg_int); break; - case U8X8_MSG_GPIO_D7: // D7 pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_D7],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_D7],0); + case U8X8_MSG_GPIO_D7: // D7 pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_D7], arg_int); break; - case U8X8_MSG_GPIO_E: // E/WR pin: Output level in arg_int - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_E],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_E],0); + case U8X8_MSG_GPIO_E: // E/WR pin: Output level in arg_int + rt_pin_write(u8x8->pins[U8X8_PIN_E], arg_int); break; case U8X8_MSG_GPIO_I2C_CLOCK: // arg_int=0: Output low at I2C clock pin // arg_int=1: Input dir with pullup high for I2C clock pin - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_I2C_CLOCK],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_I2C_CLOCK],0); + rt_pin_write(u8x8->pins[U8X8_PIN_I2C_CLOCK], arg_int); break; case U8X8_MSG_GPIO_I2C_DATA: // arg_int=0: Output low at I2C data pin // arg_int=1: Input dir with pullup high for I2C data pin - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_I2C_DATA],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_I2C_DATA],0); - break; + rt_pin_write(u8x8->pins[U8X8_PIN_I2C_DATA], arg_int); + break; case U8X8_MSG_GPIO_SPI_CLOCK: - //Function to define the logic level of the clockline - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK],0); + // Function to define the logic level of the clockline + rt_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK], arg_int); break; case U8X8_MSG_GPIO_SPI_DATA: - //Function to define the logic level of the data line to the display - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA],0); + // Function to define the logic level of the data line to the display + rt_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA], arg_int); break; case U8X8_MSG_GPIO_CS: // Function to define the logic level of the CS line - if(arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_CS],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_CS],0); + rt_pin_write(u8x8->pins[U8X8_PIN_CS], arg_int); break; case U8X8_MSG_GPIO_DC: - //Function to define the logic level of the Data/ Command line - if(arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_DC],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_DC],0); + // Function to define the logic level of the Data/ Command line + rt_pin_write(u8x8->pins[U8X8_PIN_DC], arg_int); break; case U8X8_MSG_GPIO_RESET: - //Function to define the logic level of the RESET line - if (arg_int) rt_pin_write(u8x8->pins[U8X8_PIN_RESET],1); - else rt_pin_write(u8x8->pins[U8X8_PIN_RESET],0); + // Function to define the logic level of the RESET line + rt_pin_write(u8x8->pins[U8X8_PIN_RESET], arg_int); break; default: - //A message was received which is not implemented, return 0 to indicate an error - return 0; + if ( msg >= U8X8_MSG_GPIO(0) ) + { + i = u8x8_GetPinValue(u8x8, msg); + if ( i != U8X8_PIN_NONE ) + { + if ( u8x8_GetPinIndex(u8x8, msg) < U8X8_PIN_OUTPUT_CNT ) + { + rt_pin_write(i, arg_int); + } + else + { + if ( u8x8_GetPinIndex(u8x8, msg) == U8X8_PIN_OUTPUT_CNT ) + { + // call yield() for the first pin only, u8x8 will always request all the pins, so this should be ok + // yield(); + } + u8x8_SetGPIOResult(u8x8, rt_pin_read(i) == 0 ? 0 : 1); + } + } + break; + } + return 0; } return 1; } #if defined U8G2_USE_HW_I2C -uint8_t u8x8_byte_rt_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +uint8_t u8x8_byte_rtthread_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) { /* u8g2/u8x8 will never send more than 32 bytes between START_TRANSFER and END_TRANSFER */ struct rt_i2c_msg msgs; static uint8_t buffer[32]; static uint8_t buf_idx; uint8_t *data; - + rt_uint8_t t = 0; switch(msg) { @@ -279,7 +293,7 @@ uint8_t u8x8_byte_rt_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *ar #endif /* U8G2_USE_HW_I2C */ #if defined U8G2_USE_HW_SPI -uint8_t u8x8_byte_rt_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) { +uint8_t u8x8_byte_rtthread_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) { struct rt_spi_message spi_msg; switch(msg) { @@ -308,7 +322,7 @@ uint8_t u8x8_byte_rt_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, vo break; case U8X8_MSG_BYTE_START_TRANSFER: - u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); + u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level); u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL); break; diff --git a/sys/rt-thread/port/u8g2_port.h b/sys/rt-thread/port/u8g2_port.h index bc522b3e..af2e1033 100644 --- a/sys/rt-thread/port/u8g2_port.h +++ b/sys/rt-thread/port/u8g2_port.h @@ -1,21 +1,23 @@ #ifndef __U8G_PORT_H__ #define __U8G_PORT_H__ +#ifdef __cplusplus + extern "C" { +#endif + #include #include - -#define U8X8_USE_PINS -#include -#include - -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) -#define U8X8_USE_PINS - -#define U8G2_USE_HW_I2C -#define U8G2_USE_HW_SPI - #if defined U8G2_USE_HW_SPI #include +#endif + +#include +#include +#include + +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) + +#if defined U8G2_USE_HW_SPI #ifndef U8G2_SPI_BUS_NAME #define U8G2_SPI_BUS_NAME "spi1" @@ -25,20 +27,24 @@ #define U8G2_SPI_DEVICE_NAME "spi10" #endif - uint8_t u8x8_byte_rt_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); + uint8_t u8x8_byte_rtthread_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); #endif #if defined U8G2_USE_HW_I2C #ifndef U8G2_I2C_DEVICE_NAME - #define U8G2_I2C_DEVICE_NAME "i2c1" + #define U8G2_I2C_DEVICE_NAME "i2c2" #endif - uint8_t u8x8_byte_rt_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); + uint8_t u8x8_byte_rtthread_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); #endif -uint8_t u8x8_rt_gpio_and_delay(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +uint8_t u8x8_gpio_and_delay_rtthread(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); + +#ifdef __cplusplus + } +#endif #endif /* __U8G_PORT_H__ */ diff --git a/sys/rt-thread/tools/Makefile b/sys/rt-thread/tools/Makefile new file mode 100644 index 00000000..8b98dd2d --- /dev/null +++ b/sys/rt-thread/tools/Makefile @@ -0,0 +1,20 @@ +# +# U8g2 codebuilder +# + +CFLAGS = -g -Wall +#CFLAGS = -O4 -Wall + +SRC = codebuild.c + +OBJ = $(SRC:.c=.o) + +codebuild: $(SRC) + $(CC) -Wall -g $(LDFLAGS) $(SRC) -o codebuild + +clean: + -rm ./codebuild codebuild.o + +build: codebuild + ./codebuild + \ No newline at end of file diff --git a/sys/rt-thread/tools/codebuild.c b/sys/rt-thread/tools/codebuild.c new file mode 100644 index 00000000..39dbaf88 --- /dev/null +++ b/sys/rt-thread/tools/codebuild.c @@ -0,0 +1,2619 @@ +/* + + generate and update c/c++ files + this also replaces the buildcpp tool + + + Dec 2018: + There are now two SSD13xx cad procedures: + u8x8_cad_ssd13xx_i2c Put a I2C start/stop around each command and each argument --> many start/stop commands + u8x8_cad_ssd13xx_fast_i2c Put a I2C start/stop around each command+arg sequence --> start/stop is probably halfed --> 4% faster + + + +*/ + + +#include +#include +#include +#include +#include +#include + +/*===========================================*/ + +/* ll_hvline */ +#define U8X8_HVLINE "u8g2_ll_hvline_vertical_top_lsb" + +#define COM_4WSPI 0x0001 +#define COM_3WSPI 0x0002 +#define COM_6800 0x0004 +#define COM_8080 0x0008 +#define COM_I2C 0x0010 +#define COM_ST7920SPI 0x0020 /* mostly identical to COM_4WSPI, but does not use DC */ +#define COM_UART 0x0040 +#define COM_KS0108 0x0080 /* mostly identical to 6800 mode, but has more chip select lines */ +#define COM_SED1520 0x0100 + +struct interface +{ + const char *interface_name; /* SW_SPI */ + const char *setpin_function; /* u8x8_SetPin_4Wire_SW_SPI */ + const char *rtthread_com_procedure; /* u8x8_byte_4wire_sw_spi */ + const char *rtthread_gpio_procedure; /* u8x8_gpio_and_delay_rtthread */ + const char *pins_with_type; /* uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE */ + const char *pins_plain; /* clock, data, cs, dc, reset */ + const char *pins_md_plain; /* clock, data, cs, dc, reset */ + const char *generic_com_procedure; /* u8x8_byte_4wire_sw_spi, this is used for documentation, so it suould be generic for all uC architectures */ +}; + + +struct display +{ + /* this name must match the display part of the device procedure */ + /* u8x8_d__ */ + + + const char *name; +}; + +struct controller +{ + /* the name must match the controller part of the device procedure */ + /* u8x8_d__ */ + const char *name; + + int tile_width; + int tile_height; + const char *ll_hvline; + const char *cad; + const char *cad_shortname; + unsigned com; + char *note; + unsigned is_generate_u8g2_class; /* currently not used, instead conrolled by COM_UART */ + struct display display_list[16]; /* usually not used completly, but space does not matter much here */ +}; + +/* issue #649 */ +/* display_controller_list_start */ + +struct controller controller_list[] = +{ + { + "ssd1305", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32_noname" }, + { "128x32_adafruit" }, + { NULL } + } + }, + { + "ssd1305", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32_noname" }, + { "128x32_adafruit" }, + { NULL } + } + }, + + { + "ssd1305", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_adafruit" }, + { "128x64_raystar" }, + { NULL } + } + }, + { + "ssd1305", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_adafruit" }, + { "128x64_raystar" }, + { NULL } + } + }, + + { + "ssd1306", 255, 2, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "2040x16" }, + { NULL } + } + }, + + { + "ssd1306", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname" }, + { "128x64_vcomh0" }, + { "128x64_alt0" }, + { NULL } + } + }, + { + "ssd1306", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname" }, + { "128x64_vcomh0" }, + { "128x64_alt0" }, + { NULL } + } + }, + + { + "ssd1306", 9, 5, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "72x40_er" }, + { NULL } + } + }, + { + "ssd1306", 9, 5, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "72x40_er" }, + { NULL } + } + }, + + { + "sh1106", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname" }, + { "128x64_vcomh0" }, + { "128x64_winstar" }, + { NULL } + } + }, + { + "sh1106", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname" }, + { "128x64_vcomh0" }, + { "128x64_winstar" }, + { NULL } + } + }, + + { + "sh1106", 9, 5, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "72x40_wise" }, + { NULL } + } + }, + { + "sh1106", 9, 5, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "72x40_wise" }, + { NULL } + } + }, + + { + "sh1106", 8, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "64x32" }, + { NULL } + } + }, + { + "sh1106", 8, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "64x32" }, + { NULL } + } + }, + + { + "sh1107", 8, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "64x128" }, + { NULL } + } + }, + { + "sh1107", 8, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "64x128" }, + { NULL } + } + }, + + { + "sh1107", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "seeed_96x96" }, + { NULL } + } + }, + { + "sh1107", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "seeed_96x96" }, + { NULL } + } + }, + + { + "sh1107", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x128" }, // not tested + { "pimoroni_128x128" }, // not tested + { "seeed_128x128" }, // in lab + { NULL } + } + }, + { + "sh1107", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x128" }, // not tested + { "pimoroni_128x128" }, // not tested + { "seeed_128x128" }, // in lab + { NULL } + } + }, + + { + "sh1108", 20, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "160x160" }, + { NULL } + } + }, + { + "sh1108", 20, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "160x160" }, + { NULL } + } + }, + + { + "sh1122", 32, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "256x64" }, + { NULL } + } + }, + { + "sh1122", 32, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "256x64" }, + { NULL } + } + }, + + { + "ssd1306", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32_univision" }, + { "128x32_winstar" }, + { NULL } + } + }, + { + "ssd1306", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32_univision" }, + { "128x32_winstar" }, + { NULL } + } + }, + + + { + "sh1106", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32_visionox" }, + { NULL } + } + }, + { + "sh1106", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32_visionox" }, + { NULL } + } + }, + + { + "ssd1306", 8, 6, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x48_er" }, + { NULL } + } + }, + { + "ssd1306", 8, 6, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x48_er" }, + { NULL } + } + }, + + { + "ssd1306", 6, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "48x64_winstar" }, + { NULL } + } + }, + { + "ssd1306", 6, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "48x64_winstar" }, + { NULL } + } + }, + + + { + "ssd1306", 8, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x32_noname" }, + { "64x32_1f" }, + { NULL } + } + }, + { + "ssd1306", 8, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x32_noname" }, + { "64x32_1f" }, + { NULL } + } + }, + + { + "ssd1306", 12, 2, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "96x16_er" }, + { NULL } + } + }, + { + "ssd1306", 12, 2, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "96x16_er" }, + { NULL } + } + }, + + + { + "ssd1309", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname2" }, + { NULL } + } + }, + { + "ssd1309", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname2" }, + { NULL } + } + }, + + + { + "ssd1309", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname0" }, + { NULL } + } + }, + { + "ssd1309", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64_noname0" }, + { NULL } + } + }, + + /* https://github.com/olikraus/u8g2/issues/919 */ + { + "ssd1316", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32" }, + { NULL } + } + }, + { + "ssd1316", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32" }, + { NULL } + } + }, + + + { + "ssd1317", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "96x96" }, + { NULL } + } + }, + { + "ssd1317", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "96x96" }, + { NULL } + } + }, + + /* issue 784 */ + { + "ssd1318", 16, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x96" }, + { "128x96_xcp" }, // with external charge pump + { NULL } + } + }, + { + "ssd1318", 16, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_fast_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x96" }, + { "128x96_xcp" }, // with external charge pump + { NULL } + } + }, + + + { + "ssd1325", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "nhd_128x64" }, + { NULL } + } + }, + { + "ssd1325", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "nhd_128x64" }, + { NULL } + } + }, + + { + "ssd0323", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "os128064" }, + { NULL } + } + }, + { + "ssd0323", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "os128064" }, + { NULL } + } + }, + + + { + "ssd1326", 32, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "er_256x32" }, + { NULL } + } + }, + { + "ssd1326", 32, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "er_256x32" }, + { NULL } + } + }, + + + { + "ssd1327", 12, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ws_96x64" }, + { NULL } + } + }, + { + "ssd1327", 12, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "ws_96x64" }, + { NULL } + } + }, + + { + "ssd1327", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "seeed_96x96" }, + { NULL } + } + }, + { + "ssd1327", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "seeed_96x96" }, + { NULL } + } + }, + + { + "ssd1327", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_w128128" }, + { "midas_128x128" }, + { "ws_128x128" }, + { NULL } + } + }, + { + "ssd1327", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_w128128" }, + { "midas_128x128" }, + { "ws_128x128" }, + { NULL } + } + }, + + { + "ssd1327", 16, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "visionox_128x96" }, + { NULL } + } + }, + { + "ssd1327", 16, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "visionox_128x96" }, + { NULL } + } + }, + + + { + "ssd1329", 16, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x96_noname" }, + { NULL } + } + }, + + { + "ssd1329", 12, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "96x96_noname" }, + { NULL } + } + }, + + { + "ld7032", 8, 4, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_011", "", COM_4WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "60x32" }, + { "60x32_alt" }, + { NULL } + } + }, + { + "ld7032", 8, 4, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_ld7032_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "60x32" }, + { "60x32_alt" }, + { NULL } + } + }, + { + "st7920", 24, 4, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "p", COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "192x32" }, + { NULL } + } + }, + { + "st7920", 24, 4, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_6800, + "", /* is_generate_u8g2_class= */ 1, + { + { "192x32" }, + { NULL } + } + }, + { + "st7920", 24, 4, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_st7920_spi", "s", COM_ST7920SPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "192x32" }, + { NULL } + } + }, + { + "st7920", 16, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "p", COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { NULL } + } + }, + { + "st7920", 16, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_6800, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { NULL } + } + }, + { + "st7920", 16, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_st7920_spi", "s", COM_ST7920SPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { NULL } + } + }, + { + "ls013b7dh03", 16, 16, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_4WSPI, /* cad procedure is not required (no DC for this display) so it could be a dummy procedure here */ + "", /* is_generate_u8g2_class= */ 1, + { + { "128x128" }, + { NULL } + } + }, + { + "ls027b7dh01", 50, 30, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_4WSPI, /* cad procedure is not required (no DC for this display) so it could be a dummy procedure here */ + "", /* is_generate_u8g2_class= */ 1, + { + { "400x240" }, // SPI Mode 2 + { "m0_400x240" }, // SPI Mode 0 + { NULL } + } + }, + { + "ls013b7dh05", 18, 21, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_001", "", COM_4WSPI, /* cad procedure is not required (no DC for this display) so it could be a dummy procedure here */ + "", /* is_generate_u8g2_class= */ 1, + { + { "144x168" }, + { NULL } + } + }, + { + "uc1701", 13, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogs102" }, + { NULL } + } + }, + { + "uc1701", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "mini12864" }, + { NULL } + } + }, + { + "pcd8544", 11, 6, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI, + "No HW flip", /* is_generate_u8g2_class= */ 1, + { + { "84x48" }, + { NULL } + } + }, + { + "pcf8812", 12, 9, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI, + "No HW flip", /* is_generate_u8g2_class= */ 1, + { + { "96x65" }, + { NULL } + } + }, + { + "hx1230", 12, 9, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI, + "No HW flip", /* is_generate_u8g2_class= */ 1, + { + { "96x68" }, + { NULL } + } + }, + { + "uc1604", 24, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx19264" }, + { NULL } + } + }, + { + "uc1604", 24, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx19264" }, + { NULL } + } + }, + { + "uc1608", 30, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc24064" }, + { "dem240064" }, + { NULL } + } + }, + { + "uc1608", 30, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc24064" }, + { "dem240064" }, + { NULL } + } + }, + { + "uc1608", 30, 15, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc240120" }, + { NULL } + } + }, + { + "uc1608", 30, 15, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc240120" }, + { NULL } + } + }, + { + "uc1608", 30, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "240x128" }, + { NULL } + } + }, + { + "uc1608", 30, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "240x128" }, + { NULL } + } + }, + + { + "uc1638", 20, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "160x128" }, + { NULL } + } + }, + + { + "uc1638", 24, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "192x96" }, + { NULL } + } + }, + { + "uc1638", 24, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc1638_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "192x96" }, + { NULL } + } + }, + + //{ + /* this device requires cd=1 for arguments, not clear whether the u8x8_cad_uc16xx_i2c works */ + //"uc1638", 20, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + //"", /* is_generate_u8g2_class= */ 1, + //{ + // { "160x128" }, + // { NULL } + //} + //}, + + { + "uc1610", 20, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "3W SPI not tested", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogxl160" }, + { NULL } + } + }, + { + "uc1610", 20, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "3W SPI not tested, I2C not tested", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogxl160" }, + { NULL } + } + }, + { + "uc1611", 30, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogm240" }, + { NULL } + } + }, + { + "uc1611", 30, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogm240" }, + { NULL } + } + }, + { + "uc1611", 30, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogxl240" }, + { NULL } + } + }, + { + "uc1611", 30, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogxl240" }, + { NULL } + } + }, + { + "uc1611", 30, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "240x160, active high chip select", /* is_generate_u8g2_class= */ 1, + { + { "ew50850" }, /* 240x160 */ + { NULL } + } + }, + { + "uc1611", 30, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "240x160, active high chip select", /* is_generate_u8g2_class= */ 1, + { + { "ew50850" }, /* 240x160 */ + { NULL } + } + }, + + { + "uc1611", 20, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "use CS0 as chips select", /* is_generate_u8g2_class= */ 1, + { + { "cg160160" }, + { NULL } + } + }, + { + "uc1611", 20, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "cg160160" }, + { NULL } + } + }, + { + "uc1611", 32, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ids4073" }, + { NULL } + } + }, + { + "uc1611", 32, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "ids4073" }, + { NULL } + } + }, + + + { + "st7511", 40, 30, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "avd_320x240" }, /* 320x240 */ + { NULL } + } + }, + + { + "st7528", 20, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "nhd_c160100" }, + { NULL } + } + }, + { + "st7528", 20, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "nhd_c160100" }, + { NULL } + } + }, + + { + "st7528", 20, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc16064" }, + { NULL } + } + }, + { + "st7528", 20, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc16064" }, + { NULL } + } + }, + + + + { + "uc1617", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx128128" }, + { NULL } + } + }, + { + "uc1617", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx128128" }, + { NULL } + } + }, + + { + "st7565", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogm128" }, + { "lm6063" }, /* https://github.com/olikraus/u8g2/issues/893 */ + { "64128n" }, + { "zolen_128x64" }, + { "lm6059" }, + { "ks0713" }, /* KS0713 chip, which seems to be almost compatible to ST7565 */ + { "lx12864" }, + { "erc12864" }, + { "erc12864_alt" }, /* issue 790 */ + { "nhd_c12864" }, + { "jlx12864" }, + { NULL } + }, + }, + { + "st7565", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "nhd_c12832" }, + { NULL } + } + }, + + { + "uc1601", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32" }, + { NULL } + } + }, + { + "uc1601", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x32" }, + { NULL } + } + }, + + { + "uc1601", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { NULL } + } + }, + { + "uc1601", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_uc16xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { NULL } + } + }, + + { + "st7565", 17, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "ea_dogm132" }, + { NULL } + } + }, + { + "st7567", 17, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "pi_132x64" }, + { NULL } + } + }, + + { + "st7567", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx12864" }, + { "enh_dg128064" }, + { "enh_dg128064i" }, + { "os12864" }, + { NULL } + } + }, + + { + "st7567", 8, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x32" }, + { "hem6432" }, + { NULL } + } + }, + { + "st7567", 8, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x32" }, + { "hem6432" }, + { NULL } + } + }, + + { + "st7571", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x128" }, + { NULL } + } + }, + { + "st7571", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x128" }, + { NULL } + } + }, + + + { + "st7586s", 48, 17, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_011", "", COM_4WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "s028hn118a" }, + { NULL } + }, + }, + + { + "st7586s", 30, 20, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc240160" }, + { "ymc240160" }, + { NULL } + }, + }, + + { + "st7588", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx12864" }, + { NULL } + }, + }, + { /* the ST7588 has the same I2C protocol as the SSD13xx */ + "st7588", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_ssd13xx_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx12864" }, + { NULL } + } + }, + + { + "st75256", 32, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx256128" }, + { "wo256x128" }, + { NULL } + }, + }, + /* the ST75256 has the same I2C protocol as the SSD13xx, BUT: for arguments have the data bit set!!!! */ + /* this means, we need to implement a u8x8_cad_ssd13xx_i2c procedure with cad 011 functionality */ + /* done: u8x8_cad_st75256_i2c */ + { + "st75256", 32, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx256128" }, + { "wo256x128" }, + { NULL } + } + }, + + { + "st75256", 32, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx256160" }, + { "jlx256160m" }, + { "jlx256160_alt" }, + { NULL } + }, + }, + /* the ST75256 has the same I2C protocol as the SSD13xx, BUT: for arguments have the data bit set!!!! */ + /* this means, we need to implement a u8x8_cad_ssd13xx_i2c procedure with cad 011 functionality */ + /* done: u8x8_cad_st75256_i2c */ + { + "st75256", 32, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx256160" }, + { "jlx256160m" }, + { "jlx256160_alt" }, + { NULL } + } + }, + + + { + "st75256", 30, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx240160" }, + { NULL } + }, + }, + { + "st75256", 30, 20, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx240160" }, + { NULL } + } + }, + + { + "st75256", 32, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx25664" }, + { NULL } + }, + }, + { + "st75256", 32, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx25664" }, + { NULL } + } + }, + + { + "st75256", 22, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx172104" }, + { NULL } + }, + }, + + { + "st75256", 22, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx172104" }, + { NULL } + }, + }, + + { + "st75256", 24, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx19296" }, + { NULL } + }, + }, + + { + "st75256", 24, 12, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx19296" }, + { NULL } + }, + }, + + { + "st75320", 40, 30, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx320240" }, + { NULL } + }, + }, + + { + "st75320", 40, 30, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_st75256_i2c", "i2c", COM_I2C, + "", /* is_generate_u8g2_class= */ 1, + { + { "jlx320240" }, + { NULL } + }, + }, + + + { + "nt7534", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "tg12864r" }, + { NULL } + } + }, + { + "ist3020", 24, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "erc19264" }, + { NULL } + } + }, + { + "ist7920", 16, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x128" }, + { NULL } + } + }, + + { + "sbn1661", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_SED1520, + "", /* is_generate_u8g2_class= */ 1, + { + { "122x32" }, + { NULL } + }, + }, + { + "sed1520", 16, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_SED1520, + "", /* is_generate_u8g2_class= */ 1, + { + { "122x32" }, + { NULL } + }, + }, + + { + "ks0108", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_KS0108, + "", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { NULL } + }, + }, + { + "ks0108", 24, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_KS0108, + "", /* is_generate_u8g2_class= */ 1, + { + { "erm19264" }, + { NULL } + }, + }, + + { + "t7932", 19, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_KS0108, + "", /* is_generate_u8g2_class= */ 1, + { + { "150x32" }, /* compatible with hd44102 */ + { NULL } + }, + }, + + { + "hd44102", 13, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_KS0108, + "", /* is_generate_u8g2_class= */ 1, + { + { "100x64" }, /* compatible with t7932 */ + { NULL } + }, + }, + + + { + "lc7981", 20, 10, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800, + "U8x8 not supported, no powerdown, no HW flip, no constrast", /* is_generate_u8g2_class= */ 1, + { + { "160x80" }, + { NULL } + } + }, + { + "lc7981", 20, 20, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800, + "U8x8 not supported, no powerdown, no HW flip, no constrast", /* is_generate_u8g2_class= */ 1, + { + { "160x160" }, + { NULL } + } + }, + { + "lc7981", 30, 16, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800, + "U8x8 not supported, no powerdown, no HW flip, no constrast", /* is_generate_u8g2_class= */ 1, + { + { "240x128" }, + { NULL } + } + }, + { + "lc7981", 30, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800, + "U8x8 not supported, no powerdown, no HW flip, no constrast", /* is_generate_u8g2_class= */ 1, + { + { "240x64" }, + { NULL } + } + }, + + { + "t6963", 30, 16, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "240x128" }, + { NULL } + } + }, + { + "t6963", 30, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "240x64" }, + { NULL } + } + }, + { + "t6963", 32, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "256x64" }, + { NULL } + } + }, + { + "t6963", 16, 8, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "128x64" }, + { "128x64_alt" }, + { NULL } + } + }, + { + "t6963", 20, 10, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_8080, + "Not tested", /* is_generate_u8g2_class= */ 1, + { + { "160x80" }, + { NULL } + } + }, + { + "ssd1320", 20, 4, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "160x32" }, + { NULL } + } + }, + { + "ssd1320", 20, 17, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_001", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "160x132" }, + { NULL } + } + }, + + { + "ssd1322", 32, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "Requires U8G2_16BIT (see u8g2.h)", /* is_generate_u8g2_class= */ 1, + { + { "nhd_256x64" }, + { NULL } + } + }, + { + "ssd1322", 16, 8, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "nhd_128x64" }, + { NULL } + } + }, + { + "ssd1606", 22, 9, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI, + "Partly supported by U8x8, no HW flip, no contrast setting", /* is_generate_u8g2_class= */ 1, + { + { "172x72" }, + { NULL } + } + }, + { + "ssd1607", 25, 25, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI, + "Partly supported by U8x8, no HW flip, no contrast setting, v2 includes an optimized LUT", /* is_generate_u8g2_class= */ 1, + { + { "200x200" }, + { "gd_200x200" }, // GDEP015OC1 + { "ws_200x200" }, // Waveshare issue #637 + { NULL } + } + }, + { + "il3820", 37, 16, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI, + "Partly supported by U8x8, no HW flip, no contrast setting, V2 produces lesser screen-flicker", /* is_generate_u8g2_class= */ 1, + { + { "296x128" }, + { "v2_296x128" }, + { NULL } + } + }, + { + "sed1330", 30, 16, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800|COM_8080, + "Not tested, might work for RA8835 and SED1335 also", /* is_generate_u8g2_class= */ 1, + { + { "240x128" }, + { NULL } + } + }, + { + "ra8835", 30, 16, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800|COM_8080, + "Tested with RA8835", /* is_generate_u8g2_class= */ 1, + { + { "nhd_240x128" }, + { NULL } + } + }, + { + "ra8835", 40, 30, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_100", "", COM_6800|COM_8080, + "not tested", /* is_generate_u8g2_class= */ 1, + { + { "320x240" }, + { NULL } + } + }, + { + "max7219", 8, 1, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_empty", "", COM_4WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "64x8" }, + { NULL } + } + }, + { + "max7219", 4, 1, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_empty", "", COM_4WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "32x8" }, + { NULL } + } + }, +#ifdef NOT_POSSIBLE + { + "max7219", 2, 2, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_empty", "", COM_4WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "16x16" }, + { NULL } + } + }, +#endif + { + "max7219", 1, 1, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_empty", "", COM_4WSPI, + "", /* is_generate_u8g2_class= */ 1, + { + { "8x8" }, + { NULL } + } + }, + + { + "s1d15e06", 20, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "160100" }, + { NULL } + } + }, + + { + "s1d15721", 20, 13, "u8g2_ll_hvline_vertical_top_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_6800|COM_8080, + "", /* is_generate_u8g2_class= */ 1, + { + { "240x64" }, + { NULL } + } + }, + + { + "a2printer", 48, 30, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_empty", "", COM_UART, + "", /* is_generate_u8g2_class= */ 0, + { + { "384x240" }, + { NULL } + } + } +}; + +/* display_controller_list_end */ + + +struct interface interface_list[] = +{ + /* 0 */ + { + "4W_SW_SPI", + "u8x8_SetPin_4Wire_SW_SPI", + "u8x8_byte_4wire_sw_spi", /* improved version over u8x8_byte_4wire_sw_spi */ + "u8x8_gpio_and_delay_rtthread", + "uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE", + "clock, data, cs, dc, reset", + "clock, data, cs, dc [, reset]", + "u8x8_byte_4wire_sw_spi" + }, + /* 1 */ + { + "4W_HW_SPI", + "u8x8_SetPin_4Wire_HW_SPI", + "u8x8_byte_rtthread_4wire_hw_spi", + "u8x8_gpio_and_delay_rtthread", + "uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE", + "cs, dc, reset", + "cs, dc [, reset]", + "uC specific" + }, + /* 2 */ + { + "6800", + "u8x8_SetPin_8Bit_6800", + "u8x8_byte_8bit_6800mode", + "u8x8_gpio_and_delay_rtthread", + "uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE", + "d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset", + "d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc [, reset]", + "u8x8_byte_8bit_6800mode" + }, + /* 3 */ + { + "8080", + "u8x8_SetPin_8Bit_8080", + "u8x8_byte_8bit_8080mode", + "u8x8_gpio_and_delay_rtthread", + "uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE", + "d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset", + "d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc [, reset]", + "u8x8_byte_8bit_8080mode" + }, + /* 4 */ + { + "3W_SW_SPI", + "u8x8_SetPin_3Wire_SW_SPI", + "u8x8_byte_3wire_sw_spi", + "u8x8_gpio_and_delay_rtthread", + "uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE", + "clock, data, cs, reset", + "clock, data, cs [, reset]", + "u8x8_byte_3wire_sw_spi" + }, + /* 5 */ + { + "3W_HW_SPI", + "u8x8_SetPin_3Wire_HW_SPI", + "u8x8_byte_arduino_3wire_hw_spi", + "u8x8_gpio_and_delay_rtthread", + "uint8_t cs, uint8_t reset = U8X8_PIN_NONE", + "cs, reset", + "cs [, reset]", + "uC specific" + }, + /* 6 */ + { + "SW_I2C", + "u8x8_SetPin_SW_I2C", + "u8x8_byte_sw_i2c" /* u8x8_byte_sw_i2c */, + "u8x8_gpio_and_delay_rtthread", + "uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE", + "clock, data, reset", + "clock, data [, reset]", + "u8x8_byte_sw_i2c" /* u8x8_byte_sw_i2c */ + }, + /* 7 */ + { + "HW_I2C", + "u8x8_SetPin_HW_I2C", + "u8x8_byte_rtthread_hw_i2c", + "u8x8_gpio_and_delay_rtthread", + "uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE", + "reset, clock, data", + "[reset [, clock, data]]", + "uC specific" + }, + /* 8 */ + { + /* ST7920 */ "SW_SPI", + "u8x8_SetPin_3Wire_SW_SPI", /* use the 3 wire interface, because the DC is not used */ + "u8x8_byte_4wire_sw_spi", /* improved version over u8x8_byte_4wire_sw_spi */ + "u8x8_gpio_and_delay_rtthread", + "uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE", + "clock, data, cs, reset", + "clock, data, cs [, reset]", + "u8x8_byte_4wire_sw_spi", /* "u8x8_byte_st7920_sw_spi" */ + }, + /* 9 */ + { + /* ST7920 */ "HW_SPI", + "u8x8_SetPin_ST7920_HW_SPI", + "u8x8_byte_rtthread_4wire_hw_spi", + "u8x8_gpio_and_delay_rtthread", + "uint8_t cs, uint8_t reset = U8X8_PIN_NONE", + "cs, reset", + "cs [, reset]", + "uC specific" + }, + /* 10 */ + { + "2ND_HW_I2C", + "u8x8_SetPin_HW_I2C", + "u8x8_byte_2nd_hw_i2c", + "u8x8_gpio_and_delay_rtthread", + "uint8_t reset = U8X8_PIN_NONE", + "reset", + "[reset]", + "uC specific" + }, + /* 11 */ + { + "", + "u8x8_SetPin_KS0108", + "u8x8_byte_ks0108", + "u8x8_gpio_and_delay_rtthread", + "uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t dc, uint8_t cs0, uint8_t cs1, uint8_t cs2, uint8_t reset = U8X8_PIN_NONE", + "d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2, reset", + "d0, d1, d2, d3, d4, d5, d6, d7, enable, dc, cs0, cs1, cs2 [, reset]", + "u8x8_byte_ks0108" + }, + /* 12 */ + { + "2ND_4W_HW_SPI", + "u8x8_SetPin_4Wire_HW_SPI", + "u8x8_byte_2nd_hw_spi", + "u8x8_gpio_and_delay_rtthread", + "uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE", + "cs, dc, reset", + "cs, dc [, reset]", + "uC specific" + }, + /* 13 */ + { + "", + "u8x8_SetPin_SED1520", + "u8x8_byte_sed1520", + "u8x8_gpio_and_delay_rtthread", + "uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t dc, uint8_t e1, uint8_t e2, uint8_t reset", + "d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset", + "d0, d1, d2, d3, d4, d5, d6, d7, dc, e1, e2, reset", + "u8x8_byte_sed1520" + }, + /* 14 */ + { + /* ST7920 */ "2ND_HW_SPI", + "u8x8_SetPin_ST7920_HW_SPI", + "u8x8_byte_arduino_2nd_hw_spi", + "u8x8_gpio_and_delay_rtthread", + "uint8_t cs, uint8_t reset = U8X8_PIN_NONE", + "cs, reset", + "cs [, reset]", + "uC specific" + }, + + + +}; + + +/*===========================================*/ + +#define STR_MAX 1024 +char *str_list[STR_MAX]; +int str_cnt = 0; + +int str_exists(const char *s) +{ + int i; + for( i = 0; i < str_cnt; i++ ) + { + if ( strcmp(str_list[i], s) == 0 ) + return 1; + } + return 0; +} + +void str_add(const char *s) +{ + if ( str_exists(s) ) + return; + if ( str_cnt >= STR_MAX ) + { + error(1,0, "max number of strings reached"); + } + else + { + str_list[str_cnt] = strdup(s); + str_cnt++; + } +} + + +/*===========================================*/ + +/* + copy file from source_file_name to dest_file_name +*/ +int file_copy(const char *source_file_name, const char *dest_file_name) +{ + int ch; + FILE *source_fp; + FILE *dest_fp; + + source_fp = fopen(source_file_name, "r"); + dest_fp = fopen(dest_file_name, "w"); + + if ( source_fp == NULL || dest_fp == NULL ) + return 0; + + while( ( ch = fgetc(source_fp) ) != EOF ) + fputc(ch, dest_fp); + + fclose(source_fp); + fclose(dest_fp); + + return 1; +} + + +/* + Insert file "insertname" between lines "start_line" and "end_line" of file "filename" +*/ +int insert_into_file(const char *filename, const char *insertname, const char *start_line, const char *end_line) +{ + int ch; + static char line[1024*4]; + const char *tmpname = "tmp.h"; + FILE *source_fp; + FILE *dest_fp; + FILE *insert_fp; + + if ( file_copy(filename, tmpname) == 0 ) + return 0; + + source_fp = fopen(tmpname, "r"); + dest_fp = fopen(filename, "w"); + insert_fp = fopen(insertname, "r"); + + if ( source_fp == NULL || dest_fp == NULL || insert_fp == NULL ) + return 0; + + for(;;) + { + if ( fgets(line, 1024*4, source_fp) == NULL ) + break; + if ( strncmp(line, start_line, strlen(start_line)) == 0 ) + { + fputs(line, dest_fp); + + while( ( ch = fgetc(insert_fp) ) != EOF ) + fputc(ch, dest_fp); + + fputs("\n", dest_fp); + + for(;;) + { + if ( fgets(line, 1024*4, source_fp) == NULL ) + break; + if ( strncmp(line, end_line, strlen(end_line)) == 0 ) + { + fputs(line, dest_fp); + break; + } + } + } + else + { + fputs(line, dest_fp); + } + } + + fclose(insert_fp); + fclose(source_fp); + fclose(dest_fp); + + unlink(tmpname); + + printf("patched %s\n", filename); + + return 1; +} + +/*===========================================*/ + +char *strlowercase(const char *s) +{ + int i, len = strlen(s); + static char buf[1024]; + for( i = 0; i <= len; i++ ) + buf[i] = tolower(s[i]); + return buf; +} + +char *struppercase(const char *s) +{ + int i, len = strlen(s); + static char buf[1024]; + for( i = 0; i <= len; i++ ) + buf[i] = toupper(s[i]); + return buf; +} + +/*===========================================*/ + +FILE *buf_code_fp; +FILE *buf_header_fp; +FILE *setup_code_fp; +FILE *setup_header_fp; +FILE *u8g2_cpp_header_fp; +FILE *u8x8_cpp_header_fp; + +FILE *u8x8_setup_c_md_fp; +FILE *u8x8_setup_cpp_md_fp; +FILE *u8g2_setup_c_md_fp; +FILE *u8g2_setup_cpp_md_fp; + +const char *get_setup_function_name(int controller_idx, int display_idx, const char *postfix) +{ + static char s[1024]; + strcpy(s, "u8g2_Setup_"); + strcat(s, strlowercase(controller_list[controller_idx].name)); + strcat(s, "_"); + if ( controller_list[controller_idx].cad_shortname[0] != '\0' ) + { + strcat(s, strlowercase(controller_list[controller_idx].cad_shortname)); + strcat(s, "_"); + } + strcat(s, strlowercase(controller_list[controller_idx].display_list[display_idx].name)); + strcat(s, "_"); + strcat(s, postfix); + return s; +} + +void do_setup_prototype(FILE *fp, int controller_idx, int display_idx, const char *postfix) +{ + /* + fprintf(fp, "void u8g2_Setup_"); + fprintf(fp, "%s_", strlowercase(controller_list[controller_idx].name)); + fprintf(fp, "%s_", strlowercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb)", postfix); + */ + fprintf(fp, "void %s", get_setup_function_name(controller_idx, display_idx, postfix)); + fprintf(fp, "(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb)"); +} + +/*===========================================*/ + +/* +class U8X8_SSD1306_128X64_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1306_128X64_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1306_128x64_noname, u8x8_cad_001, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +} +*/ +void do_u8x8_header(int controller_idx, int display_idx, int interface_idx) +{ + FILE *fp = u8x8_cpp_header_fp; + + // Only use HW SPI when available in RT-Thread settings + if (interface_idx == 1) + { + fprintf(fp, "#if defined U8G2_USE_HW_SPI\n"); + } + + // Only use HW I2C when available in RT-Thread settings + if (interface_idx == 7) + { + fprintf(fp, "#if defined U8G2_USE_HW_I2C\n"); + } + + fprintf(fp, "class U8X8_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, " : public U8X8 {\n"); + fprintf(fp, " public: "); + fprintf(fp, "U8X8_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, "(%s) : U8X8() {\n", interface_list[interface_idx].pins_with_type); + fprintf(fp, " "); + fprintf(fp, "u8x8_Setup(getU8x8(), u8x8_d_"); + fprintf(fp, "%s_", strlowercase(controller_list[controller_idx].name)); + fprintf(fp, "%s, ", strlowercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s, ", strlowercase(controller_list[controller_idx].cad)); + fprintf(fp, "%s, ", interface_list[interface_idx].rtthread_com_procedure); + fprintf(fp, "%s);\n", interface_list[interface_idx].rtthread_gpio_procedure); + fprintf(fp, " "); + fprintf(fp, "%s(getU8x8(), ", interface_list[interface_idx].setpin_function); + fprintf(fp, "%s);\n", interface_list[interface_idx].pins_plain); + fprintf(fp, " }\n"); + fprintf(fp, "};\n"); + + // Only use HW SPI when available in RT-Thread settings + if (interface_idx == 1) + { + fprintf(fp, "#endif\n"); + } + + // Only use HW I2C when available in RT-Thread settings + if (interface_idx == 7) + { + fprintf(fp, "#endif\n"); + } +} + +/* +class U8G2_SSD1306_128x64_NONAME_1_SW_SPI : public U8G2 +{ + public: + U8G2_SSD1306_128x64_NONAME_1_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) + { + u8g2_Setup_ssd1306_128x64_noname_1(&u8g2, rotation, u8x8_byte_4wire_sw_spi, u8x8_gpio_and_delay_rtthread,); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +*/ + + +void do_display_interface(int controller_idx, int display_idx, const char *postfix, int interface_idx) +{ + + FILE *fp = u8g2_cpp_header_fp; + + printf(" %s %s", postfix, interface_list[interface_idx].interface_name); + + // Only use HW SPI when available in RT-Thread settings + if (interface_idx == 1) + { + fprintf(fp, "#if defined U8G2_USE_HW_SPI\n"); + } + + // Only use HW I2C when available in RT-Thread settings + if (interface_idx == 7) + { + fprintf(fp, "#if defined U8G2_USE_HW_I2C\n"); + } + + fprintf(fp, "class U8G2_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s", struppercase(postfix)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, " : public U8G2 {\n"); + fprintf(fp, " public: "); + fprintf(fp, "U8G2_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s", struppercase(postfix)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, "(const u8g2_cb_t *rotation, "); + fprintf(fp, "%s) : U8G2() {\n", interface_list[interface_idx].pins_with_type); + fprintf(fp, " "); + /* + fprintf(fp, "u8g2_Setup_"); + fprintf(fp, "%s_", strlowercase(controller_list[controller_idx].name)); + fprintf(fp, "%s_", strlowercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s", postfix); + */ + fprintf(fp, "%s", get_setup_function_name(controller_idx, display_idx, postfix)); + fprintf(fp, "(&u8g2, "); + fprintf(fp, "rotation, "); + fprintf(fp, "%s, ", interface_list[interface_idx].rtthread_com_procedure); + fprintf(fp, "%s);\n", interface_list[interface_idx].rtthread_gpio_procedure); + fprintf(fp, " "); + fprintf(fp, "%s(getU8x8(), ", interface_list[interface_idx].setpin_function); + fprintf(fp, "%s);\n", interface_list[interface_idx].pins_plain); + fprintf(fp, " }\n"); + fprintf(fp, "};\n"); + + // Only use HW SPI when available in RT-Thread settings + if (interface_idx == 1) + { + fprintf(fp, "#endif\n"); + } + + // Only use HW I2C when available in RT-Thread settings + if (interface_idx == 7) + { + fprintf(fp, "#endif\n"); + } + + if ( strcmp(postfix, "1") == 0 ) + do_u8x8_header(controller_idx, display_idx, interface_idx); + +} + + + +/*===========================================*/ + +void do_display(int controller_idx, int display_idx, const char *postfix) +{ + + do_setup_prototype(setup_header_fp, controller_idx, display_idx, postfix); + fprintf(setup_header_fp, ";\n"); + + do_setup_prototype(setup_code_fp, controller_idx, display_idx, postfix); + fprintf(setup_code_fp, "\n"); + fprintf(setup_code_fp, "{\n"); + fprintf(setup_code_fp, " uint8_t tile_buf_height;\n"); + fprintf(setup_code_fp, " uint8_t *buf;\n"); + fprintf(setup_code_fp, " u8g2_SetupDisplay(u8g2, u8x8_d_"); + fprintf(setup_code_fp, "%s_", strlowercase(controller_list[controller_idx].name)); + fprintf(setup_code_fp, "%s, ", strlowercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(setup_code_fp, "%s, ", controller_list[controller_idx].cad); + fprintf(setup_code_fp, "byte_cb, gpio_and_delay_cb);\n"); + fprintf(setup_code_fp, " buf = "); + //fprintf(setup_code_fp, "u8g2_m_%s_%d_%s(&tile_buf_height);\n", strlowercase(controller_list[controller_idx].name), controller_list[controller_idx].tile_width, postfix); + fprintf(setup_code_fp, "u8g2_m_%d_%d_%s(&tile_buf_height);\n", controller_list[controller_idx].tile_width, controller_list[controller_idx].tile_height, postfix); + fprintf(setup_code_fp, " u8g2_SetupBuffer(u8g2, buf, tile_buf_height, %s, rotation);\n", controller_list[controller_idx].ll_hvline); + fprintf(setup_code_fp, "}\n"); + + /* generate interfaces for this display */ + if ( controller_list[controller_idx].com & COM_4WSPI ) + { + do_display_interface(controller_idx, display_idx, postfix, 0); /* SW SPI */ + do_display_interface(controller_idx, display_idx, postfix, 1); /* HW SPI */ + // do_display_interface(controller_idx, display_idx, postfix, 12); /* 2nd HW SPI */ + } + if ( controller_list[controller_idx].com & COM_3WSPI ) + { + do_display_interface(controller_idx, display_idx, postfix, 4); /* 3wire SW SPI */ + // do_display_interface(controller_idx, display_idx, postfix, 5); /* 3wire HW SPI (not implemented) */ + } + if ( controller_list[controller_idx].com & COM_6800 ) + { + do_display_interface(controller_idx, display_idx, postfix, 2); /* 6800 mode */ + } + if ( controller_list[controller_idx].com & COM_8080 ) + { + do_display_interface(controller_idx, display_idx, postfix, 3); /* 8080 mode */ + } + if ( controller_list[controller_idx].com & COM_I2C ) + { + do_display_interface(controller_idx, display_idx, postfix, 6); /* SW I2C */ + do_display_interface(controller_idx, display_idx, postfix, 7); /* HW I2C */ + // do_display_interface(controller_idx, display_idx, postfix, 10); /* 2nd HW I2C */ + } + if ( controller_list[controller_idx].com & COM_ST7920SPI ) + { + do_display_interface(controller_idx, display_idx, postfix, 8); /* ST7920 SW SPI */ + do_display_interface(controller_idx, display_idx, postfix, 9); /* HW SPI */ + // do_display_interface(controller_idx, display_idx, postfix, 14); /* 2ND HW SPI */ + } + if ( controller_list[controller_idx].com & COM_UART ) + { + /* currently there is no RT-Thread C++ interface, instead the interface is created manually in the example */ + } + if ( controller_list[controller_idx].com & COM_KS0108 ) + { + do_display_interface(controller_idx, display_idx, postfix, 11); /* KS0108 6800 parallel mode */ + } + if ( controller_list[controller_idx].com & COM_SED1520 ) + { + do_display_interface(controller_idx, display_idx, postfix, 13); + } + +} + +void do_controller_buffer_code(int idx, const char *postfix, int buf_len, int rows) +{ + int display_idx; + char s[1024]; + //sprintf(s, "u8g2_m_%s_%d_%d_%s", strlowercase(controller_list[idx].name), controller_list[idx].tile_width, controller_list[idx].tile_height, postfix); + /* this should fix #370, additionally the controller is removed (hope that this will not break anything) */ + sprintf(s, "u8g2_m_%d_%d_%s", controller_list[idx].tile_width, controller_list[idx].tile_height, postfix); + + if ( str_exists(s) == 0 ) + { + str_add(s); + //FILE *fp = stdout; + fprintf(buf_code_fp, "uint8_t *%s(uint8_t *page_cnt)\n", s); + fprintf(buf_code_fp, "{\n"); + fprintf(buf_code_fp, " #ifdef U8G2_USE_DYNAMIC_ALLOC\n"); + fprintf(buf_code_fp, " *page_cnt = %d;\n", rows); + fprintf(buf_code_fp, " return 0;\n"); + fprintf(buf_code_fp, " #else\n"); + fprintf(buf_code_fp, " static uint8_t buf[%d];\n", buf_len); + fprintf(buf_code_fp, " *page_cnt = %d;\n", rows); + fprintf(buf_code_fp, " return buf;\n"); + fprintf(buf_code_fp, " #endif\n"); + fprintf(buf_code_fp, "}\n"); + + fprintf(buf_header_fp, "uint8_t *%s(uint8_t *page_cnt);\n", s); + } + + display_idx = 0; + fprintf(setup_code_fp, "/* %s %s */\n", controller_list[idx].name, postfix); + while( controller_list[idx].display_list[display_idx].name != NULL ) + { + do_display(idx, display_idx, postfix); + display_idx++; + } + +} + + + +void do_controller_list(void) +{ + int i; + for( i = 0; i < sizeof(controller_list)/sizeof(*controller_list); i++ ) + { + printf("%s: ",controller_list[i].name); + fprintf(setup_code_fp, "/* %s */\n", controller_list[i].name); + do_controller_buffer_code(i, "1", controller_list[i].tile_width*8, 1); + do_controller_buffer_code(i, "2", controller_list[i].tile_width*8*2, 2); + do_controller_buffer_code(i, "f", controller_list[i].tile_width*8*controller_list[i].tile_height, controller_list[i].tile_height); + printf("\n"); + } +} + + +int is_rtthread_cpp = 1; +int is_u8g2 = 1; +FILE *md_fp; + + +void do_md_display(int controller_idx, int display_idx) +{ + FILE *fp = md_fp; + /* + fprintf(fp, "%s:", controller_list[controller_idx].name); + fprintf(fp, "%s\n", controller_list[controller_idx].display_list[display_idx].name); + */ + + + if ( is_u8g2 ) + { + fprintf(fp, "\n"); + fprintf(fp, "## %s ", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "\n"); +#ifdef MD_TABLES + + fprintf(fp, "| Controller \"%s\", ", controller_list[controller_idx].name); + fprintf(fp, "Display \"%s\" | ", controller_list[controller_idx].display_list[display_idx].name); + fprintf(fp, "Description |\n"); + fprintf(fp, "|---|---|\n"); +#else + fprintf(fp, "Controller \"%s\", ", controller_list[controller_idx].name); + fprintf(fp, "Display \"%s\" ", controller_list[controller_idx].display_list[display_idx].name); + fprintf(fp, "[Description]\n"); +#endif + } + else + { + if ( is_u8g2 != 0 || strcmp(controller_list[controller_idx].ll_hvline, U8X8_HVLINE ) == 0 ) + { + + fprintf(fp, "\n"); + fprintf(fp, "## %s ", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "\n"); + + fprintf(fp, "| Controller \"%s\", ", controller_list[controller_idx].name); + fprintf(fp, "Display \"%s\" |\n", controller_list[controller_idx].display_list[display_idx].name); + fprintf(fp, "|---|\n"); + } + } +} + +void do_md_display_interface_buffer(int controller_idx, int display_idx, int interface_idx, char *postfix, int size, int rows) +{ + FILE *fp = md_fp; + +#ifdef MD_TABLES + if ( is_u8g2 ) + { + if ( is_rtthread_cpp ) + { + fprintf(fp, "| U8G2_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s", struppercase(postfix)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, "(rotation, %s)", interface_list[interface_idx].pins_md_plain); + if ( postfix[0] == 'f' ) + { + fprintf(fp, " | full framebuffer, size = %d bytes |\n", size); + } + else + { + fprintf(fp, " | page buffer, size = %d bytes |\n", size); + } + } + else + { + fprintf(fp, "| "); + fprintf(fp, "%s", get_setup_function_name(controller_idx, display_idx, postfix)); + fprintf(fp, "(u8g2, "); + fprintf(fp, "rotation, "); + fprintf(fp, "%s, ", interface_list[interface_idx].generic_com_procedure); + fprintf(fp, "%s)", "uC specific"); + if ( postfix[0] == 'f' ) + { + fprintf(fp, " | full framebuffer, size = %d bytes |\n", size); + } + else + { + fprintf(fp, " | page buffer, size = %d bytes |\n", size); + } + } + } +#else + if ( is_u8g2 ) + { + if ( is_rtthread_cpp ) + { + fprintf(fp, " * U8G2_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s", struppercase(postfix)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, "(rotation, %s)", interface_list[interface_idx].pins_md_plain); + if ( postfix[0] == 'f' ) + { + fprintf(fp, " [full framebuffer, size = %d bytes]\n", size); + } + else + { + fprintf(fp, " [page buffer, size = %d bytes]\n", size); + } + } + else + { + fprintf(fp, " * "); + fprintf(fp, "%s", get_setup_function_name(controller_idx, display_idx, postfix)); + fprintf(fp, "(u8g2, "); + fprintf(fp, "rotation, "); + fprintf(fp, "%s, ", interface_list[interface_idx].generic_com_procedure); + fprintf(fp, "%s)", "uC specific"); + if ( postfix[0] == 'f' ) + { + fprintf(fp, " [full framebuffer, size = %d bytes]\n", size); + } + else + { + fprintf(fp, " [page buffer, size = %d bytes]\n", size); + } + } + } +#endif +} + +void do_md_display_interface(int controller_idx, int display_idx, int interface_idx) +{ + FILE *fp = md_fp; + + if ( !is_u8g2 ) + { + if ( strcmp(controller_list[controller_idx].ll_hvline, U8X8_HVLINE ) == 0 ) + { + if ( is_rtthread_cpp ) + { + fprintf(fp, "| U8X8_"); + fprintf(fp, "%s_", struppercase(controller_list[controller_idx].name)); + fprintf(fp, "%s", struppercase(controller_list[controller_idx].display_list[display_idx].name)); + if ( interface_list[interface_idx].interface_name[0] != '\0' ) + fprintf(fp, "_%s", struppercase(interface_list[interface_idx].interface_name)); + fprintf(fp, "(%s) |\n", interface_list[interface_idx].pins_md_plain); + } + else + { + + fprintf(fp, "| u8x8_Setup(u8x8_d_"); + fprintf(fp, "%s_", strlowercase(controller_list[controller_idx].name)); + fprintf(fp, "%s, ", strlowercase(controller_list[controller_idx].display_list[display_idx].name)); + fprintf(fp, "%s, ", strlowercase(controller_list[controller_idx].cad)); + fprintf(fp, "%s, ", strlowercase(interface_list[interface_idx].generic_com_procedure)); + fprintf(fp, "uC specific) |\n"); + } + } + } + do_md_display_interface_buffer(controller_idx, display_idx, interface_idx, "1", controller_list[controller_idx].tile_width*8, 1); + do_md_display_interface_buffer(controller_idx, display_idx, interface_idx, "2", controller_list[controller_idx].tile_width*8*2, 2); + do_md_display_interface_buffer(controller_idx, display_idx, interface_idx, "f", controller_list[controller_idx].tile_width*8*controller_list[controller_idx].tile_height, controller_list[controller_idx].tile_height); + +} + +void do_md_controller_list(void) +{ + int controller_idx, display_idx; + + for( controller_idx = 0; controller_idx < sizeof(controller_list)/sizeof(*controller_list); controller_idx++ ) + { + + display_idx = 0; + while( controller_list[controller_idx].display_list[display_idx].name != NULL ) + { + do_md_display(controller_idx, display_idx); + /* generate interfaces for this display */ + if ( controller_list[controller_idx].com & COM_4WSPI ) + { + do_md_display_interface(controller_idx, display_idx, 0); /* SW SPI */ + if ( is_rtthread_cpp ) + { + do_md_display_interface(controller_idx, display_idx, 1); /* HW SPI */ + // do_md_display_interface(controller_idx, display_idx, 12); /* 2nd HW SPI */ + } + } + if ( controller_list[controller_idx].com & COM_3WSPI ) + { + do_md_display_interface(controller_idx, display_idx, 4); /* 3wire SW SPI */ + do_md_display_interface(controller_idx, display_idx, 5); /* 3wire HW SPI (not implemented) */ + } + if ( controller_list[controller_idx].com & COM_6800 ) + { + do_md_display_interface(controller_idx, display_idx, 2); /* 6800 mode */ + } + if ( controller_list[controller_idx].com & COM_8080 ) + { + do_md_display_interface(controller_idx, display_idx, 3); /* 8080 mode */ + } + if ( controller_list[controller_idx].com & COM_I2C ) + { + do_md_display_interface(controller_idx, display_idx, 6); /* SW I2C */ + do_md_display_interface(controller_idx, display_idx, 7); /* HW I2C */ + // do_md_display_interface(controller_idx, display_idx, 10); /* 2nd HW I2C */ + } + if ( controller_list[controller_idx].com & COM_ST7920SPI ) + { + do_md_display_interface(controller_idx, display_idx, 8); /* ST7920 SW SPI */ + do_md_display_interface(controller_idx, display_idx, 9); /* HW SPI (not yet implemented) */ + do_md_display_interface(controller_idx, display_idx, 14); /* 2ND HW SPI */ + } + if ( controller_list[controller_idx].com & COM_KS0108 ) + { + do_md_display_interface(controller_idx, display_idx, 11); /* KS0108 */ + } + if ( controller_list[controller_idx].com & COM_SED1520 ) + { + do_md_display_interface(controller_idx, display_idx, 13); /* SED1520 */ + } + + display_idx++; + } + } +} + + +int main(void) +{ + buf_code_fp = fopen("u8g2_d_memory.c", "w"); + fprintf(buf_code_fp, "/* u8g2_d_memory.c */\n"); + fprintf(buf_code_fp, "/* generated code, codebuild, u8g2 project */\n"); + fprintf(buf_code_fp, "\n"); + fprintf(buf_code_fp, "#include \"u8g2.h\"\n"); + fprintf(buf_code_fp, "\n"); + + buf_header_fp = fopen("u8g2_memory.h", "w"); + //fprintf(buf_header_fp, "/* start of generated code, codebuild, u8g2 project */\n"); + + setup_code_fp = fopen("u8g2_d_setup.c", "w"); + fprintf(setup_code_fp, "/* u8g2_d_setup.c */\n"); + fprintf(setup_code_fp, "/* generated code, codebuild, u8g2 project */\n"); + fprintf(setup_code_fp, "\n"); + fprintf(setup_code_fp, "#include \"u8g2.h\"\n"); + fprintf(setup_code_fp, "\n"); + + setup_header_fp = fopen("u8g2_setup.h", "w"); + //fprintf(setup_header_fp, "/* start of generated code, codebuild, u8g2 project */\n"); + + u8g2_cpp_header_fp = fopen("U8g2lib.h", "w"); + fprintf(u8g2_cpp_header_fp, "/* generated code (codebuild), u8g2 project */\n"); + + u8x8_cpp_header_fp = fopen("U8x8lib.h", "w"); + fprintf(u8x8_cpp_header_fp, "/* generated code (codebuild), u8g2 project */\n"); + + + u8x8_setup_c_md_fp = fopen("u8x8setupc.md", "w"); + u8x8_setup_cpp_md_fp = fopen("u8x8setupcpp.md", "w"); + u8g2_setup_c_md_fp = fopen("u8g2setupc.md", "w"); + u8g2_setup_cpp_md_fp = fopen("u8g2setupcpp.md", "w"); + + + + + do_controller_list(); + + + + md_fp = u8g2_setup_cpp_md_fp; + is_rtthread_cpp = 1; + is_u8g2 = 1; + do_md_controller_list(); + + md_fp = u8g2_setup_c_md_fp; + is_rtthread_cpp = 0; + is_u8g2 = 1; + do_md_controller_list(); + + md_fp = u8x8_setup_cpp_md_fp; + is_rtthread_cpp = 1; + is_u8g2 = 0; + do_md_controller_list(); + + md_fp = u8x8_setup_c_md_fp; + is_rtthread_cpp = 0; + is_u8g2 = 0; + do_md_controller_list(); + + fprintf(buf_code_fp, "/* end of generated code */\n"); + fclose(buf_code_fp); + + //fprintf(buf_header_fp, "/* end of generated code */\n"); + fclose(buf_header_fp); + + fprintf(setup_code_fp, "/* end of generated code */\n"); + fclose(setup_code_fp); + + //fprintf(setup_header_fp, "/* end of generated code */\n"); + fclose(setup_header_fp); + + fclose(u8g2_cpp_header_fp); + + fclose(u8x8_cpp_header_fp); + + + fclose(u8x8_setup_c_md_fp); + fclose(u8x8_setup_cpp_md_fp); + fclose(u8g2_setup_c_md_fp); + fclose(u8g2_setup_cpp_md_fp); + + + system("cp u8g2_d_memory.c ../../csrc/."); + puts("generate u8g2_d_memory.c"); + system("cp u8g2_d_setup.c ../../csrc/."); + puts("generate u8g2_d_setup.c"); + + insert_into_file("../../csrc/u8g2.h", "u8g2_memory.h", "/* u8g2_d_memory.c generated code start */", "/* u8g2_d_memory.c generated code end */"); + insert_into_file("../../csrc/u8g2.h", "u8g2_setup.h", "/* u8g2_d_setup.c generated code start */", "/* u8g2_d_setup.c generated code end */"); + insert_into_file("../../cppsrc/U8g2lib.h", "U8g2lib.h", "/* RT-Thread constructor list start */", "/* RT-Thread constructor list end */"); + insert_into_file("../../cppsrc/U8x8lib.h", "U8x8lib.h", "// constructor list start", "// constructor list end"); + + insert_into_file("../../../u8g2.wiki/u8g2setupc.md", "u8g2setupc.md", "# Setup Function Reference", "# Links"); + insert_into_file("../../../u8g2.wiki/u8g2setupcpp.md", "u8g2setupcpp.md", "# Constructor Reference", "# Links"); + insert_into_file("../../../u8g2.wiki/u8x8setupc.md", "u8x8setupc.md", "# Setup Function Reference", "# Links"); + insert_into_file("../../../u8g2.wiki/u8x8setupcpp.md", "u8x8setupcpp.md", "# Constructor Reference", "# Links"); + + + return 0; +} +