From 6c91637cf819a179f076120545e562a826b7043a Mon Sep 17 00:00:00 2001
From: olikraus <olikraus@gmail.com>
Date: Sat, 27 May 2017 17:19:19 +0200
Subject: [PATCH] adc

---
 sys/arm/stm32l031x6/clock/main.c | 66 ++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 15 deletions(-)

diff --git a/sys/arm/stm32l031x6/clock/main.c b/sys/arm/stm32l031x6/clock/main.c
index fd8e4eab..8f92dd08 100644
--- a/sys/arm/stm32l031x6/clock/main.c
+++ b/sys/arm/stm32l031x6/clock/main.c
@@ -547,49 +547,81 @@ uint16_t readADC(uint8_t ch)
 {
   uint16_t data;
   
+  __disable_irq();
+  
+  /* ADC RESET */
+  
   RCC->APB2ENR |= RCC_APB2ENR_ADCEN;	/* enable ADC clock */
   __NOP();								/* let us wait for some time */
+  __NOP();								/* let us wait for some time */  
+  RCC->APB2RSTR |= RCC_APB2RSTR_ADCRST;
+  __NOP();								/* let us wait for some time */
+  __NOP();								/* let us wait for some time */
+  RCC->APB2RSTR &= ~RCC_APB2RSTR_ADCRST;
+  __NOP();								/* let us wait for some time */
+  __NOP();								/* let us wait for some time */
   
+
+  /* Enable some basic parts */
+  
+  ADC1->IER = 0;						/* do not allow any interrupts */
   ADC1->CFGR2 &= ~ADC_CFGR2_CKMODE;	/* select HSI16 clock */
   
-  if ( (ADC1->CR & ADC_CR_ADEN) != 0 )
-  {
-    ADC1->CR |= ADC_CR_ADDIS; 			/* disable ADC... maybe better execute a reset */
-    while ((ADC1->CR & ADC_CR_ADEN) != 0) 	/* wait for ADC disable, ADEN is also cleared */
-    {
-    }
-  }
-  
   ADC1->CR |= ADC_CR_ADVREGEN;				/* enable ADC voltage regulator, probably not required, because this is automatically activated */
   ADC->CCR |= ADC_CCR_VREFEN; 			/* Wake-up the VREFINT */  
   ADC->CCR |= ADC_CCR_TSEN; 			/* Wake-up the temperature sensor */  
 
+  __NOP();								/* let us wait for some time */
+  __NOP();								/* let us wait for some time */
+
+  /* CALIBRATION */
+  
+  if ((ADC1->CR & ADC_CR_ADEN) != 0) /* clear ADEN flag if required */
+  {
+    ADC1->CR &= (uint32_t)(~ADC_CR_ADEN);
+  }
   ADC1->CR |= ADC_CR_ADCAL; 				/* start calibration */
   while ((ADC1->ISR & ADC_ISR_EOCAL) == 0) 	/* wait for clibration finished */
   {
   }
   ADC1->ISR |= ADC_ISR_EOCAL; 			/* clear the status flag, by writing 1 to it */
+  __NOP();								/* not sure why, but some nop's are required here, at least 4 of them */
+  __NOP();
+  __NOP();
+  __NOP();
+  __NOP();
+  __NOP();
+
+  /* ENABLE ADC */
   
-  //ADC1->CFGR1 |= ADC_CFGR1_AUTOFF;	/* not required, ADC is anyway disabled */
-  
-  ADC1->ISR |= ADC_ISR_ADRDY; /* clear ready flag */
-  ADC1->CR |= ADC_CR_ADEN; /* enable ADC */
-  //while ((ADC1->ISR & ADC_ISR_ADRDY) == 0) /* wait for ADC */
+  ADC1->ISR |= ADC_ISR_ADRDY; 			/* clear ready flag */
+  ADC1->CR |= ADC_CR_ADEN; 			/* enable ADC */
+  while ((ADC1->ISR & ADC_ISR_ADRDY) == 0) /* wait for ADC */
   {
   }
   
+  //printBits(5, ADC1->ISR );
+  //printBits(6, ADC1->CR );
+
+  /* CONFIGURE ADC */
+
   ADC1->CFGR1 &= ~ADC_CFGR1_EXTEN;	/* software enabled conversion start */
   ADC1->CFGR1 &= ~ADC_CFGR1_ALIGN;		/* right alignment */
   ADC1->CFGR1 &= ~ADC_CFGR1_RES;		/* 12 bit resolution */
   ADC1->CHSELR = 1<<ch; 				/* Select channel */
   ADC1->SMPR |= ADC_SMPR_SMP_0 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_2; /* Select a sampling mode of 111 (very slow)*/
+
+  /* DO CONVERSION */
   
   ADC1->CR |= ADC_CR_ADSTART; /* start the ADC conversion */
   while ((ADC1->ISR & ADC_ISR_EOC) == 0) /* wait end of conversion */
   {
   }
   data = ADC1->DR;						/* get ADC result and clear the ISR_EOC flag */
+
+  /* DISABLE ADC */
   
+  /* at this point the end of sampling and end of sequence bits are also set in ISR registr */
   if ( (ADC1->CR & ADC_CR_ADEN) != 0 )
   {
     ADC1->CR |= ADC_CR_ADDIS; 			/* disable ADC... maybe better execute a reset */
@@ -597,11 +629,15 @@ uint16_t readADC(uint8_t ch)
     {
     }
   }
+
+  /* DISABLE OTHER PARTS, INCLUDING CLOCK */
   
-  ADC->CCR &= ~ADC_CCR_VREFEN; 			/* disable VREFINT */  
+  ADC->CCR &= ~ADC_CCR_VREFEN; 		/* disable VREFINT */  
   ADC->CCR &= ~ADC_CCR_TSEN; 			/* disable temperature sensor */  
-  ADC1->CR &= ~ADC_CR_ADVREGEN;				/* disable ADC voltage regulator */
+  ADC1->CR &= ~ADC_CR_ADVREGEN;		/* disable ADC voltage regulator */
   RCC->APB2ENR &= ~RCC_APB2ENR_ADCEN;	/* disable ADC clock */
+  
+  __enable_irq();
   return data;
 }