From 51ca3f942fe38fda86ea6779390e25c326701bc7 Mon Sep 17 00:00:00 2001 From: kraus Date: Sun, 4 Mar 2018 21:02:01 +0100 Subject: [PATCH] stm32 update --- .../AlarmClock/arduino.184.mkrzero.sh | 0 .../AlarmClock/arduino.184.sh | 0 .../FPS/arduino.184.mkrzero.sh | 0 .../HelloWorld/arduino.184.mkrzero.sh | 0 sys/arm/plain/src/make.bat | 0 sys/arm/stm32l031x6/blink_a13_a14/Makefile | 148 +++++++++++ sys/arm/stm32l031x6/blink_a13_a14/main.c | 52 ++++ .../stm32l031x6/blink_a13_a14/stm32l031x6.ld | 245 ++++++++++++++++++ sys/arm/stm32l031x6/gpio_pulse/Makefile | 148 +++++++++++ sys/arm/stm32l031x6/gpio_pulse/main.c | 197 ++++++++++++++ sys/arm/stm32l031x6/gpio_pulse/stm32l031x6.ld | 245 ++++++++++++++++++ tools/font/bdf/u8glib_4.bdf | 0 tools/font/bdfconv/bdfconv.exe | Bin .../font/bdfconv/create_mingw_bdfconv_exe.bat | 0 tools/font/bdfconv/test_helvb18.bat | 0 tools/font/otf2bdf/configure | 0 tools/release/arduino/create_release.sh | 0 tools/release/plain_c/create_release.sh | 0 tools/release/print_release.sh | 0 19 files changed, 1035 insertions(+) mode change 100755 => 100644 sys/arduino/u8g2_page_buffer/AlarmClock/arduino.184.mkrzero.sh mode change 100755 => 100644 sys/arduino/u8g2_page_buffer/AlarmClock/arduino.184.sh mode change 100755 => 100644 sys/arduino/u8g2_page_buffer/FPS/arduino.184.mkrzero.sh mode change 100755 => 100644 sys/arduino/u8g2_page_buffer/HelloWorld/arduino.184.mkrzero.sh mode change 100644 => 100755 sys/arm/plain/src/make.bat create mode 100644 sys/arm/stm32l031x6/blink_a13_a14/Makefile create mode 100644 sys/arm/stm32l031x6/blink_a13_a14/main.c create mode 100644 sys/arm/stm32l031x6/blink_a13_a14/stm32l031x6.ld create mode 100644 sys/arm/stm32l031x6/gpio_pulse/Makefile create mode 100644 sys/arm/stm32l031x6/gpio_pulse/main.c create mode 100644 sys/arm/stm32l031x6/gpio_pulse/stm32l031x6.ld mode change 100755 => 100644 tools/font/bdf/u8glib_4.bdf mode change 100644 => 100755 tools/font/bdfconv/bdfconv.exe mode change 100644 => 100755 tools/font/bdfconv/create_mingw_bdfconv_exe.bat mode change 100644 => 100755 tools/font/bdfconv/test_helvb18.bat mode change 100755 => 100644 tools/font/otf2bdf/configure mode change 100755 => 100644 tools/release/arduino/create_release.sh mode change 100755 => 100644 tools/release/plain_c/create_release.sh mode change 100755 => 100644 tools/release/print_release.sh diff --git a/sys/arduino/u8g2_page_buffer/AlarmClock/arduino.184.mkrzero.sh b/sys/arduino/u8g2_page_buffer/AlarmClock/arduino.184.mkrzero.sh old mode 100755 new mode 100644 diff --git a/sys/arduino/u8g2_page_buffer/AlarmClock/arduino.184.sh b/sys/arduino/u8g2_page_buffer/AlarmClock/arduino.184.sh old mode 100755 new mode 100644 diff --git a/sys/arduino/u8g2_page_buffer/FPS/arduino.184.mkrzero.sh b/sys/arduino/u8g2_page_buffer/FPS/arduino.184.mkrzero.sh old mode 100755 new mode 100644 diff --git a/sys/arduino/u8g2_page_buffer/HelloWorld/arduino.184.mkrzero.sh b/sys/arduino/u8g2_page_buffer/HelloWorld/arduino.184.mkrzero.sh old mode 100755 new mode 100644 diff --git a/sys/arm/plain/src/make.bat b/sys/arm/plain/src/make.bat old mode 100644 new mode 100755 diff --git a/sys/arm/stm32l031x6/blink_a13_a14/Makefile b/sys/arm/stm32l031x6/blink_a13_a14/Makefile new file mode 100644 index 00000000..c90ce050 --- /dev/null +++ b/sys/arm/stm32l031x6/blink_a13_a14/Makefile @@ -0,0 +1,148 @@ +# +# Generic and Simple GNU ARM Makefile +# +# Desinged for the gnu-arm-none-eabi tool chain +# +# Features +# - create hex file +# - create assembler listing (.dis) +# +# Limitations +# - only C-files supported +# - no automatic dependency checking (call 'make clean' if any .h files are changed) +# +# Targets: +# make +# create hex file, no upload +# make upload +# create and upload hex file +# make clean +# delete all generated files +# +# Note: +# Display list make database: make -p -f/dev/null | less +# +#================================================ +# External tools + +# The base directory of gcc-arm-none-eabi +# Can be empty on Ubuntu and installed gcc-arm-none-eabi +# If set, GCCBINPATH must contain a "/" at the end. +GCCBINPATH:=/usr/bin/ + +#================================================ +# Project Information + +# The name for the project +TARGETNAME:=blink_a13_a14 + +# The source files of the project +CSRC:=$(wildcard *.c) +SSRC:=$(wildcard ../stm32l0xx/src/*.s) + +# The CPU architecture (will be used for -mcpu) +# for the LPC824, can we use "cortex-m0plus"? +MCPU:=cortex-m0plus + +# Include directory for the system include files +SYSINC:=../stm32l0xx/inc +SYSSRC:=$(wildcard ../stm32l0xx/src/*.c) + +# Include directory for the u8g2 include files +#U8G2INC:=../../../../csrc/ +#U8G2SRC:=$(wildcard ../../../../csrc/*.c) + +# directory for FatFS +#FFINC:=../fatfs +#FFSRC:=$(wildcard ../fatfs/*.c) + +# Directory for the linker script +LDSCRIPTDIR:=. +# Name of the linker script (must be the "keep" script, because the other script is not always working) +LDSCRIPT:=stm32l031x6.ld + +#================================================ +# Main part of the Makefile starts here. Usually no changes are needed. + +# Internal Variable Names +LIBNAME:=$(TARGETNAME).a +ELFNAME:=$(TARGETNAME).elf +HEXNAME:=$(TARGETNAME).hex +DISNAME:=$(TARGETNAME).dis +MAPNAME:=$(TARGETNAME).map +OBJ:=$(CSRC:.c=.o) $(SSRC:.s=.o) $(SYSSRC:.c=.o) +# $(SYSSRC:.c=.o) $(U8G2SRC:.c=.o) $(FFSRC:.c=.o) + +# Replace standard build tools by arm tools +AS:=$(GCCBINPATH)arm-none-eabi-as +CC:=$(GCCBINPATH)arm-none-eabi-gcc +AR:=$(GCCBINPATH)arm-none-eabi-ar +OBJCOPY:=$(GCCBINPATH)arm-none-eabi-objcopy +OBJDUMP:=$(GCCBINPATH)arm-none-eabi-objdump +SIZE:=$(GCCBINPATH)arm-none-eabi-size + +# Common flags +COMMON_FLAGS = -mthumb -mcpu=$(MCPU) +COMMON_FLAGS += -DSTM32L031xx +COMMON_FLAGS += -Wall -I. -I$(SYSINC) -I$(U8G2INC) +# define stack size (defaults to 0x0100) +# COMMON_FLAGS += -D__STACK_SIZE=0x0100 +# COMMON_FLAGS += -Os -flto +COMMON_FLAGS += -Os +# COMMON_FLAGS += -fstack-protector +# COMMON_FLAGS += -finstrument-functions +# Do not use stand libs startup code. Uncomment this for gcclib procedures +# memcpy still works, but might be required for __aeabi_uidiv +# COMMON_FLAGS += -nostdlib +# remove unused data and function +#COMMON_FLAGS += -ffunction-sections -fdata-sections -fshort-wchar +COMMON_FLAGS += -ffunction-sections -fdata-sections +# C flags +CFLAGS:=$(COMMON_FLAGS) -std=gnu99 +# LD flags +# remove unreferenced procedures and variables, but __isr_vector +GC:=-Wl,--gc-sections -Wl,--undefined=__isr_vector +MAP:=-Wl,-Map=$(MAPNAME) +LFLAGS:=$(COMMON_FLAGS) $(GC) $(MAP) +#LDLIBS:=--specs=nosys.specs -lc -lc -lnosys -L$(LDSCRIPTDIR) -T $(LDSCRIPT) +LDLIBS:=--specs=nosys.specs -L$(LDSCRIPTDIR) -T $(LDSCRIPT) + +# Additional Suffixes +.SUFFIXES: .elf .hex .bin .dis + +# Targets +.PHONY: all +all: $(DISNAME) $(HEXNAME) + $(SIZE) $(ELFNAME) + +.PHONY: upload +upload: $(DISNAME) $(HEXNAME) $(ELFNAME) + stm32flash -e 255 -g 0 -w $(HEXNAME) -v /dev/ttyUSB0 + $(SIZE) $(ELFNAME) + +.PHONY: clean +clean: + $(RM) $(OBJ) $(HEXNAME) $(ELFNAME) $(LIBNAME) $(DISNAME) $(MAPNAME) libssp.a libssp_nonshared.a + +# implicit rules +.elf.hex: + $(OBJCOPY) -O ihex $< $@ + + + +# explicit rules + +$(ELFNAME): $(LIBNAME)($(OBJ)) libssp.a libssp_nonshared.a + $(LINK.o) $(LFLAGS) $(LIBNAME) $(LDLIBS) -o $@ + +$(DISNAME): $(ELFNAME) + $(OBJDUMP) -D -S $< > $@ + +# create empty ssp libs for -fstack-protector-all -fstack-protector +libssp.a: + $(AR) rcs $@ + +libssp_nonshared.a: + $(AR) rcs $@ + + diff --git a/sys/arm/stm32l031x6/blink_a13_a14/main.c b/sys/arm/stm32l031x6/blink_a13_a14/main.c new file mode 100644 index 00000000..b2141fdf --- /dev/null +++ b/sys/arm/stm32l031x6/blink_a13_a14/main.c @@ -0,0 +1,52 @@ +/* LED blink project for the STM32L031 */ + +#include "stm32l031xx.h" + +volatile unsigned long SysTickCount = 0; + +void __attribute__ ((interrupt, used)) SysTick_Handler(void) +{ + SysTickCount++; + switch ( SysTickCount & 3 ) + { + case 0: + GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic set PA13 */ + break; + case 1: + GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr PA13 */ + break; + case 2: + GPIOA->BSRR = GPIO_BSRR_BS_14; /* atomic set PA13 */ + break; + case 3: + GPIOA->BSRR = GPIO_BSRR_BR_14; /* atomic clr PA13 */ + break; + } +} + +int main() +{ + RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */ + __NOP(); + __NOP(); + GPIOA->MODER &= ~GPIO_MODER_MODE13; /* clear mode for PA13 */ + GPIOA->MODER |= GPIO_MODER_MODE13_0; /* Output mode for PA13 */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_13; /* no Push/Pull for PA13 */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED13; /* low speed for PA13 */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD13; /* no pullup/pulldown for PA13 */ + GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr PA13 */ + + GPIOA->MODER &= ~GPIO_MODER_MODE14; /* clear mode for PA14 */ + GPIOA->MODER |= GPIO_MODER_MODE14_0; /* Output mode for PA14 */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_14; /* no Push/Pull for PA14 */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED14; /* low speed for PA14 */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD14; /* no pullup/pulldown for PA14 */ + GPIOA->BSRR = GPIO_BSRR_BR_14; /* atomic clr PA14 */ + + SysTick->LOAD = 2000*500 - 1; + SysTick->VAL = 0; + SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */ + + for(;;) + ; +} diff --git a/sys/arm/stm32l031x6/blink_a13_a14/stm32l031x6.ld b/sys/arm/stm32l031x6/blink_a13_a14/stm32l031x6.ld new file mode 100644 index 00000000..381cbf01 --- /dev/null +++ b/sys/arm/stm32l031x6/blink_a13_a14/stm32l031x6.ld @@ -0,0 +1,245 @@ +/* + + stm32l031x6.ld + + Modified for stm32l0 from the original nokeep.ld script from the + arm-none-eabi examples by olikraus@gmail.com + + Assuming, that the original nokeep.ld file is available under + the GNU General Public License, this file is available under the + same license. + + There are three modifications: + + 1. Provide symbols for the stm32l0 startup code + + The following symbols are required for the stm32l0 startup + code (e.g. startup_stm32l031xx.s) + + _sidata start address for the initialization values of the .data section + _sdata start address for the .data section. defined in linker script + _edata end address for the .data section. defined in linker script + _sbss start address for the .bss section. defined in linker script + _ebss end address for the .bss section. defined in linker script + _estack top address of the stack + + 2. Stack size estimation / calculation + + _Stack_Size has been added to allow better stack size calculation + + 3. KEEP keywords + + Additionall KEEPs added for .init and .fini. Without this KEEP the + generated code will not work, because of the missing _init function. + + 4. Bugfix: Allign the end of the flash area + +*/ + +_Stack_Size = 0x400; /* stm32l0: estimated amount of stack */ + + +/* Linker script to configure memory regions. + * Need modifying for a specific board. + * FLASH.ORIGIN: starting address of flash + * FLASH.LENGTH: length of flash + * RAM.ORIGIN: starting address of RAM bank 0 + * RAM.LENGTH: length of RAM bank 0 + */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.isr_vector)) + *(.text*) + + /* the st32l0 startup code calls __libc_init_array, which calls the _init */ + /* ... sooo.... better keep the init and fini sections */ + + KEEP ( *(.init) ) + KEEP ( *(.fini) ) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + *(.eh_frame*) + + /* allign the end of the flash area */ + . = ALIGN(4); + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */ + /* + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) + __copy_table_end__ = .; + } > FLASH + */ + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */ + /* + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) + __zero_table_end__ = .; + } > FLASH + */ + + __etext = .; + _sidata = .; /* for stm32l0 startup code */ + + .data : AT (__etext) + { + __data_start__ = .; + _sdata = .; /* for stm32l0 startup code */ + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + *(.preinit_array) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + *(SORT(.init_array.*)) + *(.init_array) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + *(SORT(.fini_array.*)) + *(.fini_array) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + _edata = .; /* for stm32l0 startup code */ + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + _sbss = .; /* for stm32l0 startup code */ + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + _ebss = .; /* for stm32l0 startup code */ + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + . = . + _Stack_Size; /* estimated stack size */ + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + _estack = __StackTop; /* for stm32l0 startup code */ + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/sys/arm/stm32l031x6/gpio_pulse/Makefile b/sys/arm/stm32l031x6/gpio_pulse/Makefile new file mode 100644 index 00000000..ee529de7 --- /dev/null +++ b/sys/arm/stm32l031x6/gpio_pulse/Makefile @@ -0,0 +1,148 @@ +# +# Generic and Simple GNU ARM Makefile +# +# Desinged for the gnu-arm-none-eabi tool chain +# +# Features +# - create hex file +# - create assembler listing (.dis) +# +# Limitations +# - only C-files supported +# - no automatic dependency checking (call 'make clean' if any .h files are changed) +# +# Targets: +# make +# create hex file, no upload +# make upload +# create and upload hex file +# make clean +# delete all generated files +# +# Note: +# Display list make database: make -p -f/dev/null | less +# +#================================================ +# External tools + +# The base directory of gcc-arm-none-eabi +# Can be empty on Ubuntu and installed gcc-arm-none-eabi +# If set, GCCBINPATH must contain a "/" at the end. +GCCBINPATH:=/usr/bin/ + +#================================================ +# Project Information + +# The name for the project +TARGETNAME:=gpio_pulse + +# The source files of the project +CSRC:=$(wildcard *.c) +SSRC:=$(wildcard ../stm32l0xx/src/*.s) + +# The CPU architecture (will be used for -mcpu) +# for the LPC824, can we use "cortex-m0plus"? +MCPU:=cortex-m0plus + +# Include directory for the system include files +SYSINC:=../stm32l0xx/inc +SYSSRC:=$(wildcard ../stm32l0xx/src/*.c) + +# Include directory for the u8g2 include files +#U8G2INC:=../../../../csrc/ +#U8G2SRC:=$(wildcard ../../../../csrc/*.c) + +# directory for FatFS +#FFINC:=../fatfs +#FFSRC:=$(wildcard ../fatfs/*.c) + +# Directory for the linker script +LDSCRIPTDIR:=. +# Name of the linker script (must be the "keep" script, because the other script is not always working) +LDSCRIPT:=stm32l031x6.ld + +#================================================ +# Main part of the Makefile starts here. Usually no changes are needed. + +# Internal Variable Names +LIBNAME:=$(TARGETNAME).a +ELFNAME:=$(TARGETNAME).elf +HEXNAME:=$(TARGETNAME).hex +DISNAME:=$(TARGETNAME).dis +MAPNAME:=$(TARGETNAME).map +OBJ:=$(CSRC:.c=.o) $(SSRC:.s=.o) $(SYSSRC:.c=.o) +# $(SYSSRC:.c=.o) $(U8G2SRC:.c=.o) $(FFSRC:.c=.o) + +# Replace standard build tools by arm tools +AS:=$(GCCBINPATH)arm-none-eabi-as +CC:=$(GCCBINPATH)arm-none-eabi-gcc +AR:=$(GCCBINPATH)arm-none-eabi-ar +OBJCOPY:=$(GCCBINPATH)arm-none-eabi-objcopy +OBJDUMP:=$(GCCBINPATH)arm-none-eabi-objdump +SIZE:=$(GCCBINPATH)arm-none-eabi-size + +# Common flags +COMMON_FLAGS = -mthumb -mcpu=$(MCPU) +COMMON_FLAGS += -DSTM32L031xx +COMMON_FLAGS += -Wall -I. -I$(SYSINC) -I$(U8G2INC) +# define stack size (defaults to 0x0100) +# COMMON_FLAGS += -D__STACK_SIZE=0x0100 +# COMMON_FLAGS += -Os -flto +COMMON_FLAGS += -Os +# COMMON_FLAGS += -fstack-protector +# COMMON_FLAGS += -finstrument-functions +# Do not use stand libs startup code. Uncomment this for gcclib procedures +# memcpy still works, but might be required for __aeabi_uidiv +# COMMON_FLAGS += -nostdlib +# remove unused data and function +#COMMON_FLAGS += -ffunction-sections -fdata-sections -fshort-wchar +COMMON_FLAGS += -ffunction-sections -fdata-sections +# C flags +CFLAGS:=$(COMMON_FLAGS) -std=gnu99 +# LD flags +# remove unreferenced procedures and variables, but __isr_vector +GC:=-Wl,--gc-sections -Wl,--undefined=__isr_vector +MAP:=-Wl,-Map=$(MAPNAME) +LFLAGS:=$(COMMON_FLAGS) $(GC) $(MAP) +#LDLIBS:=--specs=nosys.specs -lc -lc -lnosys -L$(LDSCRIPTDIR) -T $(LDSCRIPT) +LDLIBS:=--specs=nosys.specs -L$(LDSCRIPTDIR) -T $(LDSCRIPT) + +# Additional Suffixes +.SUFFIXES: .elf .hex .bin .dis + +# Targets +.PHONY: all +all: $(DISNAME) $(HEXNAME) + $(SIZE) $(ELFNAME) + +.PHONY: upload +upload: $(DISNAME) $(HEXNAME) $(ELFNAME) + stm32flash -e 255 -g 0 -w $(HEXNAME) -v /dev/ttyUSB0 + $(SIZE) $(ELFNAME) + +.PHONY: clean +clean: + $(RM) $(OBJ) $(HEXNAME) $(ELFNAME) $(LIBNAME) $(DISNAME) $(MAPNAME) libssp.a libssp_nonshared.a + +# implicit rules +.elf.hex: + $(OBJCOPY) -O ihex $< $@ + + + +# explicit rules + +$(ELFNAME): $(LIBNAME)($(OBJ)) libssp.a libssp_nonshared.a + $(LINK.o) $(LFLAGS) $(LIBNAME) $(LDLIBS) -o $@ + +$(DISNAME): $(ELFNAME) + $(OBJDUMP) -D -S $< > $@ + +# create empty ssp libs for -fstack-protector-all -fstack-protector +libssp.a: + $(AR) rcs $@ + +libssp_nonshared.a: + $(AR) rcs $@ + + diff --git a/sys/arm/stm32l031x6/gpio_pulse/main.c b/sys/arm/stm32l031x6/gpio_pulse/main.c new file mode 100644 index 00000000..e11b5328 --- /dev/null +++ b/sys/arm/stm32l031x6/gpio_pulse/main.c @@ -0,0 +1,197 @@ +/* GPIO pulse generator project for the STM32L031 */ + +#include "stm32l031xx.h" + +/*================================================*/ +/* forward declaration */ +void setGPIO( uint8_t n ); + + + +volatile unsigned long SysTickCount = 0; + + + +void __attribute__ ((interrupt, used)) SysTick_Handler(void) +{ + SysTickCount++; + if ( SysTickCount & 1 ) + clearGPIO(); + else + setGPIO( (SysTickCount>>1) & 7 ); +} + + + +void setHSIClock() +{ + + + /* test if the current clock source is something else than HSI */ + if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) + { + /* enable HSI */ + RCC->CR |= RCC_CR_HSION; + /* wait until HSI becomes ready */ + while ( (RCC->CR & RCC_CR_HSIRDY) == 0 ) + ; + + /* enable the HSI "divide by 4" bit */ + RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN); + /* wait until the "divide by 4" flag is enabled */ + while((RCC->CR & RCC_CR_HSIDIVF) == 0) + ; + + + /* then use the HSI clock */ + RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI; + + /* wait until HSI clock is used */ + while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) + ; + } + + /* disable PLL */ + RCC->CR &= (uint32_t)(~RCC_CR_PLLON); + /* wait until PLL is inactive */ + while((RCC->CR & RCC_CR_PLLRDY) != 0) + ; + + /* set latency to 1 wait state */ + FLASH->ACR |= FLASH_ACR_LATENCY; + + /* At this point the HSI runs with 4 MHz */ + /* Multiply by 16 device by 2 --> 32 MHz */ + RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2); + + /* enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* wait until the PLL is ready */ + while ((RCC->CR & RCC_CR_PLLRDY) == 0) + ; + + /* use the PLL has clock source */ + RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL); + /* wait until the PLL source is active */ + while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) + ; +} + +void initGPIO(void) +{ + RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */ + __NOP(); + __NOP(); + + + GPIOA->MODER &= ~GPIO_MODER_MODE14; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE14_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_14; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED14; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD14; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_14; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE13; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE13_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_13; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED13; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD13; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE7; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE7_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_7; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED7; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD7; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_7; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE6; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE6_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED6; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_6; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE5; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE5_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_5; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED5; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD5; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_5; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE4; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE4_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_4; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED4; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD4; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_4; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE1; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE1_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_1; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED1; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD1; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_1; /* atomic clr */ + + GPIOA->MODER &= ~GPIO_MODER_MODE0; /* clear mode */ + GPIOA->MODER |= GPIO_MODER_MODE0_0; /* Output mode */ + GPIOA->OTYPER &= ~GPIO_OTYPER_OT_0; /* no Push/Pull */ + GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED0; /* low speed */ + GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD0; /* no pullup/pulldown */ + GPIOA->BSRR = GPIO_BSRR_BR_0; /* atomic clr */ + +} + +void clearGPIO(void) +{ + GPIOA->BSRR = GPIO_BSRR_BR_14 + | GPIO_BSRR_BR_13 + | GPIO_BSRR_BR_7 + | GPIO_BSRR_BR_6 + | GPIO_BSRR_BR_5 + | GPIO_BSRR_BR_4 + | GPIO_BSRR_BR_1 + | GPIO_BSRR_BR_0; +} + +/* + 0: PA14 + 1: PA13 + 2: PA7 + 3: PA6 + 4: PA5 + 5: PA4 + 6: PA1 + 7: PA0 +*/ +void setGPIO( uint8_t n ) +{ + clearGPIO(); + switch(n) + { + case 0: GPIOA->BSRR = GPIO_BSRR_BS_14; break; + case 1: GPIOA->BSRR = GPIO_BSRR_BS_13; break; + case 2: GPIOA->BSRR = GPIO_BSRR_BS_7; break; + case 3: GPIOA->BSRR = GPIO_BSRR_BS_6; break; + case 4: GPIOA->BSRR = GPIO_BSRR_BS_5; break; + case 5: GPIOA->BSRR = GPIO_BSRR_BS_4; break; + case 6: GPIOA->BSRR = GPIO_BSRR_BS_1; break; + case 7: GPIOA->BSRR = GPIO_BSRR_BS_0; break; + + } +} + +int main() +{ + initGPIO(); + + setHSIClock(); + + SysTick->LOAD = 32000*100 - 1; // 100 ms + SysTick->VAL = 0; + SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */ + + for(;;) + ; +} diff --git a/sys/arm/stm32l031x6/gpio_pulse/stm32l031x6.ld b/sys/arm/stm32l031x6/gpio_pulse/stm32l031x6.ld new file mode 100644 index 00000000..381cbf01 --- /dev/null +++ b/sys/arm/stm32l031x6/gpio_pulse/stm32l031x6.ld @@ -0,0 +1,245 @@ +/* + + stm32l031x6.ld + + Modified for stm32l0 from the original nokeep.ld script from the + arm-none-eabi examples by olikraus@gmail.com + + Assuming, that the original nokeep.ld file is available under + the GNU General Public License, this file is available under the + same license. + + There are three modifications: + + 1. Provide symbols for the stm32l0 startup code + + The following symbols are required for the stm32l0 startup + code (e.g. startup_stm32l031xx.s) + + _sidata start address for the initialization values of the .data section + _sdata start address for the .data section. defined in linker script + _edata end address for the .data section. defined in linker script + _sbss start address for the .bss section. defined in linker script + _ebss end address for the .bss section. defined in linker script + _estack top address of the stack + + 2. Stack size estimation / calculation + + _Stack_Size has been added to allow better stack size calculation + + 3. KEEP keywords + + Additionall KEEPs added for .init and .fini. Without this KEEP the + generated code will not work, because of the missing _init function. + + 4. Bugfix: Allign the end of the flash area + +*/ + +_Stack_Size = 0x400; /* stm32l0: estimated amount of stack */ + + +/* Linker script to configure memory regions. + * Need modifying for a specific board. + * FLASH.ORIGIN: starting address of flash + * FLASH.LENGTH: length of flash + * RAM.ORIGIN: starting address of RAM bank 0 + * RAM.LENGTH: length of RAM bank 0 + */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.isr_vector)) + *(.text*) + + /* the st32l0 startup code calls __libc_init_array, which calls the _init */ + /* ... sooo.... better keep the init and fini sections */ + + KEEP ( *(.init) ) + KEEP ( *(.fini) ) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + *(.eh_frame*) + + /* allign the end of the flash area */ + . = ALIGN(4); + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */ + /* + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + LONG (__etext) + LONG (__data_start__) + LONG (__data_end__ - __data_start__) + LONG (__etext2) + LONG (__data2_start__) + LONG (__data2_end__ - __data2_start__) + __copy_table_end__ = .; + } > FLASH + */ + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */ + /* + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + LONG (__bss2_start__) + LONG (__bss2_end__ - __bss2_start__) + __zero_table_end__ = .; + } > FLASH + */ + + __etext = .; + _sidata = .; /* for stm32l0 startup code */ + + .data : AT (__etext) + { + __data_start__ = .; + _sdata = .; /* for stm32l0 startup code */ + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + *(.preinit_array) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + *(SORT(.init_array.*)) + *(.init_array) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + *(SORT(.fini_array.*)) + *(.fini_array) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + _edata = .; /* for stm32l0 startup code */ + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + _sbss = .; /* for stm32l0 startup code */ + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + _ebss = .; /* for stm32l0 startup code */ + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + . = . + _Stack_Size; /* estimated stack size */ + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + _estack = __StackTop; /* for stm32l0 startup code */ + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/tools/font/bdf/u8glib_4.bdf b/tools/font/bdf/u8glib_4.bdf old mode 100755 new mode 100644 diff --git a/tools/font/bdfconv/bdfconv.exe b/tools/font/bdfconv/bdfconv.exe old mode 100644 new mode 100755 diff --git a/tools/font/bdfconv/create_mingw_bdfconv_exe.bat b/tools/font/bdfconv/create_mingw_bdfconv_exe.bat old mode 100644 new mode 100755 diff --git a/tools/font/bdfconv/test_helvb18.bat b/tools/font/bdfconv/test_helvb18.bat old mode 100644 new mode 100755 diff --git a/tools/font/otf2bdf/configure b/tools/font/otf2bdf/configure old mode 100755 new mode 100644 diff --git a/tools/release/arduino/create_release.sh b/tools/release/arduino/create_release.sh old mode 100755 new mode 100644 diff --git a/tools/release/plain_c/create_release.sh b/tools/release/plain_c/create_release.sh old mode 100755 new mode 100644 diff --git a/tools/release/print_release.sh b/tools/release/print_release.sh old mode 100755 new mode 100644