This commit is contained in:
kraus 2019-01-30 16:38:24 +01:00
parent 52df551570
commit 3ebce57843
2 changed files with 37 additions and 35 deletions

View File

@ -49,34 +49,36 @@ static const uint8_t u8x8_d_ssd1317_96x96_init_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0ae), /* display off */
U8X8_CA(0x0d5, 0x080), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
U8X8_CA(0x0a8, 0x03f), /* multiplex ratio */
U8X8_C(0x0ae), /* display off */
U8X8_CA(0x0d5, 0x0d1), /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
U8X8_CA(0x0a8, 0x05f), /* multiplex ratio */
U8X8_CA(0x0d3, 0x000), /* display offset */
U8X8_C(0x040), /* set display start line to 0 */
U8X8_CA(0x0a2, 0x000), /* set display start line to 0 */
U8X8_CA(0x08d, 0x014), /* [2] charge pump setting (p62): 0x014 enable, 0x010 disable, SSD1306 only, should be removed for SH1106 */
U8X8_CA(0x020, 0x000), /* page addressing mode */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
U8X8_C(0x0a0), /* segment remap a0/a1*/
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
// Flipmode
// U8X8_C(0x0a0), /* segment remap a0/a1*/
// U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
//U8X8_C(0x0a1), /* segment remap a0/a1*/
//U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
U8X8_CA(0x0da, 0x012), /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5) */
U8X8_CA(0x081, 0x0cf), /* [2] set contrast control */
U8X8_CA(0x081, 0x09f), /* [2] set contrast control */
U8X8_CA(0x0d9, 0x0f1), /* [2] pre-charge period 0x022/f1*/
U8X8_CA(0x0db, 0x040), /* vcomh deselect level */
U8X8_CA(0x0db, 0x0ff), /* vcomh deselect level */
// if vcomh is 0, then this will give the biggest range for contrast control issue #98
// restored the old values for the noname constructor, because vcomh=0 will not work for all OLEDs, #116
U8X8_C(0x02e), /* Deactivate scroll */
U8X8_C(0x0a4), /* output ram to display */
U8X8_C(0x0a6), /* none inverted normal display mode */
U8X8_C(0x02e), /* Deactivate scroll */
U8X8_C(0x0a4), /* output ram to display */
U8X8_C(0x0a6), /* none inverted normal display mode */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
U8X8_END() /* end of sequence */
};
@ -98,7 +100,7 @@ static const uint8_t u8x8_d_ssd1317_96x96_powersave1_seq[] = {
static const uint8_t u8x8_d_ssd1317_96x96_flip0_seq[] = {
U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
U8X8_C(0x0a1), /* segment remap a0/a1*/
U8X8_C(0x0c0), /* c0: scan dir normal, c8: reverse */
U8X8_C(0x0c8), /* c0: scan dir normal, c8: reverse */
U8X8_END_TRANSFER(), /* disable chip */
U8X8_END() /* end of sequence */
};
@ -155,25 +157,25 @@ static uint8_t u8x8_d_ssd1317_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int
u8x8_cad_EndTransfer(u8x8);
break;
#endif
case U8X8_MSG_DISPLAY_DRAW_TILE:
u8x8_cad_StartTransfer(u8x8);
x = ((u8x8_tile_t *)arg_ptr)->x_pos;
x *= 8;
x += u8x8->x_offset;
u8x8_cad_SendCmd(u8x8, 0x040 ); /* set line offset to 0 */
u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) );
u8x8_cad_SendArg(u8x8, 0x000 | ((x&15))); /* probably wrong, should be SendCmd */
u8x8_cad_SendArg(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); /* probably wrong, should be SendCmd */
case U8X8_MSG_DISPLAY_DRAW_TILE:
u8x8_cad_StartTransfer(u8x8);
x = ((u8x8_tile_t *)arg_ptr)->x_pos;
x *= 8;
x += u8x8->x_offset;
u8x8_cad_SendCmd(u8x8, 0x040 ); /* set line offset to 0 */
u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) );
u8x8_cad_SendArg(u8x8, 0x000 | ((x&15))); /* probably wrong, should be SendCmd */
u8x8_cad_SendArg(u8x8, 0x0b0 | (((u8x8_tile_t *)arg_ptr)->y_pos)); /* probably wrong, should be SendCmd */
do
{
c = ((u8x8_tile_t *)arg_ptr)->cnt;
ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
u8x8_cad_SendData(u8x8, c*8, ptr); /* note: SendData can not handle more than 255 bytes */
/*
do
{
c = ((u8x8_tile_t *)arg_ptr)->cnt;
ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
u8x8_cad_SendData(u8x8, c*8, ptr); /* note: SendData can not handle more than 255 bytes */
/*
do
{
u8x8_cad_SendData(u8x8, 8, ptr);
@ -211,8 +213,8 @@ static const u8x8_display_info_t u8x8_ssd1317_96x96_display_info =
/* write_pulse_width_ns = */ 150, /* SSD1306: cycle time is 300ns, so use 300/2 = 150 */
/* tile_width = */ 12,
/* tile_hight = */ 12,
/* default_x_offset = */ 0,
/* flipmode_x_offset = */ 0,
/* default_x_offset = */ 16,
/* flipmode_x_offset = */ 16,
/* pixel_width = */ 96,
/* pixel_height = */ 96
};

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@ -142,7 +142,7 @@
//U8G2_SSD1317_96X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed
//U8G2_SSD1317_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed
//U8G2_SSD1318_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
U8G2_SSD1318_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
//U8G2_SSD1318_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
//U8G2_LD7032_60X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* cs=*/ 9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board
//U8G2_LD7032_60X32_1_4W_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* reset=*/ U8X8_PIN_NONE); // NOT TESTED!
//U8G2_UC1701_EA_DOGS102_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);